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Searched full:slcr (Results 1 – 16 of 16) sorted by relevance

/freebsd/sys/arm/xilinx/
H A Dzy7_slcr.c30 * Zynq-700 SLCR driver. Provides hooks for cpu_reset and PL control stuff.
113 /* Unlock SLCR with magic number. */ in zy7_slcr_unlock()
121 /* Lock SLCR with magic number. */ in zy7_slcr_lock()
130 /* Unlock SLCR registers. */ in zy7_slcr_cpu_reset()
159 /* Unlock SLCR registers. */ in zy7_slcr_preload_pl()
168 /* Lock SLCR registers. */ in zy7_slcr_preload_pl()
189 /* Unlock SLCR registers. */ in zy7_slcr_postload_pl()
199 /* Lock SLCR registers. */ in zy7_slcr_postload_pl()
235 /* Unlock SLCR registers. */ in cgem_set_ref_clk()
245 /* Lock SLCR registers. */ in cgem_set_ref_clk()
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H A Dzy7_mp.c66 /* Map in SLCR PSS_IDCODE register. */ in zynq7_mp_setmaxid()
69 panic("%s: Could not map SLCR IDCODE reg.\n", __func__); in zynq7_mp_setmaxid()
H A Dzy7_reg.h61 /* SLCR, PS system, and CPU private registers combined in this region. */
H A Dzy7_slcr.h30 * Defines for Zynq-7000 SLCR registers.
36 * (v1.4) November 16, 2012. Xilinx doc UG585. SLCR register definitions
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dzynq-reset.txt9 - reg: SLCR offset and size taken via syscon <0x200 0x48>
10 - syscon: <&slcr>
11 This should be a phandle to the Zynq's SLCR registers.
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
21 syscon = <&slcr>;
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dxlnx,zynq-pinctrl.txt5 - syscon: phandle to SLCR
6 - reg: Offset and length of pinctrl space in SLCR
81 syscon = <&slcr>;
H A Dxlnx,zynq-pinctrl.yaml34 description: Specifies the base address and size of the SLCR space.
39 phandle to the SLCR.
186 syscon = <&slcr>;
H A Dxlnx,pinctrl-zynq.yaml34 description: Specifies the base address and size of the SLCR space.
39 phandle to the SLCR.
186 syscon = <&slcr>;
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxilinx-zynq-fpga-mgr.txt9 - syscon: phandle for access to SLCR registers
18 syscon = <&slcr>;
H A Dxilinx-zynq-fpga-mgr.yaml32 Phandle to syscon block which provide access to SLCR registers
51 syscon = <&slcr>;
H A Dfpga-region.txt357 syscon = <&slcr>;
/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-7000.dtsi310 slcr: slcr@f8000000 { label
313 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
338 syscon = <&slcr>;
344 syscon = <&slcr>;
373 syscon = <&slcr>;
/freebsd/sys/dts/arm/
H A Dzynq-7000.dtsi47 // SLCR block
48 slcr: slcr@7000 { label
H A Dzedboard.dts46 &slcr {
H A Dzybo.dts46 &slcr {
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dzynq-7000.txt17 - reg : SLCR offset and size taken via syscon < 0x100 0x100 >