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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Deconet,en751221-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/econet,en751221-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Caleb James DeLisle <cjd@cjdns.fr>
15 be routed to either VPE but not both, so to support per-CPU interrupts, a
17 lack of a better term we call these "shadow interrupts". The assignment of
18 shadow interrupts is defined by the SoC integrator when wiring the interrupt
22 - $ref: /schemas/interrupt-controller.yaml#
26 const: econet,en751221-intc
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H A Dfsl,imx8qxp-dc-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,imx8qxp-dc-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Display Controller has a built-in interrupt controller with the following
18 Each interrupt can be connected as IRQ (maskable) and/or NMI (non-maskable).
19 Alternatively the un-masked trigger signals for all HW events are provided,
26 - Liu Ying <victor.liu@nxp.com>
30 const: fsl,imx8qxp-dc-intc
38 interrupt-controller: true
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/freebsd/share/man/man9/
H A Dkmsan.91 .\"-
36 .Pa GENERIC-KMSAN
37 kernel configuration can be used to compile a KMSAN-enabled kernel using
42 .Bd -ragged -offset indent
73 runtime component and use hidden, byte-granular shadow state to determine
78 Otherwise, the shadow state is propagated to destination operand.
94 In addition to compiler-detected uses of uninitialized memory,
99 perform validation of the input's shadow state and will raise an error if
106 the kernel map requires two bytes of shadow state.
114 The sanitizer in a KMSAN-configured kernel can be disabled by setting the loader
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dsnps,dw-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
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H A Dsnps,dw-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Root Port controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie
23 - compatible
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H A Drockchip-dw-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Niklas Cassel <cassel@kernel.org>
15 snps,dw-pcie-ep.yaml.
18 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
19 - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml#
24 - rockchip,rk3568-pcie-ep
25 - rockchip,rk3588-pcie-ep
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H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
26 space, Port Logic Registers (PL), Shadow Config-space Registers,
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/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb_pcireg.h1 /*-
36 * - PCI (cid=0x804, revision <= 12)
41 * [0x1000+0x0800] fixed SPROM shadow
47 * - PCI (cid=0x804, revision >= 13)
48 * - PCIE (cid=0x820) with ChipCommon (revision <= 31)
53 * [0x1000+0x1000] fixed SPROM shadow
59 * - PCIE (cid=0x820) with ChipCommon (revision >= 32)
70 * - PCIE Gen 2 (cid=0x83c)
82 * [0x0000+0x????] fixed ARM tightly-coupled memory (TCM).
89 * - Mapped GPIO CSRs into the PCI config space. Refer to
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H A Dbhndb_pci.c1 /*-
2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
36 * PCI-specific implementation for the BHNDB bridge driver.
38 * Provides support for bridging from a PCI parent bus to a BHND-compatible
39 * bus (e.g. bcma or siba) via a Broadcom PCI core configured in end-point
42 * This driver handles all initial generic host-level PCI interactions with a
44 * bus has been enumerated, this driver works in tandem with a core-specific
169 struct bhnd_core_info *cores; /**< erom-owned core table */
183 /* Backplane interrupt flags must be routed via siba-specific
190 /* All PCI core revisions require the SRSH work-around */
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/freebsd/sys/net/
H A Dparavirt.h31 Support for virtio-like communication between host (H) and guest (G) NICs.
37 csb->csb_on enables the mode. If disabled, the device acts a regular one.
82 This second mechanism reduces the number of interrupts and
116 * [GH][RW][+-0] guest/host reads/writes frequently/rarely/almost never
120 uint32_t guest_need_txkick; /* GW- HR+ G ran out of tx bufs, request kick */
121 uint32_t guest_need_rxkick; /* GW- HR+ G ran out of rx pkts, request kick */
122 uint32_t guest_csb_on; /* GW- HR+ enable paravirtual mode */
124 uint32_t guest_txkick_at; /* GW- HR+ tx ring pos. where G expects an intr */
125 uint32_t guest_use_msix; /* GW0 HR0 guest uses MSI-X interrupts. */
129 uint32_t host_tdh; /* GR0 HW- shadow register, mostly unused */
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/freebsd/sys/contrib/device-tree/src/mips/econet/
H A Den751221.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /dts-v1/;
6 #address-cells = <1>;
7 #size-cells = <1>;
10 compatible = "fixed-clock";
11 #clock-cells = <0>;
12 clock-frequency = <200000000>; /* 200 MHz */
16 #address-cells = <1>;
17 #size-cells = <0>;
26 cpuintc: interrupt-controller {
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,mutex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
18 the shadow register.
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt8167-disp-mutex
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/freebsd/share/doc/smm/01.setup/
H A D6.t38 In a normal reboot, the system checks the disks and comes up multi-user
42 This will leave the system in single-user mode, with only the console
46 you must enter the root password to bring the machine to single-user mode.)
48 and then to return to single-user mode by signaling
52 To bring the system up to a multi-user configuration from the single-user
57 a multi-user restart script (and
68 ``fsck \-p'' or force a reboot with
79 when you are running multi-user.
82 system is taken single-user. If you wish to come up multi-user again, you
86 \fB#\fP \fI/sbin/umount -a\fP
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/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/
H A Dmediatek,mutex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
18 the shadow register.
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt6795-disp-mutex
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/freebsd/sys/dev/igc/
H A Digc_i225.c1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
22 * igc_init_nvm_params_i225 - Init NVM func ptrs.
27 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_i225()
36 * Added to a constant, "size" becomes the left-shift value in igc_init_nvm_params_i225()
47 nvm->word_size = 1 << size; in igc_init_nvm_params_i225()
48 nvm->opcode_bits = 8; in igc_init_nvm_params_i225()
49 nvm->delay_usec = 1; in igc_init_nvm_params_i225()
50 nvm->type = igc_nvm_eeprom_spi; in igc_init_nvm_params_i225()
53 nvm->page_size = eecd & IGC_EECD_ADDR_BITS ? 32 : 8; in igc_init_nvm_params_i225()
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/freebsd/stand/efi/loader/arch/amd64/
H A Dtrap.c1 /*-
48 * This code catches exceptions but forwards hardware interrupts to
50 * vs. interrupts by presence of the error code on the stack, which
57 * IST-specified one, e.g. to handle #SS. If hand-off cannot find
63 shadow IDT */
64 static EFI_PHYSICAL_ADDRESS lidt_pa; /* Address of loader shadow IDT */
76 static EFI_PHYSICAL_ADDRESS loader_gdt_pa; /* Address of loader shadow GDT */
91 base = (uintptr_t)boot_img->ImageBase; in report_exc()
99 printf("Exception %u\n", tf->tf_trapno); in report_exc()
102 (uint16_t)tf->tf_ss, (uint16_t)tf->tf_cs, (uint16_t)tf->tf_ds, in report_exc()
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/freebsd/sys/contrib/device-tree/src/mips/lantiq/
H A Ddanube_easy50712.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 #address-cells = <2>;
21 #size-cells = <1>;
24 compatible = "lantiq,localbus", "simple-bus";
26 nor-boot@0 {
28 bank-width = <2>;
30 #address-cells = <1>;
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H A Deasy50712.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 #address-cells = <2>;
21 #size-cells = <1>;
24 compatible = "lantiq,localbus", "simple-bus";
26 nor-boot@0 {
28 bank-width = <2>;
30 #address-cells = <1>;
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/freebsd/sys/contrib/dev/iwlwifi/pcie/gen1_2/
H A Dtrans-gen2.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
4 * Copyright (C) 2018-2025 Intel Corporation
9 #include "iwl-trans.h"
10 #include "iwl-prph.h"
11 #include "pcie/iwl-context-info.h"
12 #include "pcie/iwl-context-info-v2.h"
46 * wake device's PCI Express link L1a -> L0s in iwl_pcie_gen2_apm_init()
57 set_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_init()
67 if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status)) in iwl_pcie_gen2_apm_stop()
82 clear_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_stop()
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/freebsd/sys/dev/bhnd/cores/pci/
H A Dbhnd_pcireg.h1 /*-
2 * SPDX-License-Identifier: ISC
29 * PCI/PCIe-Gen1 DMA Constants
35 #define BHND_PCIE_DMA32_TRANSLATION 0x80000000 /**< PCIe-Gen1 DMA32 address translation (sb2pcitr…
36 #define BHND_PCIE_DMA32_MASK BHND_PCIE_SBTOPCI2_MASK /**< PCIe-Gen1 DMA32 translation mask */
38 #define BHND_PCIE_DMA64_TRANSLATION _BHND_PCIE_DMA64(TRANSLATION) /**< PCIe-Gen1 DMA64 address tran…
39 #define BHND_PCIE_DMA64_MASK _BHND_PCIE_DMA64(MASK) /**< PCIe-Gen1 DMA64 translation mask */
64 #define BHND_PCI_SPROM_SHADOW 0x800 /**< PCI SPROM shadow */
76 /* BHND_PCI_ARB_CTL - ParkID (>= rev8) */
98 * (General) PCI/SB mailbox interrupts, two bits per pci function */
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/freebsd/sys/dev/mii/
H A Dbrgphyreg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
113 #define BRGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
114 #define BRGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
115 #define BRGPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
116 #define BRGPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
119 #define BRGPHY_PHY_EXTCTL_MAC_PHY 0x8000 /* 10BIT/GMI-interface */
122 #define BRGPHY_PHY_EXTCTL_INT_DIS 0x1000 /* Interrupts disabled */
124 #define BRGPHY_PHY_EXTCTL_BY_45 0x0400 /* Bypass 4B5B-Decoder */
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/freebsd/sys/contrib/dev/athk/ath11k/
H A Dce.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
12 /* CE0: host->target HTC control and raw streams */
21 /* CE1: target->host HTT + HTC control */
30 /* CE2: target->host WMI */
39 /* CE3: host->target WMI (mac0) */
48 /* CE4: host->target HTT */
56 /* CE5: target->host pktlog */
73 /* CE7: host->target WMI (mac1) */
90 /* CE9: host->target WMI (mac2) */
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_e610.c2 SPDX-License-Identifier: BSD-3-Clause
43 * ixgbe_init_aci - initialization routine for Admin Command Interface
50 ixgbe_init_lock(&hw->aci.lock); in ixgbe_init_aci()
54 * ixgbe_shutdown_aci - shutdown routine for Admin Command Interface
61 ixgbe_destroy_lock(&hw->aci.lock); in ixgbe_shutdown_aci()
65 * ixgbe_should_retry_aci_send_cmd_execute - decide if ACI command should
88 * ixgbe_aci_send_cmd_execute - execute sending FW Admin Command to FW Admin
99 * * - IXGBE_SUCCESS - success.
100 * * - IXGBE_ERR_ACI_DISABLED - CSR mechanism is not enabled.
101 * * - IXGBE_ERR_ACI_BUSY - CSR mechanism is busy.
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/freebsd/sys/contrib/dev/athk/ath12k/
H A Dce.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
12 /* CE0: host->target HTC control and raw streams */
20 /* CE1: target->host HTT + HTC control */
29 /* CE2: target->host WMI */
38 /* CE3: host->target WMI (mac0) */
46 /* CE4: host->target HTT */
54 /* CE5: target->host pktlog */
71 /* CE7: host->target WMI (mac1) */
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/freebsd/sys/contrib/device-tree/src/arm64/apple/
H A Dt600x-die0.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
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