Lines Matching +full:shadow +full:- +full:interrupts

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/econet,en751221-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Caleb James DeLisle <cjd@cjdns.fr>
15   be routed to either VPE but not both, so to support per-CPU interrupts, a
17   lack of a better term we call these "shadow interrupts". The assignment of
18   shadow interrupts is defined by the SoC integrator when wiring the interrupt
22   - $ref: /schemas/interrupt-controller.yaml#
26     const: econet,en751221-intc
31   "#interrupt-cells":
34   interrupt-controller: true
36   interrupts:
40   econet,shadow-interrupts:
41     $ref: /schemas/types.yaml#/definitions/uint32-matrix
43       An array of interrupt number pairs where each pair represents a shadow
45       and the second is its shadow IRQ used for VPE#1 control. For example,
52         - description: primary per-CPU IRQ
53         - description: shadow IRQ number
56   - compatible
57   - reg
58   - interrupt-controller
59   - "#interrupt-cells"
60   - interrupts
65   - |
66     interrupt-controller@1fb40000 {
67         compatible = "econet,en751221-intc";
70         interrupt-controller;
71         #interrupt-cells = <1>;
73         interrupt-parent = <&cpuintc>;
74         interrupts = <2>;
76         econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;