/linux/Documentation/devicetree/bindings/mmc/ |
H A D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 - $ref: sdhci-common.yaml# 19 - enum: 20 - ti,am62-sdhci 21 - ti,am64-sdhci-4bit [all …]
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H A D | mmc-controller-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 14 possible slots or ports for multi-slot controllers. 17 "#address-cells": 22 "#size-cells": 29 broken-cd: 34 cd-gpios: [all …]
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H A D | marvell,xenon-sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 mmc-controller.yaml and the properties used by the Xenon implementation. 20 - Ulf Hansson <ulf.hansson@linaro.org> 25 - enum: 26 - marvell,armada-cp110-sdhci 27 - marvell,armada-ap806-sdhci 29 - items: [all …]
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H A D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Adrian Hunter <adrian.hunter@intel.com> 13 - $ref: mmc-controller.yaml# 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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H A D | sprd,sdhci-r11.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Orson Zhai <orsonzhai@gmail.com> 11 - Baolin Wang <baolin.wang7@gmail.com> 12 - Chunyan Zhang <zhang.lyra@gmail.com> 16 const: sprd,sdhci-r11 27 - description: SDIO source clock 28 - description: gate clock for enabling/disabling the device [all …]
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H A D | ti-omap-hsmmc.txt | 4 provides an interface for MMC, SD, and SDIO types of memory cards. 10 -------------------- 11 - compatible: 12 Should be "ti,omap2-hsmmc", for OMAP2 controllers 13 Should be "ti,omap3-hsmmc", for OMAP3 controllers 14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 15 Should be "ti,omap4-hsmmc", for OMAP4 controllers 16 Should be "ti,am33xx-hsmmc", for AM335x controllers 17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers. 20 --------------------------------- [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp135f-dhcor-dhsbc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG 7 * DHCOR PCB number: 718-100 or newer 8 * DHSBC PCB number: 719-100 or newer 11 /dts-v1/; 13 #include <dt-bindings/regulator/st,stm32mp13-regulator.h> 16 #include "stm32mp13xx-dhcor-som.dtsi" 20 compatible = "dh,stm32mp135f-dhcor-dhsbc", 21 "dh,stm32mp135f-dhcor-som", 32 stdout-path = "serial0:115200n8"; [all …]
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/linux/arch/arm/boot/dts/intel/socfpga/ |
H A D | socfpga_arria10_socdk_sdmmc.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2014-2015 Altera Corporation <www.altera.com> 6 /dts-v1/; 11 cap-sd-highspeed; 12 cap-mmc-highspeed; 13 broken-cd; 14 bus-width = <4>; 15 clk-phase-sd-hs = <0>, <135>; 19 sdmmca-ecc@ff8c2c00 { 20 compatible = "altr,socfpga-sdmmc-ecc"; [all …]
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H A D | socfpga_arria5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 16 clock-frequency = <25000000>; 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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H A D | socfpga_cyclone5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 16 clock-frequency = <25000000>; 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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H A D | socfpga_cyclone5_mcv.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-cyclone5", "altr,socfpga"; 19 &mmc0 { /* On-SoM eMMC */ 20 bus-width = <8>; 21 clk-phase-sd-hs = <0>, <135>;
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H A D | socfpga_arria10_mercury_aa1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; 25 stdout-path = "serial1:115200n8"; 30 phy-mode = "rgmii"; 31 phy-addr = <0xffffffff>; /* probe for phy addr */ 33 max-frame-size = <3800>; 35 phy-handle = <&phy3>; 38 #address-cells = <1>; 39 #size-cells = <0>; 40 compatible = "snps,dwmac-mdio"; [all …]
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/linux/drivers/media/i2c/ |
H A D | tw9910.c | 1 // SPDX-License-Identifier: GPL-2.0 13 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 26 #include <linux/v4l2-mediabus.h> 30 #include <media/v4l2-subdev.h> 136 #define IFSEL_S 0x10 /* 01 : S-video decoding */ 146 /* 1 : ITU-R-656 compatible data sequence format */ 147 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */ 148 /* 1 : 16-bit YCrCb 4:2:2 output format.*/ 150 /* 0 : free-run output mode */ 151 #define AINC 0x10 /* Serial interface auto-indexing control */ [all …]
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H A D | max9286.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2017-2019 Jacopo Mondi 6 * Copyright (C) 2017-2019 Kieran Bingham 7 * Copyright (C) 2017-2019 Laurent Pinchart 8 * Copyright (C) 2017-2019 Niklas Söderlund 20 #include <linux/i2c-mux.h> 26 #include <media/v4l2-async.h> 27 #include <media/v4l2-ctrls.h> 28 #include <media/v4l2-device.h> 29 #include <media/v4l2-fwnode.h> [all …]
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H A D | tvp514x.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 * Karicheri Muralidharan <m-karicheri2@ti.com> 26 #include <linux/v4l2-mediabus.h> 30 #include <media/media-entity.h> 31 #include <media/v4l2-async.h> 32 #include <media/v4l2-common.h> 33 #include <media/v4l2-ctrls.h> 34 #include <media/v4l2-device.h> 35 #include <media/v4l2-fwnode.h> 36 #include <media/v4l2-mediabus.h> [all …]
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H A D | ths8200.c | 2 * ths8200 - Texas Instruments THS8200 video encoder driver 23 #include <linux/v4l2-dv-timings.h> 25 #include <media/v4l2-dv-timings.h> 26 #include <media/v4l2-async.h> 27 #include <media/v4l2-device.h> 33 MODULE_PARM_DESC(debug, "debug level (0-2)"); 41 struct v4l2_subdev sd; member 56 static inline struct ths8200_state *to_state(struct v4l2_subdev *sd) in to_state() argument 58 return container_of(sd, struct ths8200_state, sd); in to_state() 71 static int ths8200_read(struct v4l2_subdev *sd, u8 reg) in ths8200_read() argument [all …]
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/linux/arch/arm64/boot/dts/intel/ |
H A D | socfpga_n5x_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 29 sdram_edac: memory-controller@f87f8000 { 30 compatible = "snps,ddrc-3.80a"; 38 compatible = "intel,easic-n5x-clkmgr"; 43 phy-mode = "rgmii"; 44 phy-handle = <&phy0>; 46 max-frame-size = <9000>; 49 #address-cells = <1>; [all …]
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H A D | socfpga_agilex_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 23 compatible = "gpio-leds"; 53 phy-mode = "rgmii"; 54 phy-handle = <&phy0>; 56 max-frame-size = <9000>; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 compatible = "snps,dwmac-mdio"; [all …]
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/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-ast2600-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 /dts-v1/; 6 #include "aspeed-g6.dtsi" 7 #include <dt-bindings/gpio/aspeed-gpio.h> 11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600"; 26 reserved-memory { 27 #address-cells = <1>; 28 #size-cells = <1>; 34 compatible = "shared-dma-pool"; 41 compatible = "shared-dma-pool"; [all …]
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/linux/arch/arm64/boot/dts/altera/ |
H A D | socfpga_stratix10_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10"; 20 stdout-path = "serial0:115200n8"; 24 compatible = "gpio-leds"; 25 led-hps0 { 30 led-hps1 { 35 led-hps2 { 47 ref_033v: regulator-v-ref { 48 compatible = "regulator-fixed"; 49 regulator-name = "0.33V"; [all …]
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/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hi3670-hikey970.dts | 1 // SPDX-License-Identifier: GPL-2.0 10 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 14 #include "hikey970-pinctrl.dtsi" 15 #include "hikey970-pmic.dtsi" 19 compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670"; 34 stdout-path = "serial6:115200n8"; 43 wlan_en: wlan-en-1-8v { 44 compatible = "regulator-fixed"; 45 regulator-name = "wlan-en-regulator"; [all …]
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H A D | hi3660-hikey960.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 12 #include "hikey960-pinctrl.dtsi" 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 16 #include <dt-bindings/usb/pd.h> 20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; 35 stdout-path = "serial6:115200n8"; 44 reserved-memory { [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn-tqma8mqnl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 9 model = "TQ-Systems i.MX8MN TQMa8MxNL"; 10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn"; 18 /* e-MMC IO, needed for HS modes */ 19 reg_vcc1v8: regulator-vcc1v8 { 20 compatible = "regulator-fixed"; 21 regulator-name = "TQMA8MXNL_VCC1V8"; 22 regulator-min-microvolt = <1800000>; 23 regulator-max-microvolt = <1800000>; [all …]
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H A D | imx8mm-tqma8mqml.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML"; 11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 19 /* e-MMC IO, needed for HS modes */ 20 reg_vcc1v8: regulator-vcc1v8 { 21 compatible = "regulator-fixed"; 22 regulator-name = "TQMA8MXML_VCC1V8"; 23 regulator-min-microvolt = <1800000>; [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | dra7-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-evm-common.dtsi" 9 #include "dra74x-mmc-iodelay.dtsi" 13 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; 20 evm_12v0: fixedregulator-evm_12v0 { 22 compatible = "regulator-fixed"; 23 regulator-name = "evm_12v0"; 24 regulator-min-microvolt = <12000000>; [all …]
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