1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) 2024 Marek Vasut <marex@denx.de> 4 * 5 * DHCOR STM32MP13 variant: 6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG 7 * DHCOR PCB number: 718-100 or newer 8 * DHSBC PCB number: 719-100 or newer 9 */ 10 11/dts-v1/; 12 13#include <dt-bindings/regulator/st,stm32mp13-regulator.h> 14#include "stm32mp135.dtsi" 15#include "stm32mp13xf.dtsi" 16#include "stm32mp13xx-dhcor-som.dtsi" 17 18/ { 19 model = "DH electronics STM32MP135F DHCOR DHSBC"; 20 compatible = "dh,stm32mp135f-dhcor-dhsbc", 21 "dh,stm32mp135f-dhcor-som", 22 "st,stm32mp135"; 23 24 aliases { 25 ethernet0 = ðernet1; 26 ethernet1 = ðernet2; 27 serial2 = &usart1; 28 serial3 = &usart2; 29 }; 30 31 chosen { 32 stdout-path = "serial0:115200n8"; 33 }; 34}; 35 36&adc_1 { 37 pinctrl-names = "default"; 38 pinctrl-0 = <&adc1_pins_a &adc1_usb_cc_pins_b>; 39 vdda-supply = <&vdd_adc>; 40 vref-supply = <&vdd_adc>; 41 status = "okay"; 42 43 adc1: adc@0 { 44 status = "okay"; 45 46 /* 47 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in2 & in11. 48 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: 49 * 5 * (5.1 + 47kOhms) * 5pF => 1.3us. 50 * Use arbitrary margin here (e.g. 5us). 51 * 52 * The pinmux pins must be set as ANALOG, use datasheet 53 * DS13483 Table 7. STM32MP135C/F ball definitions to 54 * find out which 'pin name' maps to which 'additional 55 * functions', which lists the mapping between pin and 56 * ADC channel. In this case, PA5 maps to ADC1_INP2 and 57 * PF13 maps to ADC1_INP11 . 58 */ 59 channel@2 { 60 reg = <2>; 61 st,min-sample-time-ns = <5000>; 62 }; 63 64 channel@11 { 65 reg = <11>; 66 st,min-sample-time-ns = <5000>; 67 }; 68 69 /* Expansion connector: INP12:pin29 */ 70 channel@12 { 71 reg = <12>; 72 st,min-sample-time-ns = <5000>; 73 }; 74 }; 75}; 76 77ðernet1 { 78 nvmem-cell-names = "mac-address"; 79 nvmem-cells = <ðernet_mac1_address>; 80 phy-handle = <ðphy1>; 81 phy-mode = "rgmii-id"; 82 pinctrl-0 = <ð1_rgmii_pins_a>; 83 pinctrl-1 = <ð1_rgmii_sleep_pins_a>; 84 pinctrl-names = "default", "sleep"; 85 st,ext-phyclk; 86 status = "okay"; 87 88 mdio { 89 #address-cells = <1>; 90 #size-cells = <0>; 91 compatible = "snps,dwmac-mdio"; 92 93 ethphy1: ethernet-phy@1 { 94 /* RTL8211F */ 95 compatible = "ethernet-phy-id001c.c916"; 96 interrupt-parent = <&gpiog>; 97 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 98 reg = <1>; 99 realtek,clkout-disable; 100 reset-assert-us = <15000>; 101 reset-deassert-us = <55000>; 102 reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>; 103 104 leds { 105 #address-cells = <1>; 106 #size-cells = <0>; 107 108 led@0 { 109 reg = <0>; 110 color = <LED_COLOR_ID_GREEN>; 111 function = LED_FUNCTION_WAN; 112 linux,default-trigger = "netdev"; 113 }; 114 115 led@1 { 116 reg = <1>; 117 color = <LED_COLOR_ID_YELLOW>; 118 function = LED_FUNCTION_WAN; 119 linux,default-trigger = "netdev"; 120 }; 121 }; 122 }; 123 }; 124}; 125 126ðernet2 { 127 nvmem-cell-names = "mac-address"; 128 nvmem-cells = <ðernet_mac2_address>; 129 phy-handle = <ðphy2>; 130 phy-mode = "rgmii-id"; 131 pinctrl-0 = <ð2_rgmii_pins_a>; 132 pinctrl-1 = <ð2_rgmii_sleep_pins_a>; 133 pinctrl-names = "default", "sleep"; 134 st,ext-phyclk; 135 status = "okay"; 136 137 mdio { 138 #address-cells = <1>; 139 #size-cells = <0>; 140 compatible = "snps,dwmac-mdio"; 141 142 ethphy2: ethernet-phy@1 { 143 /* RTL8211F */ 144 compatible = "ethernet-phy-id001c.c916"; 145 interrupt-parent = <&gpiog>; 146 interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 147 reg = <1>; 148 realtek,clkout-disable; 149 reset-assert-us = <15000>; 150 reset-deassert-us = <55000>; 151 reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>; 152 153 leds { 154 #address-cells = <1>; 155 #size-cells = <0>; 156 157 led@0 { 158 reg = <0>; 159 color = <LED_COLOR_ID_GREEN>; 160 function = LED_FUNCTION_LAN; 161 linux,default-trigger = "netdev"; 162 }; 163 164 led@1 { 165 reg = <1>; 166 color = <LED_COLOR_ID_YELLOW>; 167 function = LED_FUNCTION_LAN; 168 linux,default-trigger = "netdev"; 169 }; 170 }; 171 }; 172 }; 173}; 174 175&gpioa { 176 gpio-line-names = "", "", "", "", 177 "", "DHSBC_USB_PWR_CC1", "", "", 178 "", "", "", "DHSBC_nETH1_RST", 179 "", "DHCOR_HW-CODING_0", "", ""; 180}; 181 182&gpiob { 183 gpio-line-names = "", "", "", "", 184 "", "", "", "DHCOR_BT_HOST_WAKE", 185 "", "", "", "", 186 "", "DHSBC_nTPM_CS", "", ""; 187}; 188 189&gpioc { 190 gpio-line-names = "", "", "", "DHSBC_USB_5V_MEAS", 191 "", "", "", "", 192 "", "", "", "", 193 "", "", "", ""; 194}; 195 196&gpiod { 197 gpio-line-names = "", "", "", "", 198 "", "DHCOR_RAM-CODING_0", "", "", 199 "", "DHCOR_RAM-CODING_1", "", "", 200 "", "", "", ""; 201}; 202 203&gpioe { 204 gpio-line-names = "", "", "", "", 205 "", "", "", "", 206 "", "DHSBC_nTPM_RST", "", "", 207 "DHSBC_nTPM_PIRQ", "", "DHCOR_WL_HOST_WAKE", ""; 208}; 209 210&gpiof { 211 gpio-line-names = "", "", "DHSBC_USB_PWR_nFLT", "", 212 "", "", "", "", 213 "", "", "", "", 214 "DHCOR_WL_REG_ON", "DHSBC_USB_PWR_CC2", "", ""; 215}; 216 217&gpiog { 218 gpio-line-names = "", "", "", "", 219 "", "", "", "", 220 "DHSBC_nETH2_RST", "DHCOR_BT_DEV_WAKE", "", "", 221 "DHSBC_ETH1_INTB", "", "", "DHSBC_ETH2_INTB"; 222}; 223 224&gpioi { 225 gpio-line-names = "DHCOR_RTC_nINT", "DHCOR_HW-CODING_1", 226 "DHCOR_BT_REG_ON", "DHCOR_PMIC_nINT", 227 "DHSBC_BOOT0", "DHSBC_BOOT1", 228 "DHSBC_BOOT2", "DHSBC_USB-C_DATA_VBUS"; 229}; 230 231&i2c1 { /* Expansion connector: SDA:pin27 SCL:pin28 */ 232 pinctrl-names = "default", "sleep"; 233 pinctrl-0 = <&i2c1_pins_a>; 234 pinctrl-1 = <&i2c1_sleep_pins_a>; 235 i2c-scl-rising-time-ns = <96>; 236 i2c-scl-falling-time-ns = <3>; 237 clock-frequency = <400000>; 238 status = "okay"; 239 /* spare dmas for other usage */ 240 /delete-property/dmas; 241 /delete-property/dma-names; 242}; 243 244&i2c5 { /* Expansion connector: SDA:pin3 SCL:pin5 */ 245 pinctrl-names = "default", "sleep"; 246 pinctrl-0 = <&i2c5_pins_b>; 247 pinctrl-1 = <&i2c5_sleep_pins_b>; 248 i2c-scl-rising-time-ns = <96>; 249 i2c-scl-falling-time-ns = <3>; 250 clock-frequency = <400000>; 251 status = "okay"; 252 /* spare dmas for other usage */ 253 /delete-property/dmas; 254 /delete-property/dma-names; 255}; 256 257&m_can1 { /* Expansion connector: TX:pin16 RX:pin18 */ 258 pinctrl-names = "default", "sleep"; 259 pinctrl-0 = <&m_can1_pins_a>; 260 pinctrl-1 = <&m_can1_sleep_pins_a>; 261 status = "okay"; 262}; 263 264&m_can2 { /* Expansion connector: TX:pin22 RX:pin26 */ 265 pinctrl-names = "default", "sleep"; 266 pinctrl-0 = <&m_can2_pins_a>; 267 pinctrl-1 = <&m_can2_sleep_pins_a>; 268 status = "okay"; 269}; 270 271&pwr_regulators { 272 vdd-supply = <&vdd>; 273 vdd_3v3_usbfs-supply = <&vdd_usb>; 274 status = "okay"; 275}; 276 277&sai1 { /* Expansion connector: SCK-A:pin12 FS-A:pin35 SD-A:pin38 SD-B:pin40 */ 278 clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>; 279 clock-names = "pclk", "x8k", "x11k"; 280 pinctrl-names = "default", "sleep"; 281 pinctrl-0 = <&sai1a_pins_a &sai1b_pins_a>; 282 pinctrl-1 = <&sai1a_sleep_pins_a &sai1b_sleep_pins_a>; 283}; 284 285&scmi_voltd { 286 status = "disabled"; 287}; 288 289&spi2 { 290 pinctrl-names = "default", "sleep"; 291 pinctrl-0 = <&spi2_pins_a>; 292 pinctrl-1 = <&spi2_sleep_pins_a>; 293 cs-gpios = <&gpiob 13 0>; 294 status = "okay"; 295 296 st33htph: tpm@0 { 297 compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; 298 reg = <0>; 299 spi-max-frequency = <24000000>; 300 }; 301}; 302 303&spi3 { /* Expansion connector: MOSI:pin19 MISO:pin21 SCK:pin22 nCS:pin24 */ 304 pinctrl-names = "default", "sleep"; 305 pinctrl-0 = <&spi3_pins_a>; 306 pinctrl-1 = <&spi3_sleep_pins_a>; 307 cs-gpios = <&gpiof 3 0>; 308 status = "disabled"; 309}; 310 311&timers5 { /* Expansion connector: CH3:pin31 */ 312 /delete-property/dmas; 313 /delete-property/dma-names; 314 status = "okay"; 315 316 pwm { 317 pinctrl-0 = <&pwm5_pins_a>; 318 pinctrl-1 = <&pwm5_sleep_pins_a>; 319 pinctrl-names = "default", "sleep"; 320 status = "okay"; 321 }; 322 timer@4 { 323 status = "okay"; 324 }; 325}; 326 327&timers13 { /* Expansion connector: CH1:pin32 */ 328 /delete-property/dmas; 329 /delete-property/dma-names; 330 status = "okay"; 331 332 pwm { 333 pinctrl-0 = <&pwm13_pins_a>; 334 pinctrl-1 = <&pwm13_sleep_pins_a>; 335 pinctrl-names = "default", "sleep"; 336 status = "okay"; 337 }; 338 timer@12 { 339 status = "okay"; 340 }; 341}; 342 343&usart1 { /* Expansion connector: RX:pin33 TX:pin37 */ 344 pinctrl-names = "default", "sleep", "idle"; 345 pinctrl-0 = <&usart1_pins_b>; 346 pinctrl-1 = <&usart1_sleep_pins_b>; 347 pinctrl-2 = <&usart1_idle_pins_b>; 348 status = "okay"; 349}; 350 351&usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */ 352 pinctrl-names = "default", "sleep", "idle"; 353 pinctrl-0 = <&usart2_pins_b>; 354 pinctrl-1 = <&usart2_sleep_pins_b>; 355 pinctrl-2 = <&usart2_idle_pins_b>; 356 uart-has-rtscts; 357 status = "okay"; 358}; 359 360&usbh_ehci { 361 phys = <&usbphyc_port0>; 362 status = "okay"; 363}; 364 365&usbh_ohci { 366 phys = <&usbphyc_port0>; 367 status = "okay"; 368}; 369 370&usbotg_hs { 371 dr_mode = "peripheral"; 372 phys = <&usbphyc_port1 0>; 373 phy-names = "usb2-phy"; 374 usb33d-supply = <&usb33>; 375 status = "okay"; 376}; 377 378&usbphyc { 379 status = "okay"; 380 vdda1v1-supply = <®11>; 381 vdda1v8-supply = <®18>; 382}; 383 384&usbphyc_port0 { 385 phy-supply = <&vdd_usb>; 386 st,current-boost-microamp = <1000>; 387 st,decrease-hs-slew-rate; 388 st,tune-hs-dc-level = <2>; 389 st,enable-hs-rftime-reduction; 390 st,trim-hs-current = <11>; 391 st,trim-hs-impedance = <2>; 392 st,tune-squelch-level = <1>; 393 st,enable-hs-rx-gain-eq; 394 st,no-hs-ftime-ctrl; 395 st,no-lsfs-sc; 396 connector { 397 compatible = "usb-a-connector"; 398 vbus-supply = <&vbus_sw>; 399 }; 400}; 401 402&usbphyc_port1 { 403 phy-supply = <&vdd_usb>; 404 st,current-boost-microamp = <1000>; 405 st,decrease-hs-slew-rate; 406 st,tune-hs-dc-level = <2>; 407 st,enable-hs-rftime-reduction; 408 st,trim-hs-current = <11>; 409 st,trim-hs-impedance = <2>; 410 st,tune-squelch-level = <1>; 411 st,enable-hs-rx-gain-eq; 412 st,no-hs-ftime-ctrl; 413 st,no-lsfs-sc; 414 connector { 415 compatible = "gpio-usb-b-connector", "usb-b-connector"; 416 vbus-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>; 417 label = "Type-C"; 418 self-powered; 419 type = "micro"; 420 }; 421}; 422