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12

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-phyboard-pollux-peb-av-10.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mp-pinfunc.h"
12 compatible = "pwm-backlight";
13 pinctrl-0 = <&pinctrl_lvds0>;
14 pinctrl-names = "default";
15 power-supply = <&reg_vcc_12v>;
19 panel_lvds0: panel-lvds0 {
21 power-supply = <&reg_vcc_3v3_sw>;
[all …]
H A Dimx8mn-bsh-smm-s2pro.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn-bsh-smm-s2-common.dtsi"
10 #include <dt-bindings/sound/tlv320aic31xx.h>
14 compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
21 sound-tlv320aic31xx {
22 compatible = "fsl,imx-audio-tlv320aic31xx";
23 model = "tlv320aic31xx-hifi";
24 audio-cpu = <&sai3>;
25 audio-codec = <&tlv320dac3101>;
[all …]
H A Dimx8mn-beacon-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include "imx8mn-beacon-som.dtsi"
10 #include "imx8mn-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
32 compatible = "regulator-fixed";
[all …]
H A Dimx8mm-beacon-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include "imx8mm-beacon-som.dtsi"
10 #include "imx8mm-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
32 compatible = "regulator-fixed";
[all …]
H A Dimx8mm-prt8mm.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/usb/pd.h>
17 stdout-path = &uart4;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpio_leds>;
30 debug-led0 {
33 linux,default-trigger = "heartbeat";
36 debug-led1 {
[all …]
H A Dimx943-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2024-2025 NXP
6 /dts-v1/;
11 compatible = "fsl,imx943-evk", "fsl,imx94";
23 bt_sco_codec: bt-sco-codec {
24 compatible = "linux,bt-sco";
25 #sound-dai-cells = <1>;
29 stdout-path = &lpuart1;
33 compatible = "dmic-codec";
34 #sound-dai-cells = <0>;
[all …]
H A Dimx8mq-mnt-reform2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2021 MNT Research GmbH
8 /dts-v1/;
10 #include "imx8mq-nitrogen-som.dtsi"
14 compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
15 chassis-type = "laptop";
18 compatible = "pwm-backlight";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_backlight>;
22 power-supply = <&reg_main_usb>;
[all …]
H A Dimx8mm-phyboard-polis-peb-av-10.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
12 compatible = "pwm-backlight";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_lcd>;
15 power-supply = <&reg_vdd_3v3_s>;
21 power-supply = <&reg_vcc_3v3>;
26 remote-endpoint = <&bridge_out>;
[all …]
H A Dimx8mp-verdin-dahlia.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 native-hdmi-connector {
8 compatible = "hdmi-connector";
14 remote-endpoint = <&hdmi_tx_out>;
20 compatible = "simple-audio-card";
21 simple-audio-card,bitclock-master = <&codec_dai>;
22 simple-audio-card,format = "i2s";
23 simple-audio-card,frame-master = <&codec_dai>;
24 simple-audio-card,mclk-fs = <256>;
25 simple-audio-card,name = "verdin-wm8904";
[all …]
H A Dimx8mp-verdin-dev.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 native-hdmi-connector {
8 compatible = "hdmi-connector";
14 remote-endpoint = <&hdmi_tx_out>;
19 reg_eth2phy: regulator-eth2phy {
20 compatible = "regulator-fixed";
21 enable-active-high;
23 off-on-delay-us = <500000>;
24 regulator-max-microvolt = <3300000>;
25 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx95-19x19-verdin-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/usb/pd.h>
15 #define BRD_SM_CTRL_SD3_WAKE 0x8000 /* PCAL6408A-0 */
16 #define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /* PCAL6408A-4 */
17 #define BRD_SM_CTRL_BT_WAKE 0x8002 /* PCAL6408A-5 */
18 #define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /* PCAL6408A-6 */
19 #define BRD_SM_CTRL_BUTTON 0x8004 /* PCAL6408A-7 */
23 compatible = "toradex,verdin-imx95-19x19-evk", "fsl,imx95";
48 stdout-path = &lpuart1;
[all …]
H A Dimx8mp-toradex-smarc-dev.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 /dts-v1/;
6 #include <dt-bindings/pwm/pwm.h>
8 #include "imx8mp-toradex-smarc.dtsi"
12 compatible = "toradex,smarc-imx8mp-dev",
13 "toradex,smarc-imx8mp",
16 hdmi-connector {
17 compatible = "hdmi-connector";
23 remote-endpoint = <&hdmi_tx_out>;
28 reg_carrier_1p8v: regulator-carrier-1p8v {
[all …]
H A Dimx8mp-msc-sm2s-ep1.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "imx8mp-msc-sm2s-14N0600E.dtsi"
9 #include <dt-bindings/clock/imx8mp-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
13 model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM";
14 compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",
15 "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",
18 reg_vcc_3v3_audio: 3v3-audio-regulator {
19 compatible = "regulator-fixed";
[all …]
H A Dimx8mp-beacon-kit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include "imx8mp-beacon-som.dtsi"
15 compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
23 stdout-path = &uart2;
26 clk_xtal25: clock-xtal25 {
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
[all …]
H A Dimx93-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
12 model = "Variscite VAR-SOM-MX93 module";
13 compatible = "variscite,var-som-mx93", "fsl,imx93";
16 compatible = "simple-audio-card";
17 simple-audio-card,bitclock-master = <&codec_dai>;
18 simple-audio-card,format = "i2s";
19 simple-audio-card,frame-master = <&codec_dai>;
20 simple-audio-card,name = "wm8904-audio";
21 simple-audio-card,routing =
[all …]
H A Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
[all …]
H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvds {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 100>;
23 num-interpolated-steps = <100>;
24 default-brightness-level = <100>;
[all …]
H A Dimx91-phyboard-segin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * phyBOARD-Segin carrier board is reused for the i.MX91 design.
8 * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/
10 /dts-v1/;
12 #include "imx91-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Segin-i.MX91";
16 compatible = "phytec,imx91-phyboard-segin", "phytec,imx91-phycore-som",
35 stdout-path = &lpuart1;
38 flexcan1_tc: can-phy0 {
39 /* TI SN65HVD234D CAN-CC 1MBit/s */
[all …]
H A Dimx93-phyboard-segin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * phyBOARD-Segin carrier board is reused for the i.MX93 design.
9 * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/
11 /dts-v1/;
13 #include "imx93-phycore-som.dtsi"
16 model = "PHYTEC phyBOARD-Segin-i.MX93";
17 compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
36 stdout-path = &lpuart1;
39 flexcan1_tc: can-phy0 {
41 #phy-cells = <0>;
[all …]
H A Dimx95-19x19-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/usb/pd.h>
15 #define BRD_SM_CTRL_SD3_WAKE 0x8000 /* PCAL6408A-0 */
16 #define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /* PCAL6408A-4 */
17 #define BRD_SM_CTRL_BT_WAKE 0x8002 /* PCAL6408A-5 */
18 #define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /* PCAL6408A-6 */
19 #define BRD_SM_CTRL_BUTTON 0x8004 /* PCAL6408A-7 */
23 compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
[all …]
/linux/sound/soc/fsl/
H A Dfsl_sai.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Freescale ALSA SoC Digital Audio Interface (SAI) driver.
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
22 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
26 #include "imx-pcm.h"
44 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
46 * SAI supports synchronous mode using bit/frame clocks of either Transmitter's
50 * @sai: SAI context
51 * @dir: stream direction
53 static inline bool fsl_sai_dir_is_synced(struct fsl_sai *sai, int dir) in fsl_sai_dir_is_synced() argument
[all …]
/linux/sound/soc/codecs/
H A Dml26124.c1 // SPDX-License-Identifier: GPL-2.0-only
35 u32 mclk; member
43 u32 mclk; member
53 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7150, 50, 0);
55 static const DECLARE_TLV_DB_SCALE(alclvl, -2250, 150, 0);
56 static const DECLARE_TLV_DB_SCALE(mingain, -1200, 600, 0);
57 static const DECLARE_TLV_DB_SCALE(maxgain, -67
313 get_coeff(int mclk,int rate) get_coeff() argument
375 ml26124_mute(struct snd_soc_dai * dai,int mute,int direction) ml26124_mute() argument
[all...]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul-var-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite VAR-SOM-MX6UL Module
9 /dts-v1/;
12 #include <dt-bindings/clock/imx6ul-clock.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Variscite VAR-SOM-MX6UL module";
17 compatible = "variscite,var-som-imx6ul", "fsl,imx6ul";
24 reg_gpio_dvfs: reg-gpio-dvfs {
25 compatible = "regulator-gpio";
26 regulator-min-microvolt = <1300000>;
[all …]
H A Dimx6ul-phytec-segin.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite";
9 compatible = "phytec,imx6ul-pbacd-10", "phytec,imx6ul-pcl063", "fsl,imx6ul";
16 reg_sound_1v8: regulator-1v8 {
17 compatible = "regulator-fixed";
18 regulator-name = "i2s-audio-1v8";
19 regulator-min-microvolt = <1800000>;
20 regulator-max-microvolt = <1800000>;
24 reg_sound_3v3: regulator-3v3 {
25 compatible = "regulator-fixed";
[all …]
H A Dimx6ul-14x14-evk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/media/video-interfaces.h>
9 stdout-path = &uart1;
17 backlight_display: backlight-display {
18 compatible = "pwm-backlight";
20 brightness-levels = <0 4 8 16 32 64 128 255>;
21 default-brightness-level = <6>;
25 reg_1v5: regulator-1v5 {
26 compatible = "regulator-fixed";
27 regulator-name = "1v5";
[all …]

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