Home
last modified time | relevance | path

Searched +full:sa8775p +full:- +full:gcc (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sa8775p-videocc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-videocc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Video Clock & Reset Controller on SA8775P
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SA8775P.
16 See also: include/dt-bindings/clock/qcom,sa8775p-videocc.h
21 - qcom,qcs8300-videocc
22 - qcom,sa8775p-videocc
[all …]
H A Dqcom,sa8775p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on sa8775p
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
14 power domains on sa8775p.
16 See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h
20 const: qcom,sa8775p-gcc
24 - description: XO reference clock
[all …]
H A Dqcom,sa8775p-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SA8775P
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SA8775P.
16 See also: include/dt-bindings/clock/qcom,sa8775p-dispcc.h
21 - qcom,sa8775p-dispcc0
22 - qcom,sa8775p-dispcc1
[all …]
H A Dqcom,sa8775p-camcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-camcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SA8775P
10 - Taniya Das <quic_tdas@quicinc.com>
11 - Imran Shaik <quic_imrashai@quicinc.com>
15 domains on SA8775p.
18 include/dt-bindings/clock/qcom,qcs8300-camcc.h
19 include/dt-bindings/clock/qcom,sa8775p-camcc.h
[all …]
H A Dqcom,gpucc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
11 - Imran Shaik <quic_imrashai@quicinc.com>
18 include/dt-bindings/clock/qcom,gpucc-sdm845.h
19 include/dt-bindings/clock/qcom,gpucc-sa8775p.h
20 include/dt-bindings/clock/qcom,gpucc-sc7180.h
21 include/dt-bindings/clock/qcom,gpucc-sc7280.h
22 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sa8775p.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SA8775p PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SA8775p SoC PCIe root complex controller is based on the Synopsys
19 const: qcom,pcie-sa8775p
25 reg-names:
[all …]
H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sa8775p-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sa8775p-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mahadevan <quic_mahap@quicinc.com>
13 SA8775P MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sa8775p-mdss
24 - description: Display AHB
25 - description: Display hf AXI
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dqcom,ethqos.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
18 - $ref: snps,dwmac.yaml#
23 - items:
24 - enum:
25 - qcom,qcs615-ethqos
26 - const: qcom,qcs404-ethqos
[all …]
/linux/drivers/clk/qcom/
H A Dgcc-sa8775p.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021-2022, 2024, Qualcomm Innovation Center, Inc. All rights reserved.
7 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-rcg.h"
19 #include "clk-regmap.h"
20 #include "clk-regmap-divider.h"
21 #include "clk-regmap-mux.h"
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-usb.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
22 #include "phy-qcom-qmp-common.h"
24 #include "phy-qcom-qmp.h"
25 #include "phy-qcom-qmp-pcs-misc-v3.h"
26 #include "phy-qcom-qmp-pcs-misc-v4.h"
27 #include "phy-qcom-qmp-pcs-usb-v4.h"
28 #include "phy-qcom-qmp-pcs-usb-v5.h"
29 #include "phy-qcom-qmp-pcs-usb-v6.h"
30 #include "phy-qcom-qmp-pcs-usb-v7.h"
[all …]