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Searched +full:rst +full:- +full:mgr (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/devicetree/bindings/reset/
H A Daltr,rst-mgr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dinh Nguyen <dinguyen@kernel.org>
15 - description: Cyclone5/Arria5/Arria10
16 const: altr,rst-mgr
17 - description: Stratix10 ARM64 SoC
19 - const: altr,stratix10-rst-mgr
20 - const: altr,rst-mgr
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/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
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H A Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
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/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
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/linux/Documentation/devicetree/bindings/fpga/
H A Daltera-socfpga-a10-fpga-mgr.txt4 - compatible : should contain "altr,socfpga-a10-fpga-mgr"
5 - reg : base address and size for memory mapped io.
6 - The first index is for FPGA manager register access.
7 - The second index is for writing FPGA configuration data.
8 - resets : Phandle and reset specifier for the device's reset.
9 - clocks : Clocks used by the device.
13 fpga_mgr: fpga-mgr@ffd03000 {
14 compatible = "altr,socfpga-a10-fpga-mgr";
18 resets = <&rst FPGAMGR_RESET>;
H A Daltr,socfpga-hps2fpga-bridge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yilun <yilun.xu@intel.com>
13 - $ref: fpga-bridge.yaml#
18 - altr,socfpga-lwhps2fpga-bridge
19 - altr,socfpga-hps2fpga-bridge
20 - altr,socfpga-fpga2hps-bridge
32 - compatible
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/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
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H A Dsocfpga.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/reset/altr,rst-mgr.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "altr,socfpga-smp";
27 compatible = "arm,cortex-a9";
30 next-level-cache = <&L2>;
33 compatible = "arm,cortex-a9";
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/linux/drivers/reset/
H A Dreset-socfpga.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copied from reset-sunxi.c
13 #include <linux/reset-controller.h>
14 #include <linux/reset/reset-simple.h>
32 return -ENOMEM; in a10_reset_init()
39 if (!request_mem_region(res.start, size, np->name)) { in a10_reset_init()
40 ret = -EBUSY; in a10_reset_init()
44 data->membase = ioremap(res.start, size); in a10_reset_init()
45 if (!data->membase) { in a10_reset_init()
46 ret = -ENOMEM; in a10_reset_init()
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H A Dreset-a10sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Adapted from reset-socfpga.c
11 #include <linux/mfd/altera-a10sr.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
40 return -EINVAL; in a10sr_reset_shift()
52 return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask); in a10sr_reset_update()
77 ret = regmap_read(a10r->regmap, index, &value); in a10sr_reset_status()
92 struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent); in a10sr_reset_probe()
95 a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset), in a10sr_reset_probe()
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H A Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
49 spin_unlock_irqrestore(&data->lock, flags); in reset_simple_update()
72 if (!data->reset_us) in reset_simple_reset()
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/linux/arch/arm/mach-socfpga/
H A Dsocfpga.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2015 Altera Corporation
26 np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); in socfpga_sysmgr_init()
28 if (of_property_read_u32(np, "cpu1-start-addr", in socfpga_sysmgr_init()
30 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); in socfpga_sysmgr_init()
38 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); in socfpga_sysmgr_init()
41 np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); in socfpga_sysmgr_init()
108 "altr,socfpga-arria10",
/linux/include/dt-bindings/reset/
H A Daltr,rst-mgr-a10sr.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Adapted from altr,rst-mgr-a10.h
H A Daltr,rst-mgr-s10.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h"
71 /* 82-87 is empty */
90 /* 164-167 is empty */
/linux/Documentation/devicetree/bindings/net/can/
H A Dbosch,c_can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Dario Binacchi <dariobin@libero.it>
15 - $ref: can-controller.yaml#
20 - enum:
21 - bosch,c_can
22 - bosch,d_can
23 - ti,dra7-d_can
24 - ti,am3352-d_can
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/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/
H A Ddr_types.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
26 #define mlx5dr_err(dmn, arg...) mlx5_core_err((dmn)->mdev, ##arg)
27 #define mlx5dr_info(dmn, arg...) mlx5_core_info((dmn)->mdev, ##arg)
28 #define mlx5dr_dbg(dmn, arg...) mlx5_core_dbg((dmn)->mdev, ##arg)
94 DR_STE_SIZE_REDUCED = DR_STE_SIZE - DR_STE_SIZE_MASK,
237 htbl->refcount--; in mlx5dr_htbl_put()
238 if (!htbl->refcount) in mlx5dr_htbl_put()
244 htbl->refcount++; in mlx5dr_htbl_get()
359 ste->refcount--; in mlx5dr_ste_put()
360 if (!ste->refcount) in mlx5dr_ste_put()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
74 F: Documentation/networking/device_drivers/ethernet/3com/vortex.rst
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
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/linux/drivers/scsi/fnic/
H A Dfnic_scsi.c1 // SPDX-License-Identifier: GPL-2.0-only
97 * also unmap and free the device-private scatter/gather list.
103 if (io_req->sgl_list_pa) in fnic_release_ioreq_buf()
104 dma_unmap_single(&fnic->pdev->dev, io_req->sgl_list_pa, in fnic_release_ioreq_buf()
105 sizeof(io_req->sgl_list[0]) * io_req->sgl_cnt, in fnic_release_ioreq_buf()
109 if (io_req->sgl_cnt) in fnic_release_ioreq_buf()
110 mempool_free(io_req->sgl_list_alloc, in fnic_release_ioreq_buf()
111 fnic->io_sgl_pool[io_req->sgl_type]); in fnic_release_ioreq_buf()
112 if (io_req->sense_buf_pa) in fnic_release_ioreq_buf()
113 dma_unmap_single(&fnic->pdev->dev, io_req->sense_buf_pa, in fnic_release_ioreq_buf()
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/linux/security/selinux/
H A Dhooks.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Security-Enhanced Linux (SELinux) security module
13 * Copyright (C) 2003-2008 Red Hat, Inc., James Morris <jmorris@redhat.com>
15 * Copyright (C) 2004-2005 Trusted Computer Solutions, Inc.
17 * Copyright (C) 2006, 2007, 2009 Hewlett-Packard Development Company, L.P.
18 * Paul Moore <paul@paul-moore.com>
82 #include <linux/posix-timers.h>
156 * selinux_secmark_enabled - Check to see if SECMARK is currently enabled
173 * selinux_peerlbl_enabled - Check to see if peer labeling is currently enabled
216 tsec = selinux_cred(unrcu_pointer(current->real_cred)); in cred_init_security()
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