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12

/linux/drivers/gpu/drm/amd/include/ivsrcid/dcn/
H A Dirqsrcs_dcn_1_0.h192 #define DCN_1_0__SRCID__DC_DAC_A_AUTO_DET 0xA // DAC A auto - detection DACA_AUTODETECT_GEN…
309 #define DCN_1_0__SRCID__DC_DIGA_FAST_TRAINING_COMPLETE_INT 0xF // DIGA - Fast Training Complete…
312 #define DCN_1_0__SRCID__DC_DIGB_FAST_TRAINING_COMPLETE_INT 0xF // DIGB - Fast Training Complete…
315 #define DCN_1_0__SRCID__DC_DIGC_FAST_TRAINING_COMPLETE_INT 0xF // DIGC - Fast Training Complete…
318 #define DCN_1_0__SRCID__DC_DIGD_FAST_TRAINING_COMPLETE_INT 0xF // DIGD - Fast Training Complete…
321 #define DCN_1_0__SRCID__DC_DIGE_FAST_TRAINING_COMPLETE_INT 0xF // DIGE - Fast Training Complete…
324 #define DCN_1_0__SRCID__DC_DIGF_FAST_TRAINING_COMPLETE_INT 0xF // DIGF - Fast Training Complete…
468 …latch_int 0x15 // an interrupt that is triggered when the time(number of refclk cycles) of a progr…
471 …latch_int 0x15 // an interrupt that is triggered when the time(number of refclk cycles) of a progr…
474 …latch_int 0x15 // an interrupt that is triggered when the time(number of refclk cycles) of a progr…
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3528-naneng-combphy
16 - rockchip,rk3562-naneng-combphy
17 - rockchip,rk3568-naneng-combphy
18 - rockchip,rk3576-naneng-combphy
19 - rockchip,rk3588-naneng-combphy
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-mnt-reform2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2021 MNT Research GmbH
8 /dts-v1/;
10 #include "imx8mq-nitrogen-som.dtsi"
14 compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq";
15 chassis-type = "laptop";
18 compatible = "pwm-backlight";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_backlight>;
22 power-supply = <&reg_main_usb>;
[all …]
H A Dimx8mp-venice-gw75xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 led-controller {
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
20 default-state = "on";
[all …]
H A Dimx8mp-prt8ml.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
16 stdout-path = &uart4;
19 pcie_refclk: pcie0-refclk {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <100000000>;
25 pcie_refclk_oe: pcie0-refclk-oe {
26 compatible = "gpio-gate-clock";
27 pinctrl-names = "default";
[all …]
H A Dimx8mm-venice-gw75xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 led-controller {
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
20 default-state = "on";
[all …]
H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
H A Dimx8mm-venice-gw7904.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
25 stdout-path = &uart2;
33 gpio-keys {
34 compatible = "gpio-keys";
[all …]
H A Dimx8mm-venice-gw7903.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm";
27 stdout-path = &uart2;
35 gpio-keys {
36 compatible = "gpio-keys";
[all …]
H A Dimx8mm-venice-gw7901.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
32 stdout-path = &uart2;
40 gpio-keys {
41 compatible = "gpio-keys";
[all …]
H A Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
29 stdout-path = &uart2;
38 compatible = "fixed-clock";
[all …]
H A Dimx8mp-venice-gw74xx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/net/ti-dp83867.h>
18 compatible = "gateworks,imx8mp-gw74xx", "fsl,imx8mp";
33 stdout-path = &uart2;
42 pinctrl-names = "default";
[all …]
H A Dimx8mq-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
30 reg_pcie1: regulator-pcie {
[all …]
H A Dimx8mm-verdin.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
7 #include <dt-bindings/pwm/pwm.h>
9 #include "imx8mm-overdrive.dtsi"
13 stdout-path = &uart1;
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <40000000>;
28 gpio-keys {
29 compatible = "gpio-keys";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-bosch-acc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Support for the i.MX6-based Bosch ACC board.
8 * Copyright (C) 2019-2021 Bosch Thermotechnik GmbH, Matthias Winker <matthias.winker@bosch.com>
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/leds/common.h>
20 compatible = "bosch,imx6q-acc", "fsl,imx6q";
37 backlight_lvds: backlight-lvds {
38 compatible = "pwm-backlight";
40 brightness-levels = <0 61 499 1706 4079 8022 13938 22237 33328 47623 65535>;
[all …]
H A Dimx6qdl-icore-rqs.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/imx6qdl-clock.h>
9 #include <dt-bindings/sound/fsl-imx-audmux.h>
17 reg_1p8v: regulator-1p8v {
18 compatible = "regulator-fixed";
19 regulator-name = "1P8V";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
22 regulator-boot-on;
[all …]
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c31 * TODO - The reason link owns stream's dpms programming sequence is
84 for (i = 0; i < dc->link_count; i++) { in link_blank_all_dp_displays()
85 if ((dc->links[i]->connector_signal != SIGNAL_TYPE_DISPLAY_PORT) || in link_blank_all_dp_displays()
86 (dc->links[i]->priv == NULL) || (dc->links[i]->local_sink == NULL)) in link_blank_all_dp_displays()
90 dp_retrieve_lttpr_cap(dc->links[i]); in link_blank_all_dp_displays()
92 status = core_link_read_dpcd(dc->links[i], DP_SET_POWER, in link_blank_all_dp_displays()
96 link_blank_dp_stream(dc->links[i], true); in link_blank_all_dp_displays()
107 for (i = 0; i < dc->link_count; i++) { in link_blank_all_edp_displays()
108 if ((dc->links[i]->connector_signal != SIGNAL_TYPE_EDP) || in link_blank_all_edp_displays()
109 (!dc->links[i]->edp_sink_present)) in link_blank_all_edp_displays()
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam57xx-idk-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6 #include "am57xx-industrial-grade.dtsi"
16 stdout-path = &uart3;
19 vmain: fixedregulator-vmain {
20 compatible = "regulator-fixed";
21 regulator-name = "VMAIN";
22 regulator-min-microvolt = <5000000>;
23 regulator-max-microvolt = <5000000>;
24 regulator-always-on;
[all …]
H A Dam437x-gp-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/pinctrl/am43xx.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
24 stdout-path = &uart0;
27 evm_v3_3d: fixedregulator-v3_3d {
28 compatible = "regulator-fixed";
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
[all …]
H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
[all …]
H A Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 cpsw_mac_syscon: ethernet-mac-syscon@200 {
16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
21 compatible = "ti,am654-phy-gmii-sel";
23 #phy-cells = <1>;
29 compatible = "pinctrl-single";
[all …]
/linux/drivers/phy/cadence/
H A Dphy-cadence-sierra.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
24 #include <dt-bindings/phy/phy-cadence.h>
417 u32 offset = reg << ctx->reg_offset_shift; in cdns_regmap_write()
419 writew(val, ctx->base + offset); in cdns_regmap_write()
427 u32 offset = reg << ctx->reg_offset_shift; in cdns_regmap_read()
429 *val = readw(ctx->base + offset); in cdns_regmap_read()
544 struct cdns_sierra_phy *phy = dev_get_drvdata(gphy->dev.parent); in cdns_sierra_phy_init()
545 const struct cdns_sierra_data *init_data = phy->init_data; in cdns_sierra_phy_init()
[all …]

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