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Searched +full:r9a09g057 +full:- +full:cpg (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/reset/
H A Drenesas,rzv2h-usb2phy-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
19 - items:
20 - const: renesas,r9a09g056-usb2phy-reset # RZ/V2N
21 - const: renesas,r9a09g057-usb2phy-reset
23 - const: renesas,r9a09g057-usb2phy-reset # RZ/V2H(P)
34 power-domains:
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/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,rzv2h-cpg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/{G3E,V2H(P),V2N} Clock Pulse Generator (CPG)
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
13 On Renesas RZ/{G3E,V2H(P),V2N} SoCs, the CPG (Clock Pulse Generator) handles
21 - renesas,r9a09g047-cpg # RZ/G3E
22 - renesas,r9a09g056-cpg # RZ/V2N
23 - renesas,r9a09g057-cpg # RZ/V2H
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/linux/Documentation/devicetree/bindings/spi/
H A Drenesas,rzv2h-rspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,rzv2h-rspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
13 - $ref: spi-controller.yaml#
17 const: renesas,r9a09g057-rspi # RZ/V2H(P)
24 - description: Idle Interrupt
25 - description: Error Interrupt
26 - description: Communication End Interrupt
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/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas,r9a09g057-sys.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - Trust zone control
16 - Extend access by specific masters to address beyond 4GB space
17 - GBETH configuration
18 - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
19 - LSI version
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/linux/Documentation/devicetree/bindings/mmc/
H A Drenesas,sdhi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
15 - enum:
16 - renesas,sdhi-mmc-r8a77470 # RZ/G1C
17 - renesas,sdhi-r7s72100 # RZ/A1H
18 - renesas,sdhi-r7s9210 # SH-Mobile AG5
19 - renesas,sdhi-r8a73a4 # R-Mobile APE6
20 - renesas,sdhi-r8a7740 # R-Mobile A1
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/linux/Documentation/devicetree/bindings/dma/
H A Drenesas,rz-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
15 - items:
16 - enum:
17 - renesas,r7s72100-dmac # RZ/A1H
18 - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
19 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
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/linux/Documentation/devicetree/bindings/serial/
H A Drenesas,scif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,scif-r7s72100 # RZ/A1H
18 - const: renesas,scif # generic SCIF compatible UART
20 - items:
21 - enum:
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/linux/Documentation/devicetree/bindings/watchdog/
H A Drenesas,wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - items:
17 - enum:
18 - renesas,r7s72100-wdt # RZ/A1
19 - renesas,r7s9210-wdt # RZ/A2
20 - const: renesas,rza-wdt # RZ/A
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/linux/Documentation/devicetree/bindings/phy/
H A Drenesas,usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 2.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - enum:
17 - renesas,usb2-phy-r8a77470 # RZ/G1C
18 - renesas,usb2-phy-r9a08g045 # RZ/G3S
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rzg2l-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drenesas,rzg3e-xspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
14 the memory-mapping or the manual command mode.
19 - "jedec,spi-nor";
22 - $ref: /schemas/spi/spi-controller.yaml#
27 - const: renesas,r9a09g047-xspi # RZ/G3E
29 - items:
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/linux/drivers/clk/renesas/
H A Drzv2h-cpg.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on rzg2l-cpg.c
16 #include <linux/clk-provider.h>
27 #include <linux/reset-controller.h>
30 #include <dt-bindings/clock/renesas-cpg-mssr.h>
32 #include "rzv2h-cpg.h"
46 #define CPG_BUS_MSTOP(m) (CPG_BUS_1_MSTOP + ((m) - 1) * 4)
69 * struct rzv2h_cpg_priv - Clock Pulse Generator Private Data
71 * @dev: CPG device
72 * @base: CPG register block base address
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H A Dr9a09g057-cpg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RZ/V2H(P) CPG driver
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
15 #include "rzv2h-cpg.h"
/linux/drivers/watchdog/
H A Drzv2h_wdt.c1 // SPDX-License-Identifier: GPL-2.0
83 * The down-counter is refreshed and starts counting operation on in rzv2h_wdt_ping()
86 writeb(0x0, priv->base + WDTRR); in rzv2h_wdt_ping()
87 writeb(0xFF, priv->base + WDTRR); in rzv2h_wdt_ping()
94 u32 reg = readl(priv->wdtdcr + WDTDCR); in rzt2h_wdt_wdtdcr_count_stop()
96 writel(reg | WDTDCR_WDTSTOPCTRL, priv->wdtdcr + WDTDCR); in rzt2h_wdt_wdtdcr_count_stop()
101 u32 reg = readl(priv->wdtdcr + WDTDCR); in rzt2h_wdt_wdtdcr_count_start()
103 writel(reg & ~WDTDCR_WDTSTOPCTRL, priv->wdtdcr + WDTDCR); in rzt2h_wdt_wdtdcr_count_start()
111 writew(wdtcr, priv->base + WDTCR); in rzv2h_wdt_setup()
114 writeb(0, priv->base + WDTRCR); in rzv2h_wdt_setup()
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