Home
last modified time | relevance | path

Searched +full:r9a09g057 +full:- +full:cpg (Results 1 – 18 of 18) sorted by relevance

/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g057.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "renesas,r9a09g057";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
[all …]
H A Dr9a09g047.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
30 cluster0_opp: opp-table-0 {
[all …]
H A Dr9a09g056.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
31 #address-cells = <2>;
32 #size-cells = <2>;
34 audio_extal_clk: audio-clk {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
H A Dr9a08g045.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a08g045-cpg.h>
10 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 audio_clk1: audio1-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Drenesas,rzv2h-usb2phy-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
18 const: renesas,r9a09g057-usb2phy-reset # RZ/V2H(P)
29 power-domains:
32 '#reset-cells':
36 - compatible
37 - reg
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,rzv2h-cpg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/{G3E,V2H(P),V2N} Clock Pulse Generator (CPG)
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
13 On Renesas RZ/{G3E,V2H(P),V2N} SoCs, the CPG (Clock Pulse Generator) handles
21 - renesas,r9a09g047-cpg # RZ/G3E
22 - renesas,r9a09g056-cpg # RZ/V2N
23 - renesas,r9a09g057-cpg # RZ/V2H
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Drenesas,sdhi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
15 - enum:
16 - renesas,sdhi-mmc-r8a77470 # RZ/G1C
17 - renesas,sdhi-r7s72100 # RZ/A1H
18 - renesas,sdhi-r7s9210 # SH-Mobile AG5
19 - renesas,sdhi-r8a73a4 # R-Mobile APE6
20 - renesas,sdhi-r8a7740 # R-Mobile A1
[all …]
/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas,r9a09g057-sys.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - Trust zone control
16 - Extend access by specific masters to address beyond 4GB space
17 - GBETH configuration
18 - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
19 - LSI version
[all …]
/linux/Documentation/devicetree/bindings/watchdog/
H A Drenesas,wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - items:
17 - enum:
18 - renesas,r7s72100-wdt # RZ/A1
19 - renesas,r7s9210-wdt # RZ/A2
20 - const: renesas,rza-wdt # RZ/A
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Drenesas,fcp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Frame Compression Processor (FCP)
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 R-Car Gen3 and RZ/G2 SoCs. It provides data compression and decompression,
25 - enum:
26 - renesas,fcpv # FCP for VSP
27 - renesas,fcpf # FCP for FDP
28 - items:
[all …]
H A Drenesas,vsp1.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 The VSP is a video processing engine that supports up-/down-scaling, alpha
15 It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs.
20 - enum:
21 - renesas,r9a07g044-vsp2 # RZ/G2L
22 - renesas,vsp1 # R-Car Gen2 and RZ/G1
23 - renesas,vsp2 # R-Car Gen3 and RZ/G2
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Drenesas,rz-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
15 - items:
16 - enum:
17 - renesas,r7s72100-dmac # RZ/A1H
18 - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
19 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drenesas,usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car generation 3 USB 2.0 PHY
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - enum:
17 - renesas,usb2-phy-r8a77470 # RZ/G1C
18 - renesas,usb2-phy-r9a08g045 # RZ/G3S
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rzg2l-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
[all …]
/linux/drivers/clk/renesas/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o
4 obj-$(CONFIG_CLK_RZA1) += clk-rz.o
5 obj-$(CONFIG_CLK_R7S9210) += r7s9210-cpg-mssr.o
6 obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o
7 obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o
8 obj-$(CONFIG_CLK_R8A7742) += r8a7742-cpg-mssr.o
9 obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o
10 obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o
11 obj-$(CONFIG_CLK_R8A77470) += r8a77470-cpg-mssr.o
[all …]
H A Drzv2h-cpg.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on rzg2l-cpg.c
16 #include <linux/clk-provider.h>
27 #include <linux/reset-controller.h>
30 #include <dt-bindings/clock/renesas-cpg-mssr.h>
32 #include "rzv2h-cpg.h"
46 #define CPG_BUS_MSTOP(m) (CPG_BUS_1_MSTOP + ((m) - 1) * 4)
69 * struct rzv2h_cpg_priv - Clock Pulse Generator Private Data
71 * @dev: CPG device
72 * @base: CPG register block base address
[all …]
H A Dr9a09g057-cpg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RZ/V2H(P) CPG driver
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
15 #include "rzv2h-cpg.h"
/linux/Documentation/devicetree/bindings/usb/
H A Drenesas,usbhs.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas USBHS (HS-USB) controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - items:
16 - const: renesas,usbhs-r7s72100 # RZ/A1
17 - const: renesas,rza1-usbhs
19 - items:
20 - enum:
[all …]