/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs.dtsi | 217 interrupt-parent = <&plic>; 231 plic: interrupt-controller@c000000 { label 232 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 248 interrupt-parent = <&plic>; 299 interrupt-parent = <&plic>; 311 interrupt-parent = <&plic>; 323 interrupt-parent = <&plic>; 335 interrupt-parent = <&plic>; 347 interrupt-parent = <&plic>; 358 interrupt-parent = <&plic>; [all …]
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H A D | mpfs-icicle-kit-fabric.dtsi | 23 interrupt-parent = <&plic>; 38 interrupt-parent = <&plic>;
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H A D | mpfs-m100pfs-fabric.dtsi | 26 interrupt-parent = <&plic>;
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H A D | mpfs-polarberry-fabric.dtsi | 26 interrupt-parent = <&plic>;
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/linux/drivers/irqchip/ |
H A D | irq-sifive-plic.c | 6 #define pr_fmt(fmt) "riscv-plic: " fmt 25 * This driver implements a version of the RISC-V PLIC with the actual layout 30 * The largest number supported by devices marked as 'sifive,plic-1.0.0', is 194 .name = "SiFive PLIC", 209 .name = "SiFive PLIC", 427 { .compatible = "sifive,plic-1.0.0" }, 431 { .compatible = "thead,c900-plic", 460 pr_err("%pfwP: no PLIC context available\n", fwnode); in plic_parse_nr_irqs_and_contexts() 475 pr_err("%pfwP: no PLIC context available\n", fwnode); in plic_parse_nr_irqs_and_contexts() 650 * We can have multiple PLIC instances so setup global state in plic_probe() [all …]
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H A D | irq-riscv-intc.c | 98 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement in riscv_intc_irq_eoi() 231 * interrupt controllers (such as PLIC, IMSIC and APLIC in riscv_intc_init()
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H A D | Makefile | 104 obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
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/linux/drivers/acpi/riscv/ |
H A D | irq.c | 43 * the incremental order like RINTC(24)->IMSIC(25)->APLIC(26)->PLIC(27). 170 struct acpi_madt_plic *plic = (struct acpi_madt_plic *)header; in riscv_acpi_plic_parse_madt() local 172 return riscv_acpi_register_ext_intc(plic->gsi_base, plic->num_irqs, 0, in riscv_acpi_plic_parse_madt() 173 plic->id, ACPI_RISCV_IRQCHIP_PLIC); in riscv_acpi_plic_parse_madt() 178 /* There can be either PLIC or APLIC */ in riscv_acpi_init_gsi_mapping()
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | riscv,cpu-intc.yaml | 23 (PLIC). 28 tree entry, though external interrupt controllers (like the PLIC, for 30 This means a PLIC interrupt property will typically list the HLICs for all
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H A D | starfive,jh8100-intc.yaml | 12 interrupt signal to RISC-V PLIC.
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/linux/arch/riscv/boot/dts/renesas/ |
H A D | r9a07g043f.dtsi | 55 interrupt-parent = <&plic>; 132 plic: interrupt-controller@12c00000 { label 133 compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";
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/linux/arch/m68k/include/asm/ |
H A D | m5272sim.h | 110 #define MCF_IRQ_PLIP 75 /* PLIC 2Khz Periodic */ 111 #define MCF_IRQ_PLIA 76 /* PLIC Asynchronous */
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | microchip,mpfs-spi.yaml | 83 interrupt-parent = <&plic>;
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H A D | spi-sifive.yaml | 78 interrupt-parent = <&plic>;
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/linux/arch/powerpc/include/asm/ |
H A D | paca.h | 5 * There are some pointers defined that are utilized by PLIC. 70 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
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/linux/tools/perf/pmu-events/arch/riscv/thead/c900-legacy/ |
H A D | microarch.json | 62 "BriefDescription": "PLIC arbitration time when the interrupt is not responded",
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | sifive,gpio.yaml | 82 interrupt-parent = <&plic>;
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H A D | microchip,mpfs-gpio.yaml | 82 interrupt-parent = <&plic>;
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/linux/Documentation/devicetree/bindings/pwm/ |
H A D | pwm-sifive.yaml | 69 interrupt-parent = <&plic>;
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/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu540-c000.dtsi | 182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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H A D | fu740-c000.dtsi | 185 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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/linux/arch/riscv/boot/dts/sophgo/ |
H A D | cv18xx.dtsi | 52 interrupt-parent = <&plic>; 348 plic: interrupt-controller@70000000 { label
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H A D | sg2042.dtsi | 428 compatible = "sophgo,sg2042-plic", "thead,c900-plic";
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/linux/arch/riscv/boot/dts/canaan/ |
H A D | k210.dtsi | 120 compatible = "canaan,k210-plic", "sifive,plic-1.0.0";
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7110.dtsi | 349 interrupt-parent = <&plic>; 375 plic: interrupt-controller@c000000 { label 376 compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0";
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