1*7340c6dfSInochi Amaoto[ 2*7340c6dfSInochi Amaoto { 3*7340c6dfSInochi Amaoto "EventName": "LSU_SPEC_FAIL", 4*7340c6dfSInochi Amaoto "EventCode": "0x0000000a", 5*7340c6dfSInochi Amaoto "BriefDescription": "LSU speculation fail" 6*7340c6dfSInochi Amaoto }, 7*7340c6dfSInochi Amaoto { 8*7340c6dfSInochi Amaoto "EventName": "IDU_RF_PIPE_FAIL", 9*7340c6dfSInochi Amaoto "EventCode": "0x00000014", 10*7340c6dfSInochi Amaoto "BriefDescription": "Instruction decode unit launch pipeline failed in RF state" 11*7340c6dfSInochi Amaoto }, 12*7340c6dfSInochi Amaoto { 13*7340c6dfSInochi Amaoto "EventName": "IDU_RF_REG_FAIL", 14*7340c6dfSInochi Amaoto "EventCode": "0x00000015", 15*7340c6dfSInochi Amaoto "BriefDescription": "Instruction decode unit launch register file fail in RF state" 16*7340c6dfSInochi Amaoto }, 17*7340c6dfSInochi Amaoto { 18*7340c6dfSInochi Amaoto "EventName": "IDU_RF_INSTRUCTION", 19*7340c6dfSInochi Amaoto "EventCode": "0x00000016", 20*7340c6dfSInochi Amaoto "BriefDescription": "retired instruction count of Instruction decode unit in RF (Register File) stage" 21*7340c6dfSInochi Amaoto }, 22*7340c6dfSInochi Amaoto { 23*7340c6dfSInochi Amaoto "EventName": "LSU_4K_STALL", 24*7340c6dfSInochi Amaoto "EventCode": "0x00000017", 25*7340c6dfSInochi Amaoto "BriefDescription": "LSU stall times for long distance data access (Over 4K)", 26*7340c6dfSInochi Amaoto "PublicDescription": "This stall occurs when translate virtual address with page offset over 4k" 27*7340c6dfSInochi Amaoto }, 28*7340c6dfSInochi Amaoto { 29*7340c6dfSInochi Amaoto "EventName": "LSU_OTHER_STALL", 30*7340c6dfSInochi Amaoto "EventCode": "0x00000018", 31*7340c6dfSInochi Amaoto "BriefDescription": "LSU stall times for other reasons (except the 4k stall)" 32*7340c6dfSInochi Amaoto }, 33*7340c6dfSInochi Amaoto { 34*7340c6dfSInochi Amaoto "EventName": "LSU_SQ_OTHER_DIS", 35*7340c6dfSInochi Amaoto "EventCode": "0x00000019", 36*7340c6dfSInochi Amaoto "BriefDescription": "LSU store queue discard others" 37*7340c6dfSInochi Amaoto }, 38*7340c6dfSInochi Amaoto { 39*7340c6dfSInochi Amaoto "EventName": "LSU_SQ_DATA_DISCARD", 40*7340c6dfSInochi Amaoto "EventCode": "0x0000001a", 41*7340c6dfSInochi Amaoto "BriefDescription": "LSU store queue discard data (uops)" 42*7340c6dfSInochi Amaoto }, 43*7340c6dfSInochi Amaoto { 44*7340c6dfSInochi Amaoto "EventName": "BRANCH_DIRECTION_MISPREDICTION", 45*7340c6dfSInochi Amaoto "EventCode": "0x0000001b", 46*7340c6dfSInochi Amaoto "BriefDescription": "Branch misprediction in BTB" 47*7340c6dfSInochi Amaoto }, 48*7340c6dfSInochi Amaoto { 49*7340c6dfSInochi Amaoto "EventName": "BRANCH_DIRECTION_PREDICTION", 50*7340c6dfSInochi Amaoto "EventCode": "0x0000001c", 51*7340c6dfSInochi Amaoto "BriefDescription": "All branch prediction in BTB", 52*7340c6dfSInochi Amaoto "PublicDescription": "This event including both successful prediction and failed prediction in BTB" 53*7340c6dfSInochi Amaoto }, 54*7340c6dfSInochi Amaoto { 55*7340c6dfSInochi Amaoto "EventName": "INTERRUPT_ACK_COUNT", 56*7340c6dfSInochi Amaoto "EventCode": "0x00000023", 57*7340c6dfSInochi Amaoto "BriefDescription": "acknowledged interrupt count" 58*7340c6dfSInochi Amaoto }, 59*7340c6dfSInochi Amaoto { 60*7340c6dfSInochi Amaoto "EventName": "INTERRUPT_OFF_CYCLE", 61*7340c6dfSInochi Amaoto "EventCode": "0x00000024", 62*7340c6dfSInochi Amaoto "BriefDescription": "PLIC arbitration time when the interrupt is not responded", 63*7340c6dfSInochi Amaoto "PublicDescription": "The arbitration time is recorded while meeting any of the following:\n- CPU is M-mode and MIE == 0\n- CPU is S-mode and delegation and SIE == 0\n" 64*7340c6dfSInochi Amaoto }, 65*7340c6dfSInochi Amaoto { 66*7340c6dfSInochi Amaoto "EventName": "IFU_STALLED_CYCLE", 67*7340c6dfSInochi Amaoto "EventCode": "0x00000027", 68*7340c6dfSInochi Amaoto "BriefDescription": "Number of stall cycles of the instruction fetch unit (IFU)." 69*7340c6dfSInochi Amaoto }, 70*7340c6dfSInochi Amaoto { 71*7340c6dfSInochi Amaoto "EventName": "IDU_STALLED_CYCLE", 72*7340c6dfSInochi Amaoto "EventCode": "0x00000028", 73*7340c6dfSInochi Amaoto "BriefDescription": "hpcp_backend_stall Number of stall cycles of the instruction decoding unit (IDU) and next-level pipeline unit." 74*7340c6dfSInochi Amaoto }, 75*7340c6dfSInochi Amaoto { 76*7340c6dfSInochi Amaoto "EventName": "SYNC_STALL", 77*7340c6dfSInochi Amaoto "EventCode": "0x00000029", 78*7340c6dfSInochi Amaoto "BriefDescription": "Sync instruction stall cycle fence/fence.i/sync/sfence" 79*7340c6dfSInochi Amaoto } 80*7340c6dfSInochi Amaoto] 81