1*d8c56ceaSChanghuang Liang# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*d8c56ceaSChanghuang Liang%YAML 1.2 3*d8c56ceaSChanghuang Liang--- 4*d8c56ceaSChanghuang Liang$id: http://devicetree.org/schemas/interrupt-controller/starfive,jh8100-intc.yaml# 5*d8c56ceaSChanghuang Liang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*d8c56ceaSChanghuang Liang 7*d8c56ceaSChanghuang Liangtitle: StarFive External Interrupt Controller 8*d8c56ceaSChanghuang Liang 9*d8c56ceaSChanghuang Liangdescription: 10*d8c56ceaSChanghuang Liang StarFive SoC JH8100 contain a external interrupt controller. It can be used 11*d8c56ceaSChanghuang Liang to handle high-level input interrupt signals. It also send the output 12*d8c56ceaSChanghuang Liang interrupt signal to RISC-V PLIC. 13*d8c56ceaSChanghuang Liang 14*d8c56ceaSChanghuang Liangmaintainers: 15*d8c56ceaSChanghuang Liang - Changhuang Liang <changhuang.liang@starfivetech.com> 16*d8c56ceaSChanghuang Liang 17*d8c56ceaSChanghuang Liangproperties: 18*d8c56ceaSChanghuang Liang compatible: 19*d8c56ceaSChanghuang Liang const: starfive,jh8100-intc 20*d8c56ceaSChanghuang Liang 21*d8c56ceaSChanghuang Liang reg: 22*d8c56ceaSChanghuang Liang maxItems: 1 23*d8c56ceaSChanghuang Liang 24*d8c56ceaSChanghuang Liang clocks: 25*d8c56ceaSChanghuang Liang description: APB clock for the interrupt controller 26*d8c56ceaSChanghuang Liang maxItems: 1 27*d8c56ceaSChanghuang Liang 28*d8c56ceaSChanghuang Liang resets: 29*d8c56ceaSChanghuang Liang description: APB reset for the interrupt controller 30*d8c56ceaSChanghuang Liang maxItems: 1 31*d8c56ceaSChanghuang Liang 32*d8c56ceaSChanghuang Liang interrupts: 33*d8c56ceaSChanghuang Liang maxItems: 1 34*d8c56ceaSChanghuang Liang 35*d8c56ceaSChanghuang Liang interrupt-controller: true 36*d8c56ceaSChanghuang Liang 37*d8c56ceaSChanghuang Liang "#interrupt-cells": 38*d8c56ceaSChanghuang Liang const: 1 39*d8c56ceaSChanghuang Liang 40*d8c56ceaSChanghuang Liangrequired: 41*d8c56ceaSChanghuang Liang - compatible 42*d8c56ceaSChanghuang Liang - reg 43*d8c56ceaSChanghuang Liang - clocks 44*d8c56ceaSChanghuang Liang - resets 45*d8c56ceaSChanghuang Liang - interrupts 46*d8c56ceaSChanghuang Liang - interrupt-controller 47*d8c56ceaSChanghuang Liang - "#interrupt-cells" 48*d8c56ceaSChanghuang Liang 49*d8c56ceaSChanghuang LiangadditionalProperties: false 50*d8c56ceaSChanghuang Liang 51*d8c56ceaSChanghuang Liangexamples: 52*d8c56ceaSChanghuang Liang - | 53*d8c56ceaSChanghuang Liang interrupt-controller@12260000 { 54*d8c56ceaSChanghuang Liang compatible = "starfive,jh8100-intc"; 55*d8c56ceaSChanghuang Liang reg = <0x12260000 0x10000>; 56*d8c56ceaSChanghuang Liang clocks = <&syscrg_ne 76>; 57*d8c56ceaSChanghuang Liang resets = <&syscrg_ne 13>; 58*d8c56ceaSChanghuang Liang interrupts = <45>; 59*d8c56ceaSChanghuang Liang interrupt-controller; 60*d8c56ceaSChanghuang Liang #interrupt-cells = <1>; 61*d8c56ceaSChanghuang Liang }; 62