/linux/drivers/phy/ti/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Phy drivers for TI platforms 6 tristate "TI DA8xx USB PHY Driver" 11 Enable this to support the USB PHY on DA8xx SoCs. 13 This driver controls both the USB 1.1 PHY and the USB 2.0 PHY. 16 tristate "TI dm816x USB PHY driver" 33 This option enables support for TI AM654 SerDes PHY used for 37 tristate "TI J721E WIZ (SERDES Wrapper) support" 47 SoC. WIZ is a serdes wrapper used to configure some of the input 53 tristate "OMAP CONTROL PHY Driver" [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sa8775p-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org> 16 See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h 20 const: qcom,sa8775p-gcc 24 - description: XO reference clock 25 - description: Sleep clock 26 - description: UFS memory first RX symbol clock [all …]
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H A D | qcom,sm8550-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 16 See also:: include/dt-bindings/clock/qcom,sm8550-gcc.h 20 const: qcom,sm8550-gcc 24 - description: Board XO source 25 - description: Sleep clock source 26 - description: PCIE 0 Pipe clock source [all …]
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H A D | qcom,sm4450-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ajit Pandey <quic_ajipan@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 17 See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h 21 const: qcom,sm4450-gcc 25 - description: Board XO source 26 - description: Sleep clock source [all …]
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H A D | qcom,qcs8300-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,qcs8300-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 11 - Imran Shaik <quic_imrashai@quicinc.com> 17 See also: include/dt-bindings/clock/qcom,qcs8300-gcc.h 21 const: qcom,qcs8300-gcc 25 - description: Board XO source 26 - description: Sleep clock source [all …]
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H A D | qcom,sm8650-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8650-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 16 See also:: include/dt-bindings/clock/qcom,sm8650-gcc.h 20 const: qcom,sm8650-gcc 24 - description: Board XO source 25 - description: Board Always On XO source 26 - description: Sleep clock source [all …]
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H A D | qcom,gcc-sm8450.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 16 See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h 21 - qcom,gcc-sm8450 22 - qcom,sm8475-gcc 26 - description: Board XO source 27 - description: Sleep clock source [all …]
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H A D | qcom,gcc-sm8350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 16 See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h 20 const: qcom,gcc-sm8350 24 - description: Board XO source 25 - description: Sleep clock source 26 - description: PCIE 0 Pipe clock source (Optional clock) [all …]
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H A D | qcom,gcc-sc7280.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 16 See also:: include/dt-bindings/clock/qcom,gcc-sc7280.h 20 const: qcom,gcc-sc7280 24 - description: Board XO source 25 - description: Board active XO source 26 - description: Sleep clock source [all …]
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H A D | qcom,qdu1000-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 11 - Imran Shaik <quic_imrashai@quicinc.com> 17 See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h 21 const: qcom,qdu1000-gcc 25 - description: Board XO source 26 - description: Sleep clock source [all …]
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H A D | qcom,ipq5332-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 17 include/dt-bindings/clock/qcom,gcc-ipq5332.h 18 include/dt-bindings/clock/qcom,gcc-ipq5424.h 23 - qcom,ipq5332-gcc 24 - qcom,ipq5424-gcc 29 - description: Board XO clock source [all …]
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H A D | qcom,sdx75-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sdx75-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Imran Shaik <quic_imrashai@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 17 See also:: include/dt-bindings/clock/qcom,sdx75-gcc.h 21 const: qcom,sdx75-gcc 25 - description: Board XO source 26 - description: Sleep clock source [all …]
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/linux/drivers/pci/controller/ |
H A D | pcie-iproc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Copyright (C) 2014-2015 Broadcom Corporation 10 * enum iproc_pcie_type - iProc PCIe interface type 11 * @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers 12 * @IPROC_PCIE_PAXB: PAXB-based host controllers for 14 * @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs 15 * @IPROC_PCIE_PAXC: PAXC-based host controllers 16 * @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation) 18 * PAXB is the wrapper used in root complex that can be connected to an 21 * PAXC is the wrapper used in root complex dedicated for internal emulated [all …]
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/linux/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/ 16 #include <sound/omap-hdmi-audio.h> 20 /* HDMI Wrapper */ 68 /* HDMI PHY */ 276 /* HDMI wrapper funcs */ 305 /* HDMI PHY funcs */ 306 int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk, 308 void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s); 309 int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy); [all …]
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/linux/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/ 15 #include <sound/omap-hdmi-audio.h> 24 /* HDMI Wrapper */ 72 /* HDMI PHY */ 295 /* HDMI wrapper funcs */ 323 /* HDMI PHY funcs */ 324 int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk, 326 void hdmi_phy_dump(struct hdmi_phy_data *phy, struct seq_file *s); 327 int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy, [all …]
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/linux/drivers/gpu/drm/stm/ |
H A D | dw_mipi_dsi-stm.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <linux/clk-provider.h> 32 /* DSI wrapper registers & bit definitions */ 34 #define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */ 38 #define DSI_WCR 0x0404 /* Wrapper Control Reg */ 41 #define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */ 45 #define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */ 49 #define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */ 96 writel(val, dsi->base + reg); in dsi_write() 101 return readl(dsi->base + reg); in dsi_read() [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,msm8996-qmp-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm QMP PHY controller (MSM8996 PCIe) 10 - Vinod Koul <vkoul@kernel.org> 13 QMP PHY controller supports physical layer functionality for a number of 18 const: qcom,msm8996-qmp-pcie-phy 22 - description: serdes 24 "#address-cells": [all …]
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H A D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: TI J721E WIZ (SERDES Wrapper) 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - ti,j721e-wiz-16g 17 - ti,j721e-wiz-10g 18 - ti,j721s2-wiz-10g [all …]
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | realtek,rtd-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/realtek,rtd-dwc3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Stanley Chang <stanley_chang@realtek.com> 15 and USB 3.0 in host or dual-role mode. 20 - enum: 21 - realtek,rtd1295-dwc3 22 - realtek,rtd1315e-dwc3 23 - realtek,rtd1319-dwc3 [all …]
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H A D | ti,am62-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller 10 - Aswath Govindraju <a-govindraju@ti.com> 14 const: ti,am62-usb 19 - description: USB CFG register space 20 - description: USB PHY2 register space 24 power-domains: [all …]
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/linux/Documentation/devicetree/bindings/display/ |
H A D | st,stm32mp25-lvds.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> 11 - Yannick Fertre <yannick.fertre@foss.st.com> 15 LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC) 16 onto the LVDS PHY. 19 - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input 20 pixels onto the data lanes of the PHY [all …]
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/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | cdns,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Boris Brezillon <boris.brezillon@bootlin.com> 18 - cdns,dsi 19 - ti,j721e-dsi 24 - description: 26 - description: 27 Register block for wrapper settings registers in case of TI J7 SoCs. 31 - description: PSM clock, used by the IP [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: TI J721E PCI EP (PCIe Wrapper) 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - const: ti,j721e-pcie-ep 17 - const: ti,j784s4-pcie-ep 18 - description: PCIe EP controller in AM64 [all …]
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/linux/drivers/usb/core/ |
H A D | phy.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * A wrapper for multiple PHYs which passes all phy_* function calls to 4 * multiple (actual) PHY devices. This is comes handy when initializing 12 #include <linux/phy/phy.h> 15 #include "phy.h" 18 struct phy *phy; member 22 /* Allocate the roothub_entry by specific name of phy */ 27 struct phy *phy; in usb_phy_roothub_add_phy_by_name() local 29 phy = devm_of_phy_get(dev, dev->of_node, name); in usb_phy_roothub_add_phy_by_name() 30 if (IS_ERR(phy)) in usb_phy_roothub_add_phy_by_name() [all …]
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/linux/drivers/net/phy/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # PHY Layer Configuration 12 PHYlink models the link between the PHY and MAC, allowing fixed 17 tristate "PHY Device support and infrastructure" 22 Ethernet controllers are usually attached to PHY 24 managing PHY devices. 35 Adds support for a set of LED trigger events per-PHY. Link 38 supported by the PHY and also a one common "link" trigger as a 39 logical-or of all the link speed ones. 41 <mii bus id>:<phy>:<speed> [all …]
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