1a2e8c808SVinod Koul# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2a2e8c808SVinod Koul%YAML 1.2 3a2e8c808SVinod Koul--- 4a2e8c808SVinod Koul$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml# 5a2e8c808SVinod Koul$schema: http://devicetree.org/meta-schemas/core.yaml# 6a2e8c808SVinod Koul 7ece3c319SKrzysztof Kozlowskititle: Qualcomm Global Clock & Reset Controller on SM8350 8a2e8c808SVinod Koul 9a2e8c808SVinod Koulmaintainers: 10a2e8c808SVinod Koul - Vinod Koul <vkoul@kernel.org> 11a2e8c808SVinod Koul 12a2e8c808SVinod Kouldescription: | 13ece3c319SKrzysztof Kozlowski Qualcomm global clock control module provides the clocks, resets and power 14ece3c319SKrzysztof Kozlowski domains on SM8350. 15a2e8c808SVinod Koul 16ece3c319SKrzysztof Kozlowski See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h 17a2e8c808SVinod Koul 18a2e8c808SVinod Koulproperties: 19a2e8c808SVinod Koul compatible: 20a2e8c808SVinod Koul const: qcom,gcc-sm8350 21a2e8c808SVinod Koul 22a2e8c808SVinod Koul clocks: 23a2e8c808SVinod Koul items: 24a2e8c808SVinod Koul - description: Board XO source 25a2e8c808SVinod Koul - description: Sleep clock source 26a2e8c808SVinod Koul - description: PCIE 0 Pipe clock source (Optional clock) 27a2e8c808SVinod Koul - description: PCIE 1 Pipe clock source (Optional clock) 28a2e8c808SVinod Koul - description: UFS card Rx symbol 0 clock source (Optional clock) 29a2e8c808SVinod Koul - description: UFS card Rx symbol 1 clock source (Optional clock) 30a2e8c808SVinod Koul - description: UFS card Tx symbol 0 clock source (Optional clock) 31a2e8c808SVinod Koul - description: UFS phy Rx symbol 0 clock source (Optional clock) 32a2e8c808SVinod Koul - description: UFS phy Rx symbol 1 clock source (Optional clock) 33a2e8c808SVinod Koul - description: UFS phy Tx symbol 0 clock source (Optional clock) 34a2e8c808SVinod Koul - description: USB3 phy wrapper pipe clock source (Optional clock) 35a2e8c808SVinod Koul - description: USB3 phy sec pipe clock source (Optional clock) 36a2e8c808SVinod Koul minItems: 2 37a2e8c808SVinod Koul 38a2e8c808SVinod Koul clock-names: 39a2e8c808SVinod Koul items: 40a2e8c808SVinod Koul - const: bi_tcxo 41a2e8c808SVinod Koul - const: sleep_clk 42a2e8c808SVinod Koul - const: pcie_0_pipe_clk # Optional clock 43a2e8c808SVinod Koul - const: pcie_1_pipe_clk # Optional clock 44a2e8c808SVinod Koul - const: ufs_card_rx_symbol_0_clk # Optional clock 45a2e8c808SVinod Koul - const: ufs_card_rx_symbol_1_clk # Optional clock 46a2e8c808SVinod Koul - const: ufs_card_tx_symbol_0_clk # Optional clock 47a2e8c808SVinod Koul - const: ufs_phy_rx_symbol_0_clk # Optional clock 48a2e8c808SVinod Koul - const: ufs_phy_rx_symbol_1_clk # Optional clock 49a2e8c808SVinod Koul - const: ufs_phy_tx_symbol_0_clk # Optional clock 50a2e8c808SVinod Koul - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock 51a2e8c808SVinod Koul - const: usb3_uni_phy_sec_gcc_usb30_pipe_clk # Optional clock 52a2e8c808SVinod Koul minItems: 2 53a2e8c808SVinod Koul 54a2e8c808SVinod Koulrequired: 55a2e8c808SVinod Koul - compatible 56a2e8c808SVinod Koul - clocks 57a2e8c808SVinod Koul - clock-names 58*b0ef3434SDmitry Baryshkov - '#power-domain-cells' 59a2e8c808SVinod Koul 600f71ae94SDmitry BaryshkovallOf: 610f71ae94SDmitry Baryshkov - $ref: qcom,gcc.yaml# 620f71ae94SDmitry Baryshkov 630f71ae94SDmitry BaryshkovunevaluatedProperties: false 64a2e8c808SVinod Koul 65a2e8c808SVinod Koulexamples: 66a2e8c808SVinod Koul - | 67a2e8c808SVinod Koul #include <dt-bindings/clock/qcom,rpmh.h> 68a2e8c808SVinod Koul clock-controller@100000 { 69a2e8c808SVinod Koul compatible = "qcom,gcc-sm8350"; 70a2e8c808SVinod Koul reg = <0x00100000 0x1f0000>; 71a2e8c808SVinod Koul clocks = <&rpmhcc RPMH_CXO_CLK>, 72a2e8c808SVinod Koul <&sleep_clk>; 73a2e8c808SVinod Koul clock-names = "bi_tcxo", "sleep_clk"; 74a2e8c808SVinod Koul #clock-cells = <1>; 75a2e8c808SVinod Koul #reset-cells = <1>; 76a2e8c808SVinod Koul #power-domain-cells = <1>; 77a2e8c808SVinod Koul }; 78a2e8c808SVinod Koul 79a2e8c808SVinod Koul... 80