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Searched +full:omap4 +full:- +full:i2c (Results 1 – 25 of 26) sorted by relevance

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/linux/sound/soc/ti/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 - daVinci devices
37 - Sitara line of SoCs (AM335x, AM438x, etc)
38 - OMAP4
39 - DRA7x devices
40 - Keystone devices
41 - K3 devices (am654, j721e)
49 OMAP4 and OMAP5.
65 OMAP4 and OMAP5.
70 depends on MACH_NOKIA_N810 && I2C
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
15 compatible = "ti,am654-timer";
18 clock-names = "fck";
19 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
20 ti,timer-pwm;
25 compatible = "ti,am654-timer";
28 clock-names = "fck";
29 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
30 ti,timer-pwm;
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H A Dk3-am62-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 bootph-all;
11 compatible = "pinctrl-single";
13 #pinctrl-cells = <1>;
14 pinctrl-single,register-width = <32>;
15 pinctrl-single,function-mask = <0xffffffff>;
19 bootph-pre-ram;
20 compatible = "ti,j721e-esm";
23 ti,esm-pins = <0>, <1>, <2>, <85>;
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H A Dk3-am65-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,am654-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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/linux/arch/arm/mach-omap2/
H A Dvc.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include "prm-regbits-34xx.h"
20 #include "prm-regbits-44xx.h"
52 * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
61 * OMAP4 register: PRM_VC_CFG_CHANNEL
82 * configuration, except the OMAP4 MPU channel. This appears
96 /* Default I2C trace length on pcb, 6.3cm. Used for capacitance calculations. */
101 * omap_vc_config_channel - configure VC channel to PMIC mappings
106 * - i2c slave address (SA)
107 * - voltage configuration address (RAV)
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H A Domap_hwmod_81xx_data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/
11 #include <linux/platform_data/hsmmc-omap.h>
25 * Common alwon .clkctrl_offs from dm814x TRM "Table 2-278. CM_ALWON REGISTERS"
78 #define DM816X_CM_ALWON_TIMER_1_CLKCTRL (0x1570 - DM816X_DM_ALWON_BASE)
79 #define DM816X_CM_ALWON_TIMER_2_CLKCTRL (0x1574 - DM816X_DM_ALWON_BASE)
80 #define DM816X_CM_ALWON_TIMER_3_CLKCTRL (0x1578 - DM816X_DM_ALWON_BASE)
81 #define DM816X_CM_ALWON_TIMER_4_CLKCTRL (0x157c - DM816X_DM_ALWON_BASE)
82 #define DM816X_CM_ALWON_TIMER_5_CLKCTRL (0x1580 - DM816X_DM_ALWON_BASE)
83 #define DM816X_CM_ALWON_TIMER_6_CLKCTRL (0x1584 - DM816X_DM_ALWON_BASE)
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-y := id.o io.o control.o devices.o fb.o pm.o \
8 common.o dma.o omap-headsmp.o sram.o
10 hwmod-common = omap_hwmod.o \
14 i2c.o wd_timer.o
15 clock-common = clock.o
16 secure-common = omap-smc.o omap-secure.o
18 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
19 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
20 obj-$(CONFIG_ARCH_OMAP4) += $(secure-common)
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
28 bool "TI OMAP4"
121 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
139 select I2C
195 lost during off-mode entry on HS/EMU devices. This feature
196 requires support from PPA / boot-loader in HS/EMU devices, which
H A Domap_hwmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
15 * ------------
21 * TI's documentation, on-chip devices are referred to as "OMAP
26 * Most of the address and data flow between modules is via OCP-based
32 * OMAP hwmod provides a consistent way to describe the on-chip
42 * -----------
54 * +-------------------------------+
57 * +-------------------------------+
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H A Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
65 * with the new PRCM protocol defined for new OMAP4 IPs.
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-l4.dtsi2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_core>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
21 compatible = "simple-pm-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */
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H A Domap4-l4.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
4 power-domains = <&prm_core>;
6 clock-names = "fck";
10 reg-names = "ap", "la", "ia0";
11 #address-cells = <1>;
12 #size-cells = <1>;
22 compatible = "simple-pm-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
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H A Domap4-panda-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/
5 #include <dt-bindings/input/input.h>
7 #include "omap4-mcpdm.dtsi"
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
20 dsp_memory_region: dsp-memory@98000000 {
21 compatible = "shared-dma-pool";
27 ipu_memory_region: ipu-memory@98800000 {
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/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap-dss.txt5 -------------------
25 -----------
36 -------
39 name for each display. If no aliases are defined, a semi-random number is used
43 -------
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
46 removed, defined in omap4.dtsi:
49 compatible = "ti,omap4-dss";
54 clock-names = "fck";
55 #address-cells = <1>;
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/linux/Documentation/devicetree/bindings/mfd/
H A Dtwl6040.txt3 The TWL6040s are 8-channel high quality low-power audio codecs providing audio,
4 vibra and GPO functionality on OMAP4+ platforms.
5 They are connected to the host processor via i2c for commands, McPDM for audio
9 - compatible : "ti,twl6040" for twl6040, "ti,twl6041" for twl6041
10 - reg: must be 0x4b for i2c address
11 - interrupts: twl6040 has one interrupt line connecteded to the main SoC
12 - gpio-controller:
13 - #gpio-cells = <1>: twl6040 provides GPO lines.
14 - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM
15 - twl6040,audpwron-gpio: Power on GPIO line for the twl6040
[all …]
/linux/drivers/i2c/busses/
H A Di2c-omap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TI OMAP I2C master mode driver
7 * Copyright (C) 2004 - 2007 Texas Instruments.
20 #include <linux/i2c.h>
30 #include <linux/platform_data/i2c-omap.h>
35 /* I2C controller revisions */
38 /* I2C controller revisions present on specific hardware */
81 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
90 /* I2C Status Register (OMAP_I2C_STAT): */
104 /* I2C WE wakeup enable register */
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/linux/drivers/bus/
H A Dti-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ti-sysc.c - Texas Instruments sysc interconnect target driver
8 * Copyright (C) 2017-2024 Texas Instruments Incorporated - https://www.ti.com/
13 * Copyright (C) 2009-2011 Nokia Corporation
14 * Copyright (C) 2011-2021 Texas Instruments Incorporated - https://www.ti.com/
35 #include <linux/platform_data/ti-sysc.h>
37 #include <dt-bindings/bus/ti-sysc.h>
107 * struct sysc - TI sysc interconnect target module registers and capabilities
113 * @mdata: ti-sysc to hwmod translation data for a module
130 * @pre_reset_quirk: module specific pre-reset quirk
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
120 cores. This bus is for per-CPU tightly coupled devices such as the
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/linux/arch/arm/mach-omap1/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
74 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
75 currently only available for OMAP16XX, 24XX, 34XX, OMAP4/5 and DRA7XX.
87 timer provides more intra-tick resolution than the 32KHz timer,
91 bool "Enable wake-up events for serial ports"
135 select I2C
/linux/Documentation/devicetree/bindings/regulator/
H A Dlp872x.txt4 - compatible: "ti,lp8720" or "ti,lp8725"
5 - reg: I2C slave address. 0x7d = LP8720, 0x7a = LP8725
8 - ti,general-config: the value of LP872X_GENERAL_CFG register (u8)
27 - ti,update-config: define it when LP872X_GENERAL_CFG register should be set
28 - ti,dvs-gpio: GPIO specifier for external DVS pin control of LP872x devices.
29 - ti,dvs-vsel: DVS selector. 0 = SEL_V1, 1 = SEL_V2.
30 - ti,dvs-state: initial DVS pin state. 0 = DVS_LOW, 1 = DVS_HIGH.
31 - enable-gpios: GPIO specifier for EN pin control of LP872x devices.
40 - LP8720: https://www.ti.com/lit/ds/symlink/lp8720.pdf
41 - LP8725: https://www.ti.com/lit/ds/symlink/lp8725.pdf
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/linux/drivers/clk/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
78 depends on I2C
87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
91 tristate "Raspberry Pi RP1-based clock support"
96 This multi-function device has 3 main PLLs and several clock
97 generators to drive the internal sub-peripherals.
106 multi-function device has one fixed-rate oscillator, clocked
131 depends on I2C
137 be pre-programmed to support other configurations and features not yet
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/linux/drivers/usb/musb/
H A Domap2430.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2007 by Texas Instruments
20 #include <linux/dma-mapping.h>
41 #define glue_to_musb(g) platform_get_drvdata(g->musb)
50 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_exit()
52 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_exit()
59 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_init()
61 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_init()
70 return -EPROBE_DEFER; in omap2430_musb_mailbox()
72 glue->status = status; in omap2430_musb_mailbox()
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
37 void __iomem *base = core->base; in hdmi4_core_ddc_init()
50 return -ETIMEDOUT; in hdmi4_core_ddc_init()
61 return -ETIMEDOUT; in hdmi4_core_ddc_init()
71 return -ETIMEDOUT; in hdmi4_core_ddc_init()
80 void __iomem *base = core->base; in hdmi4_core_ddc_read()
87 return -ETIMEDOUT; in hdmi4_core_ddc_read()
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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library
6 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
38 void __iomem *base = core->base; in hdmi_core_ddc_init()
51 return -ETIMEDOUT; in hdmi_core_ddc_init()
62 return -ETIMEDOUT; in hdmi_core_ddc_init()
72 return -ETIMEDOUT; in hdmi_core_ddc_init()
81 void __iomem *base = core->base; in hdmi_core_ddc_edid()
90 return -ETIMEDOUT; in hdmi_core_ddc_edid()
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