/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI OMAP2+ and K3 Mailbox devices 10 - Suman Anna <s-anna@ti.com> 13 The OMAP Mailbox hardware facilitates communication between different 14 processors using a queued mailbox interrupt mechanism. The IP block is 19 Each mailbox IP block/cluster has a certain number of h/w fifo queues and 32 registers. All the current OMAP SoCs except for the newest DRA7xx SoC has a [all …]
|
/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor [all …]
|
H A D | ti,k3-m4f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hari Nagalla <hnagalla@ti.com> 11 - Mathieu Poirier <mathieu.poirier@linaro.org> 20 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 25 - ti,am64-m4fss 27 power-domains: 30 "#address-cells": [all …]
|
H A D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14 that are used to offload some of the processor-intensive tasks or algorithms, 17 These processor sub-systems usually contain additional sub-modules like 23 Each DSP Core sub-system is represented as a single DT node. Each node has a 31 - ti,am62a-c7xv-dsp [all …]
|
H A D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F 20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode 21 called "Single-CPU" mode, where only Core0 is used, but with ability to use 27 Each Dual-Core R5F sub-system is represented as a single DTS node 40 - ti,am62-r5fss [all …]
|
/linux/drivers/mailbox/ |
H A D | omap-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * OMAP mailbox driver 5 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. 6 * Copyright (C) 2013-2021 Texas Instruments Incorporated - https://www.ti.com 9 * Suman Anna <s-anna@ti.com> 26 #include "mailbox.h" 97 return __raw_readl(mdev->mbox_base + ofs); in mbox_read_reg() 103 __raw_writel(val, mdev->mbox_base + ofs); in mbox_write_reg() 106 /* Mailbox FIFO handle functions */ 109 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; in mbox_fifo_read() [all …]
|
/linux/drivers/phy/ti/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 53 tristate "OMAP CONTROL PHY Driver" 58 the mailbox. The mailbox is present only in omap4 and the register to 64 tristate "OMAP USB2 PHY Driver" 84 This driver interacts with the "OMAP Control PHY Driver" to power
|
H A D | phy-omap-control.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * omap-control-phy.c - The PHY part of control module. 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com 20 * omap_control_pcie_pcs - set the PCS delay count 40 if (control_phy->type != OMAP_CTRL_TYPE_PCIE) { in omap_control_pcie_pcs() 45 val = readl(control_phy->pcie_pcs); in omap_control_pcie_pcs() 49 writel(val, control_phy->pcie_pcs); in omap_control_pcie_pcs() 54 * omap_control_phy_power - power on/off the phy using control module reg 75 if (control_phy->type == OMAP_CTRL_TYPE_OTGHS) in omap_control_phy_power() 78 val = readl(control_phy->power); in omap_control_phy_power() [all …]
|
/linux/Documentation/devicetree/bindings/usb/ |
H A D | omap-usb.txt | 1 OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS 3 OMAP MUSB GLUE 4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb" 5 - ti,hwmods : must be "usb_otg_hs" 6 - multipoint : Should be "1" indicating the musb controller supports 7 multipoint. This is a MUSB configuration-specific setting. 8 - num-eps : Specifies the number of endpoints. This is also a 9 MUSB configuration-specific setting. Should be set to "16" 10 - ram-bits : Specifies the ram address size. Should be set to "12" 11 - interface-type : This is a board specific setting to describe the type of [all …]
|
/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap2430.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4-wkup", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
|
H A D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/omap.h> 12 #include <dt-bindings/clock/omap5.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 19 interrupt-parent = <&wakeupgen>; [all …]
|
H A D | omap3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 33 #address-cells = <1>; [all …]
|
H A D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/bus/ti-sysc.h> 7 #include <dt-bindings/clock/omap4.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/omap.h> 11 #include <dt-bindings/clock/omap4.h> 15 interrupt-parent = <&wakeupgen>; 16 #address-cells = <1>; [all …]
|
H A D | omap2420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
|
H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm816.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/omap.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
|
H A D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus"; 3 power-domains = <&prm_core>; 5 clock-names = "fck"; 9 reg-names = "ap", "la", "ia0"; 10 #address-cells = <1>; 11 #size-cells = <1>; 21 compatible = "simple-pm-bus"; 22 #address-cells = <1>; 23 #size-cells = <1>; 55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */ [all …]
|
H A D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus"; 4 power-domains = <&prm_core>; 6 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0"; 11 #address-cells = <1>; 12 #size-cells = <1>; 22 compatible = "simple-pm-bus"; 23 #address-cells = <1>; 24 #size-cells = <1>; [all …]
|
/linux/Documentation/devicetree/bindings/phy/ |
H A D | ti-phy.txt | 3 OMAP CONTROL PHY 6 - compatible: Should be one of 7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4. 8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register 10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control 12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to 15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on 17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on 19 - reg : register ranges as listed in the reg-names property 20 - reg-names: "otghs_control" for control-phy-otghs [all …]
|
/linux/arch/arm/mach-omap2/ |
H A D | omap_hwmod_2420_data.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips 5 * Copyright (C) 2009-2011 Nokia Corporation 10 * XXX these should be marked initdata for multi-OMAP kernels 13 #include <linux/platform_data/i2c-omap.h> 21 #include "cm-regbits-24xx.h" 22 #include "prm-regbits-24xx.h" 32 * is driver-specific or driver-kernel integration-specific belongs 105 * From mach-omap2/pm24xx.c: "Putting MPU into the WFI state 127 /* mailbox */ [all …]
|
H A D | omap_hwmod_2430_data.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 5 * Copyright (C) 2009-2011 Nokia Corporation 10 * XXX these should be marked initdata for multi-OMAP kernels 13 #include <linux/platform_data/i2c-omap.h> 14 #include <linux/platform_data/hsmmc-omap.h> 21 #include "prm-regbits-24xx.h" 22 #include "cm-regbits-24xx.h" 31 * is driver-specific or driver-kernel integration-specific belongs 123 /* mailbox */ [all …]
|
H A D | omap_hwmod_3xxx_data.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips 5 * Copyright (C) 2009-2011 Nokia Corporation 12 * XXX these should be marked initdata for multi-OMAP kernels 15 #include <linux/platform_data/i2c-omap.h> 17 #include <linux/platform_data/hsmmc-omap.h> 25 #include "prm-regbits-34xx.h" 26 #include "cm-regbits-34xx.h" 36 * is driver-specific or driver-kernel integration-specific belongs 286 * 32-bit watchdog upward counter that generates a pulse on the reset pin on [all …]
|
H A D | omap_hwmod_81xx_data.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ 11 #include <linux/platform_data/hsmmc-omap.h> 25 * Common alwon .clkctrl_offs from dm814x TRM "Table 2-278. CM_ALWON REGISTERS" 78 #define DM816X_CM_ALWON_TIMER_1_CLKCTRL (0x1570 - DM816X_DM_ALWON_BASE) 79 #define DM816X_CM_ALWON_TIMER_2_CLKCTRL (0x1574 - DM816X_DM_ALWON_BASE) 80 #define DM816X_CM_ALWON_TIMER_3_CLKCTRL (0x1578 - DM816X_DM_ALWON_BASE) 81 #define DM816X_CM_ALWON_TIMER_4_CLKCTRL (0x157c - DM816X_DM_ALWON_BASE) 82 #define DM816X_CM_ALWON_TIMER_5_CLKCTRL (0x1580 - DM816X_DM_ALWON_BASE) 83 #define DM816X_CM_ALWON_TIMER_6_CLKCTRL (0x1584 - DM816X_DM_ALWON_BASE) [all …]
|
/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
|
/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
|
/linux/drivers/i2c/busses/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 16 for Cypress CCGx Type-C controller. Individual bus drivers 25 controller is part of the 7101 device, which is an ACPI-compliant 29 will be called i2c-ali1535. 37 controller is part of the 7101 device, which is an ACPI-compliant 41 will be called i2c-ali1563. 51 will be called i2c-ali15x3. 63 will be called i2c-amd756. 73 will be called i2c-amd8111. 83 be called i2c-amd-mp2-pci and i2c-amd-mp2-plat. [all …]
|