xref: /linux/Documentation/devicetree/bindings/remoteproc/ti,k3-m4f-rproc.yaml (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1*9fedb829SHari Nagalla# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*9fedb829SHari Nagalla%YAML 1.2
3*9fedb829SHari Nagalla---
4*9fedb829SHari Nagalla$id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml#
5*9fedb829SHari Nagalla$schema: http://devicetree.org/meta-schemas/core.yaml#
6*9fedb829SHari Nagalla
7*9fedb829SHari Nagallatitle: TI K3 M4F processor subsystems
8*9fedb829SHari Nagalla
9*9fedb829SHari Nagallamaintainers:
10*9fedb829SHari Nagalla  - Hari Nagalla <hnagalla@ti.com>
11*9fedb829SHari Nagalla  - Mathieu Poirier <mathieu.poirier@linaro.org>
12*9fedb829SHari Nagalla
13*9fedb829SHari Nagalladescription: |
14*9fedb829SHari Nagalla  Some K3 family SoCs have Arm Cortex M4F cores. AM64x is a SoC in K3
15*9fedb829SHari Nagalla  family with a M4F core. Typically safety oriented applications may use
16*9fedb829SHari Nagalla  the M4F core in isolation without an IPC. Where as some industrial and
17*9fedb829SHari Nagalla  home automation applications, may use the M4F core as a remote processor
18*9fedb829SHari Nagalla  with IPC communications.
19*9fedb829SHari Nagalla
20*9fedb829SHari Nagalla$ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
21*9fedb829SHari Nagalla
22*9fedb829SHari Nagallaproperties:
23*9fedb829SHari Nagalla  compatible:
24*9fedb829SHari Nagalla    enum:
25*9fedb829SHari Nagalla      - ti,am64-m4fss
26*9fedb829SHari Nagalla
27*9fedb829SHari Nagalla  power-domains:
28*9fedb829SHari Nagalla    maxItems: 1
29*9fedb829SHari Nagalla
30*9fedb829SHari Nagalla  "#address-cells":
31*9fedb829SHari Nagalla    const: 2
32*9fedb829SHari Nagalla
33*9fedb829SHari Nagalla  "#size-cells":
34*9fedb829SHari Nagalla    const: 2
35*9fedb829SHari Nagalla
36*9fedb829SHari Nagalla  reg:
37*9fedb829SHari Nagalla    items:
38*9fedb829SHari Nagalla      - description: IRAM internal memory region
39*9fedb829SHari Nagalla      - description: DRAM internal memory region
40*9fedb829SHari Nagalla
41*9fedb829SHari Nagalla  reg-names:
42*9fedb829SHari Nagalla    items:
43*9fedb829SHari Nagalla      - const: iram
44*9fedb829SHari Nagalla      - const: dram
45*9fedb829SHari Nagalla
46*9fedb829SHari Nagalla  resets:
47*9fedb829SHari Nagalla    maxItems: 1
48*9fedb829SHari Nagalla
49*9fedb829SHari Nagalla  firmware-name:
50*9fedb829SHari Nagalla    maxItems: 1
51*9fedb829SHari Nagalla    description: Name of firmware to load for the M4F core
52*9fedb829SHari Nagalla
53*9fedb829SHari Nagalla  mboxes:
54*9fedb829SHari Nagalla    description:
55*9fedb829SHari Nagalla      OMAP Mailbox specifier denoting the sub-mailbox, to be used for
56*9fedb829SHari Nagalla      communication with the remote processor. This property should match
57*9fedb829SHari Nagalla      with the sub-mailbox node used in the firmware image.
58*9fedb829SHari Nagalla    maxItems: 1
59*9fedb829SHari Nagalla
60*9fedb829SHari Nagalla  memory-region:
61*9fedb829SHari Nagalla    description:
62*9fedb829SHari Nagalla      phandle to the reserved memory nodes to be associated with the
63*9fedb829SHari Nagalla      remoteproc device. Optional memory regions available for firmware
64*9fedb829SHari Nagalla      specific purposes.
65*9fedb829SHari Nagalla      (see reserved-memory/reserved-memory.yaml in dtschema project)
66*9fedb829SHari Nagalla    maxItems: 8
67*9fedb829SHari Nagalla    items:
68*9fedb829SHari Nagalla      - description: regions used for DMA allocations like vrings, vring buffers
69*9fedb829SHari Nagalla                     and memory dedicated to firmware's specific purposes.
70*9fedb829SHari Nagalla    additionalItems: true
71*9fedb829SHari Nagalla
72*9fedb829SHari Nagallarequired:
73*9fedb829SHari Nagalla  - compatible
74*9fedb829SHari Nagalla  - reg
75*9fedb829SHari Nagalla  - reg-names
76*9fedb829SHari Nagalla  - ti,sci
77*9fedb829SHari Nagalla  - ti,sci-dev-id
78*9fedb829SHari Nagalla  - ti,sci-proc-ids
79*9fedb829SHari Nagalla  - resets
80*9fedb829SHari Nagalla  - firmware-name
81*9fedb829SHari Nagalla
82*9fedb829SHari NagallaunevaluatedProperties: false
83*9fedb829SHari Nagalla
84*9fedb829SHari Nagallaexamples:
85*9fedb829SHari Nagalla  - |
86*9fedb829SHari Nagalla    reserved-memory {
87*9fedb829SHari Nagalla        #address-cells = <2>;
88*9fedb829SHari Nagalla        #size-cells = <2>;
89*9fedb829SHari Nagalla
90*9fedb829SHari Nagalla        mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
91*9fedb829SHari Nagalla            compatible = "shared-dma-pool";
92*9fedb829SHari Nagalla            reg = <0x00 0x9cb00000 0x00 0x100000>;
93*9fedb829SHari Nagalla            no-map;
94*9fedb829SHari Nagalla        };
95*9fedb829SHari Nagalla
96*9fedb829SHari Nagalla        mcu_m4fss_memory_region: m4f-memory@9cc00000 {
97*9fedb829SHari Nagalla            compatible = "shared-dma-pool";
98*9fedb829SHari Nagalla            reg = <0x00 0x9cc00000 0x00 0xe00000>;
99*9fedb829SHari Nagalla            no-map;
100*9fedb829SHari Nagalla        };
101*9fedb829SHari Nagalla    };
102*9fedb829SHari Nagalla
103*9fedb829SHari Nagalla    soc {
104*9fedb829SHari Nagalla        #address-cells = <2>;
105*9fedb829SHari Nagalla        #size-cells = <2>;
106*9fedb829SHari Nagalla
107*9fedb829SHari Nagalla        mailbox0_cluster0: mailbox-0 {
108*9fedb829SHari Nagalla            #mbox-cells = <1>;
109*9fedb829SHari Nagalla        };
110*9fedb829SHari Nagalla
111*9fedb829SHari Nagalla        remoteproc@5000000 {
112*9fedb829SHari Nagalla            compatible = "ti,am64-m4fss";
113*9fedb829SHari Nagalla            reg = <0x00 0x5000000 0x00 0x30000>,
114*9fedb829SHari Nagalla                  <0x00 0x5040000 0x00 0x10000>;
115*9fedb829SHari Nagalla            reg-names = "iram", "dram";
116*9fedb829SHari Nagalla            resets = <&k3_reset 9 1>;
117*9fedb829SHari Nagalla            firmware-name = "am62-mcu-m4f0_0-fw";
118*9fedb829SHari Nagalla            mboxes = <&mailbox0_cluster0>, <&mbox_m4_0>;
119*9fedb829SHari Nagalla            memory-region = <&mcu_m4fss_dma_memory_region>,
120*9fedb829SHari Nagalla                            <&mcu_m4fss_memory_region>;
121*9fedb829SHari Nagalla            ti,sci = <&dmsc>;
122*9fedb829SHari Nagalla            ti,sci-dev-id = <9>;
123*9fedb829SHari Nagalla            ti,sci-proc-ids = <0x18 0xff>;
124*9fedb829SHari Nagalla         };
125*9fedb829SHari Nagalla    };
126