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/linux/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_irq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 struct snd_pdacf *chip = dev; in pdacf_interrupt() local
22 if ((chip->chip_status & (PDAUDIOCF_STAT_IS_STALE| in pdacf_interrupt()
27 stat = inw(chip->port + PDAUDIOCF_REG_ISR); in pdacf_interrupt()
30 dev_err(chip->card->dev, "PDAUDIOCF SRAM buffer overrun detected!\n"); in pdacf_interrupt()
31 if (chip->pcm_substream) in pdacf_interrupt()
37 snd_ak4117_check_rate_and_errors(chip->ak4117, 0); in pdacf_interrupt()
43 while (size-- > 0) { in pdacf_transfer_mono16()
53 while (size-- > 0) { in pdacf_transfer_mono32()
63 while (size-- > 0) { in pdacf_transfer_stereo16()
[all …]
/linux/drivers/dma/dw-edma/
H A Ddw-edma-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
14 #include <linux/pci-epf.h>
18 #include "dw-edma-core.h"
29 .off = b, \
35 off_t off; member
58 .rg.off = 0x00001000, /* 4 Kbytes */
62 /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
64 /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
68 /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-cy8c95x0.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include <linux/pinctrl/pinconf-generic.h>
69 (CY8C95X0_VIRTUAL + (x) - CY8C95X0_PORTSEL + (p) * MUXED_STRIDE)
92 { "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
117 * Since first controller (gpio-sch.c) and second
118 * (gpio-dwapb.c) are at the fixed bases, we may safely
130 * struct cy8c95x0_pinctrl - driver data
141 * @nport: Number of Gports in this chip
142 * @gpio_chip: gpiolib chip
148 * @name: Chip controller name
[all …]
/linux/drivers/gpio/
H A Dgpio-max732x.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - Push Pull Output
27 * - Input
28 * - Open Drain I/O
37 * - Group A : by I2C address 0b'110xxxx
38 * - Group B : by I2C address 0b'101xxxx
52 * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so
57 #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */
59 #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */
154 static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) in max732x_writeb() argument
[all …]
H A Dgpio-adp5585.c1 // SPDX-License-Identifier: GPL-2.0-only
24 static int adp5585_gpio_get_direction(struct gpio_chip *chip, unsigned int off) in adp5585_gpio_get_direction() argument
26 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip); in adp5585_gpio_get_direction()
27 unsigned int bank = ADP5585_BANK(off); in adp5585_gpio_get_direction()
28 unsigned int bit = ADP5585_BIT(off); in adp5585_gpio_get_direction()
31 regmap_read(adp5585_gpio->regmap, ADP5585_GPIO_DIRECTION_A + bank, &val); in adp5585_gpio_get_direction()
36 static int adp5585_gpio_direction_input(struct gpio_chip *chip, unsigned int off) in adp5585_gpio_direction_input() argument
38 struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip); in adp5585_gpio_direction_input()
39 unsigned int bank = ADP5585_BANK(off); in adp5585_gpio_direction_input()
40 unsigned int bit = ADP5585_BIT(off); in adp5585_gpio_direction_input()
[all …]
H A Dgpio-adp5520.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 static int adp5520_gpio_get_value(struct gpio_chip *chip, unsigned off) in adp5520_gpio_get_value() argument
28 dev = gpiochip_get_data(chip); in adp5520_gpio_get_value()
35 if (test_bit(off, &dev->output)) in adp5520_gpio_get_value()
36 adp5520_read(dev->master, ADP5520_GPIO_OUT, &reg_val); in adp5520_gpio_get_value()
38 adp5520_read(dev->master, ADP5520_GPIO_IN, &reg_val); in adp5520_gpio_get_value()
40 return !!(reg_val & dev->lut[off]); in adp5520_gpio_get_value()
43 static void adp5520_gpio_set_value(struct gpio_chip *chip, in adp5520_gpio_set_value() argument
44 unsigned off, int val) in adp5520_gpio_set_value() argument
47 dev = gpiochip_get_data(chip); in adp5520_gpio_set_value()
[all …]
H A Dgpio-hisi.c1 // SPDX-License-Identifier: GPL-2.0-only
33 #define HISI_GPIO_DRIVER_NAME "gpio-hisi"
36 struct gpio_chip chip; member
43 static inline u32 hisi_gpio_read_reg(struct gpio_chip *chip, in hisi_gpio_read_reg() argument
44 unsigned int off) in hisi_gpio_read_reg() argument
47 container_of(chip, struct hisi_gpio, chip); in hisi_gpio_read_reg()
48 void __iomem *reg = hisi_gpio->reg_base + off; in hisi_gpio_read_reg()
53 static inline void hisi_gpio_write_reg(struct gpio_chip *chip, in hisi_gpio_write_reg() argument
54 unsigned int off, u32 val) in hisi_gpio_write_reg() argument
57 container_of(chip, struct hisi_gpio, chip); in hisi_gpio_write_reg()
[all …]
H A Dgpio-pca953x.c1 // SPDX-License-Identifier: GPL-2.0-only
32 #include <linux/pinctrl/pinconf-generic.h>
135 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
161 * relative. Since first controller (gpio-sch.c) and
162 * second (gpio-dwapb.c) are at the fixed bases, we may
184 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) argument
228 u8 (*recalc_addr)(struct pca953x_chip *chip, int reg, int off);
229 bool (*check_reg)(struct pca953x_chip *chip, unsigned int reg,
233 static int pca953x_bank_shift(struct pca953x_chip *chip) in pca953x_bank_shift() argument
235 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); in pca953x_bank_shift()
[all …]
/linux/drivers/pwm/
H A Dpwm-pca9685.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for PCA9685 16-channel 12-bit PWM LED controller
8 * based on the pwm-twl-led.c driver
26 * Because the PCA9685 has only one prescaler per chip, only the first channel
88 static inline struct pca9685 *to_pca(struct pwm_chip *chip) in to_pca() argument
90 return pwmchip_get_drvdata(chip); in to_pca()
97 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1)) in pca9685_prescaler_can_change()
100 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1) in pca9685_prescaler_can_change()
106 return test_bit(channel, pca->pwms_enabled); in pca9685_prescaler_can_change()
109 static int pca9685_read_reg(struct pwm_chip *chip, unsigned int reg, unsigned int *val) in pca9685_read_reg() argument
[all …]
H A Dpwm-adp5585.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * - The .apply() operation executes atomically, but may not wait for the
11 * - Disabling the PWM drives the output pin to a low level immediately.
12 * - The hardware can only generate normal polarity output.
35 static int pwm_adp5585_request(struct pwm_chip *chip, struct pwm_device *pwm) in pwm_adp5585_request() argument
37 struct regmap *regmap = pwmchip_get_drvdata(chip); in pwm_adp5585_request()
45 static void pwm_adp5585_free(struct pwm_chip *chip, struct pwm_device *pwm) in pwm_adp5585_free() argument
47 struct regmap *regmap = pwmchip_get_drvdata(chip); in pwm_adp5585_free()
54 static int pwm_adp5585_apply(struct pwm_chip *chip, in pwm_adp5585_apply() argument
58 struct regmap *regmap = pwmchip_get_drvdata(chip); in pwm_adp5585_apply()
[all …]
H A Dpwm-twl.c1 // SPDX-License-Identifier: GPL-2.0-only
54 static inline struct twl_pwm_chip *to_twl(struct pwm_chip *chip) in to_twl() argument
56 return pwmchip_get_drvdata(chip); in to_twl()
59 static int twl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in twl_pwm_config() argument
68 * On-cycle is set to 1 (the minimum allowed value) in twl_pwm_config()
69 * The off time of 0 is not configurable, so the mapping is: in twl_pwm_config()
70 * 0 -> off cycle = 2, in twl_pwm_config()
71 * 1 -> off cycle = 2, in twl_pwm_config()
72 * 2 -> off cycle = 3, in twl_pwm_config()
73 * 126 - > off cycle 127, in twl_pwm_config()
[all …]
H A Dpwm-twl-led.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * This driver is a complete rewrite of the former pwm-twl6030.c authorded by:
15 * - The twl6030 hardware only supports two period lengths (128 clock ticks and
17 * - The hardware doesn't support ON = 0, so the active part of a period doesn't
19 * - The hardware could support inverted polarity (with a similar limitation as
21 * - The hardware emits a constant low output when disabled.
22 * - A request for .duty_cycle = 0 results in an output wave with one active
24 * - The driver only implements setting the relative duty cycle.
25 * - The driver doesn't implement .get_state().
38 * - LEDA uses PWMA
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
[all …]
/linux/arch/mips/alchemy/common/
H A Dgpiolib.c2 * Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
35 #include <asm/mach-au1x00/gpio-au1000.h>
36 #include <asm/mach-au1x00/gpio-au1300.h>
38 static int gpio2_get(struct gpio_chip *chip, unsigned offset) in gpio2_get() argument
43 static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value) in gpio2_set() argument
48 static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset) in gpio2_direction_input() argument
53 static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset, in gpio2_direction_output() argument
60 static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset) in gpio2_to_irq() argument
66 static int gpio1_get(struct gpio_chip *chip, unsigned offset) in gpio1_get() argument
71 static void gpio1_set(struct gpio_chip *chip, in gpio1_set() argument
[all …]
/linux/arch/arm/mach-s3c/
H A Dgpio-samsung.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
11 // Samsung - GPIOlib support
31 #include "regs-gpio.h"
32 #include "gpio-samsung.h"
35 #include "gpio-core.h"
36 #include "gpio-cfg.h"
37 #include "gpio-cfg-helpers.h"
40 static int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, in samsung_gpio_setpull_updown() argument
41 unsigned int off, samsung_gpio_pull_t pull) in samsung_gpio_setpull_updown() argument
[all …]
/linux/sound/ppc/
H A Dburgundy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 snd_pmac_burgundy_busy_wait(struct snd_pmac *chip) in snd_pmac_burgundy_busy_wait() argument
23 while ((in_le32(&chip->awacs->codec_ctrl) & MASK_NEWECMD) && timeout--) in snd_pmac_burgundy_busy_wait()
30 snd_pmac_burgundy_extend_wait(struct snd_pmac *chip) in snd_pmac_burgundy_extend_wait() argument
34 while (!(in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--) in snd_pmac_burgundy_extend_wait()
39 while ((in_le32(&chip->awacs->codec_stat) & MASK_EXTEND) && timeout--) in snd_pmac_burgundy_extend_wait()
46 snd_pmac_burgundy_wcw(struct snd_pmac *chip, unsigned addr, unsigned val) in snd_pmac_burgundy_wcw() argument
48 out_le32(&chip->awacs->codec_ctrl, addr + 0x200c00 + (val & 0xff)); in snd_pmac_burgundy_wcw()
49 snd_pmac_burgundy_busy_wait(chip); in snd_pmac_burgundy_wcw()
50 out_le32(&chip->awacs->codec_ctrl, addr + 0x200d00 +((val>>8) & 0xff)); in snd_pmac_burgundy_wcw()
[all …]
/linux/drivers/leds/
H A Dleds-an30259a.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Driver for Panasonic AN30259A 3-channel LED driver
24 #define AN30259A_LED_EN(x) BIT((x) - 1)
25 #define AN30259A_LED_SLOPE(x) BIT(((x) - 1) + 4)
27 #define AN30259A_REG_LEDCC(x) (0x03 + ((x) - 1))
30 #define AN30259A_REG_SLOPE(x) (0x06 + ((x) - 1))
34 #define AN30259A_REG_LEDCNT1(x) (0x09 + (4 * ((x) - 1)))
38 #define AN30259A_REG_LEDCNT2(x) (0x0A + (4 * ((x) - 1)))
43 #define AN30259A_REG_LEDCNT3(x) (0x0B + (4 * ((x) - 1)))
47 #define AN30259A_REG_LEDCNT4(x) (0x0C + (4 * ((x) - 1)))
[all …]
/linux/drivers/pinctrl/sunplus/
H A Dsppctl.c1 // SPDX-License-Identifier: GPL-2.0
21 #include <linux/pinctrl/pinconf-generic.h>
24 #include <dt-bindings/pinctrl/sppctl-sp7021.h>
27 #include "../pinctrl-utils.h"
35 struct gpio_chip chip; member
39 static inline u32 sppctl_first_readl(struct sppctl_gpio_chip *spp_gchip, u32 off) in sppctl_first_readl() argument
41 return readl(spp_gchip->first_base + SPPCTL_GPIO_OFF_FIRST + off); in sppctl_first_readl()
44 static inline void sppctl_first_writel(struct sppctl_gpio_chip *spp_gchip, u32 val, u32 off) in sppctl_first_writel() argument
46 writel(val, spp_gchip->first_base + SPPCTL_GPIO_OFF_FIRST + off); in sppctl_first_writel()
49 static inline u32 sppctl_gpio_master_readl(struct sppctl_gpio_chip *spp_gchip, u32 off) in sppctl_gpio_master_readl() argument
[all …]
/linux/drivers/pinctrl/spear/
H A Dpinctrl-plgpio.c58 * chip: gpio framework specific chip information structure
60 * machines where mapping b/w pin and offset is not 1-to-1.
62 * machines where mapping b/w pin and offset is not 1-to-1.
71 struct gpio_chip chip; member
115 static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) in plgpio_direction_input() argument
117 struct plgpio *plgpio = gpiochip_get_data(chip); in plgpio_direction_input()
121 if (plgpio->p2o && (plgpio->p2o_regs & PTO_DIR_REG)) { in plgpio_direction_input()
122 offset = plgpio->p2o(offset); in plgpio_direction_input()
123 if (offset == -1) in plgpio_direction_input()
124 return -EINVAL; in plgpio_direction_input()
[all …]
/linux/arch/powerpc/platforms/powernv/
H A Dopal-xscom.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 * its form. Bits 4-11 are always 0. in opal_scom_unmangle()
34 * of the 64-bit address, and thus cannot use the indirect bit. in opal_scom_unmangle()
37 * bits 4-7 (IBM notation) instead of bit 0-3 in this API, we in opal_scom_unmangle()
40 * For in-kernel use, we don't need to do this mangling. In in opal_scom_unmangle()
41 * kernel won't have bits 4-7 set. in opal_scom_unmangle()
44 * debugfs will always set 0-3 = 0 and clear 4-7 in opal_scom_unmangle()
45 * kernel will always clear 0-3 = 0 and set 4-7 in opal_scom_unmangle()
55 static int opal_scom_read(uint32_t chip, uint64_t addr, u64 reg, u64 *value) in opal_scom_read() argument
61 rc = opal_xscom_read(chip, reg, (__be64 *)__pa(&v)); in opal_scom_read()
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 … Translation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is…
17 "Unit": "CPU-M-CF",
21 …ress for a request made by the Level-1 Data cache. Incremented by one for every TLB2 miss in progr…
24 "Unit": "CPU-M-CF",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z196/
H A Dextended.json3 "Unit": "CPU-M-CF",
7 …on": "A directory write to the Level-1 Data Cache directory where the returned cache line was sour…
10 "Unit": "CPU-M-CF",
14 … "A directory write to the Level-1 Instruction Cache directory where the returned cache line was s…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
28 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
31 "Unit": "CPU-M-CF",
35 "PublicDescription": "Incremented by one for every store sent to Level-2 cache."
[all …]

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