171b9114dSArnd Bergmann // SPDX-License-Identifier: GPL-2.0
271b9114dSArnd Bergmann //
371b9114dSArnd Bergmann // Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
471b9114dSArnd Bergmann // http://www.samsung.com/
571b9114dSArnd Bergmann //
671b9114dSArnd Bergmann // Copyright 2008 Openmoko, Inc.
771b9114dSArnd Bergmann // Copyright 2008 Simtec Electronics
871b9114dSArnd Bergmann // Ben Dooks <ben@simtec.co.uk>
971b9114dSArnd Bergmann // http://armlinux.simtec.co.uk/
1071b9114dSArnd Bergmann //
1171b9114dSArnd Bergmann // Samsung - GPIOlib support
1271b9114dSArnd Bergmann
1371b9114dSArnd Bergmann #include <linux/kernel.h>
1471b9114dSArnd Bergmann #include <linux/irq.h>
1571b9114dSArnd Bergmann #include <linux/io.h>
1671b9114dSArnd Bergmann #include <linux/gpio.h>
1771b9114dSArnd Bergmann #include <linux/init.h>
1871b9114dSArnd Bergmann #include <linux/spinlock.h>
1971b9114dSArnd Bergmann #include <linux/module.h>
2071b9114dSArnd Bergmann #include <linux/interrupt.h>
2171b9114dSArnd Bergmann #include <linux/device.h>
2271b9114dSArnd Bergmann #include <linux/ioport.h>
2371b9114dSArnd Bergmann #include <linux/of.h>
2471b9114dSArnd Bergmann #include <linux/slab.h>
2571b9114dSArnd Bergmann #include <linux/of_address.h>
2671b9114dSArnd Bergmann
2771b9114dSArnd Bergmann #include <asm/irq.h>
2871b9114dSArnd Bergmann
29c78a41fcSArnd Bergmann #include "irqs.h"
30c6ff132dSArnd Bergmann #include "map.h"
31c6ff132dSArnd Bergmann #include "regs-gpio.h"
32c6ff132dSArnd Bergmann #include "gpio-samsung.h"
3371b9114dSArnd Bergmann
34c6ff132dSArnd Bergmann #include "cpu.h"
35c6ff132dSArnd Bergmann #include "gpio-core.h"
36c6ff132dSArnd Bergmann #include "gpio-cfg.h"
37c6ff132dSArnd Bergmann #include "gpio-cfg-helpers.h"
38c6ff132dSArnd Bergmann #include "pm.h"
3971b9114dSArnd Bergmann
samsung_gpio_setpull_updown(struct samsung_gpio_chip * chip,unsigned int off,samsung_gpio_pull_t pull)40*0d297df0SArnd Bergmann static int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip,
4171b9114dSArnd Bergmann unsigned int off, samsung_gpio_pull_t pull)
4271b9114dSArnd Bergmann {
4371b9114dSArnd Bergmann void __iomem *reg = chip->base + 0x08;
4471b9114dSArnd Bergmann int shift = off * 2;
4571b9114dSArnd Bergmann u32 pup;
4671b9114dSArnd Bergmann
4771b9114dSArnd Bergmann pup = __raw_readl(reg);
4871b9114dSArnd Bergmann pup &= ~(3 << shift);
4971b9114dSArnd Bergmann pup |= pull << shift;
5071b9114dSArnd Bergmann __raw_writel(pup, reg);
5171b9114dSArnd Bergmann
5271b9114dSArnd Bergmann return 0;
5371b9114dSArnd Bergmann }
5471b9114dSArnd Bergmann
samsung_gpio_getpull_updown(struct samsung_gpio_chip * chip,unsigned int off)55*0d297df0SArnd Bergmann static samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip,
5671b9114dSArnd Bergmann unsigned int off)
5771b9114dSArnd Bergmann {
5871b9114dSArnd Bergmann void __iomem *reg = chip->base + 0x08;
5971b9114dSArnd Bergmann int shift = off * 2;
6071b9114dSArnd Bergmann u32 pup = __raw_readl(reg);
6171b9114dSArnd Bergmann
6271b9114dSArnd Bergmann pup >>= shift;
6371b9114dSArnd Bergmann pup &= 0x3;
6471b9114dSArnd Bergmann
6571b9114dSArnd Bergmann return (__force samsung_gpio_pull_t)pup;
6671b9114dSArnd Bergmann }
6771b9114dSArnd Bergmann
samsung_gpio_setcfg_2bit(struct samsung_gpio_chip * chip,unsigned int off,unsigned int cfg)6871b9114dSArnd Bergmann static int samsung_gpio_setcfg_2bit(struct samsung_gpio_chip *chip,
6971b9114dSArnd Bergmann unsigned int off, unsigned int cfg)
7071b9114dSArnd Bergmann {
7171b9114dSArnd Bergmann void __iomem *reg = chip->base;
7271b9114dSArnd Bergmann unsigned int shift = off * 2;
7371b9114dSArnd Bergmann u32 con;
7471b9114dSArnd Bergmann
7571b9114dSArnd Bergmann if (samsung_gpio_is_cfg_special(cfg)) {
7671b9114dSArnd Bergmann cfg &= 0xf;
7771b9114dSArnd Bergmann if (cfg > 3)
7871b9114dSArnd Bergmann return -EINVAL;
7971b9114dSArnd Bergmann
8071b9114dSArnd Bergmann cfg <<= shift;
8171b9114dSArnd Bergmann }
8271b9114dSArnd Bergmann
8371b9114dSArnd Bergmann con = __raw_readl(reg);
8471b9114dSArnd Bergmann con &= ~(0x3 << shift);
8571b9114dSArnd Bergmann con |= cfg;
8671b9114dSArnd Bergmann __raw_writel(con, reg);
8771b9114dSArnd Bergmann
8871b9114dSArnd Bergmann return 0;
8971b9114dSArnd Bergmann }
9071b9114dSArnd Bergmann
9171b9114dSArnd Bergmann /*
9271b9114dSArnd Bergmann * samsung_gpio_getcfg_2bit - Samsung 2bit style GPIO configuration read.
9371b9114dSArnd Bergmann * @chip: The gpio chip that is being configured.
9471b9114dSArnd Bergmann * @off: The offset for the GPIO being configured.
9571b9114dSArnd Bergmann *
9671b9114dSArnd Bergmann * The reverse of samsung_gpio_setcfg_2bit(). Will return a value which
9771b9114dSArnd Bergmann * could be directly passed back to samsung_gpio_setcfg_2bit(), from the
9871b9114dSArnd Bergmann * S3C_GPIO_SPECIAL() macro.
9971b9114dSArnd Bergmann */
10071b9114dSArnd Bergmann
samsung_gpio_getcfg_2bit(struct samsung_gpio_chip * chip,unsigned int off)10171b9114dSArnd Bergmann static unsigned int samsung_gpio_getcfg_2bit(struct samsung_gpio_chip *chip,
10271b9114dSArnd Bergmann unsigned int off)
10371b9114dSArnd Bergmann {
10471b9114dSArnd Bergmann u32 con;
10571b9114dSArnd Bergmann
10671b9114dSArnd Bergmann con = __raw_readl(chip->base);
10771b9114dSArnd Bergmann con >>= off * 2;
10871b9114dSArnd Bergmann con &= 3;
10971b9114dSArnd Bergmann
11071b9114dSArnd Bergmann /* this conversion works for IN and OUT as well as special mode */
11171b9114dSArnd Bergmann return S3C_GPIO_SPECIAL(con);
11271b9114dSArnd Bergmann }
11371b9114dSArnd Bergmann
11471b9114dSArnd Bergmann /*
11571b9114dSArnd Bergmann * samsung_gpio_setcfg_4bit - Samsung 4bit single register GPIO config.
11671b9114dSArnd Bergmann * @chip: The gpio chip that is being configured.
11771b9114dSArnd Bergmann * @off: The offset for the GPIO being configured.
11871b9114dSArnd Bergmann * @cfg: The configuration value to set.
11971b9114dSArnd Bergmann *
12071b9114dSArnd Bergmann * This helper deal with the GPIO cases where the control register has 4 bits
12171b9114dSArnd Bergmann * of control per GPIO, generally in the form of:
12271b9114dSArnd Bergmann * 0000 = Input
12371b9114dSArnd Bergmann * 0001 = Output
12471b9114dSArnd Bergmann * others = Special functions (dependent on bank)
12571b9114dSArnd Bergmann *
12671b9114dSArnd Bergmann * Note, since the code to deal with the case where there are two control
12771b9114dSArnd Bergmann * registers instead of one, we do not have a separate set of functions for
12871b9114dSArnd Bergmann * each case.
12971b9114dSArnd Bergmann */
13071b9114dSArnd Bergmann
samsung_gpio_setcfg_4bit(struct samsung_gpio_chip * chip,unsigned int off,unsigned int cfg)13171b9114dSArnd Bergmann static int samsung_gpio_setcfg_4bit(struct samsung_gpio_chip *chip,
13271b9114dSArnd Bergmann unsigned int off, unsigned int cfg)
13371b9114dSArnd Bergmann {
13471b9114dSArnd Bergmann void __iomem *reg = chip->base;
13571b9114dSArnd Bergmann unsigned int shift = (off & 7) * 4;
13671b9114dSArnd Bergmann u32 con;
13771b9114dSArnd Bergmann
13871b9114dSArnd Bergmann if (off < 8 && chip->chip.ngpio > 8)
13971b9114dSArnd Bergmann reg -= 4;
14071b9114dSArnd Bergmann
14171b9114dSArnd Bergmann if (samsung_gpio_is_cfg_special(cfg)) {
14271b9114dSArnd Bergmann cfg &= 0xf;
14371b9114dSArnd Bergmann cfg <<= shift;
14471b9114dSArnd Bergmann }
14571b9114dSArnd Bergmann
14671b9114dSArnd Bergmann con = __raw_readl(reg);
14771b9114dSArnd Bergmann con &= ~(0xf << shift);
14871b9114dSArnd Bergmann con |= cfg;
14971b9114dSArnd Bergmann __raw_writel(con, reg);
15071b9114dSArnd Bergmann
15171b9114dSArnd Bergmann return 0;
15271b9114dSArnd Bergmann }
15371b9114dSArnd Bergmann
15471b9114dSArnd Bergmann /*
15571b9114dSArnd Bergmann * samsung_gpio_getcfg_4bit - Samsung 4bit single register GPIO config read.
15671b9114dSArnd Bergmann * @chip: The gpio chip that is being configured.
15771b9114dSArnd Bergmann * @off: The offset for the GPIO being configured.
15871b9114dSArnd Bergmann *
15971b9114dSArnd Bergmann * The reverse of samsung_gpio_setcfg_4bit(), turning a gpio configuration
16071b9114dSArnd Bergmann * register setting into a value the software can use, such as could be passed
16171b9114dSArnd Bergmann * to samsung_gpio_setcfg_4bit().
16271b9114dSArnd Bergmann *
16371b9114dSArnd Bergmann * @sa samsung_gpio_getcfg_2bit
16471b9114dSArnd Bergmann */
16571b9114dSArnd Bergmann
samsung_gpio_getcfg_4bit(struct samsung_gpio_chip * chip,unsigned int off)16671b9114dSArnd Bergmann static unsigned samsung_gpio_getcfg_4bit(struct samsung_gpio_chip *chip,
16771b9114dSArnd Bergmann unsigned int off)
16871b9114dSArnd Bergmann {
16971b9114dSArnd Bergmann void __iomem *reg = chip->base;
17071b9114dSArnd Bergmann unsigned int shift = (off & 7) * 4;
17171b9114dSArnd Bergmann u32 con;
17271b9114dSArnd Bergmann
17371b9114dSArnd Bergmann if (off < 8 && chip->chip.ngpio > 8)
17471b9114dSArnd Bergmann reg -= 4;
17571b9114dSArnd Bergmann
17671b9114dSArnd Bergmann con = __raw_readl(reg);
17771b9114dSArnd Bergmann con >>= shift;
17871b9114dSArnd Bergmann con &= 0xf;
17971b9114dSArnd Bergmann
18071b9114dSArnd Bergmann /* this conversion works for IN and OUT as well as special mode */
18171b9114dSArnd Bergmann return S3C_GPIO_SPECIAL(con);
18271b9114dSArnd Bergmann }
18371b9114dSArnd Bergmann
samsung_gpiolib_set_cfg(struct samsung_gpio_cfg * chipcfg,int nr_chips)18471b9114dSArnd Bergmann static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg,
18571b9114dSArnd Bergmann int nr_chips)
18671b9114dSArnd Bergmann {
18771b9114dSArnd Bergmann for (; nr_chips > 0; nr_chips--, chipcfg++) {
18871b9114dSArnd Bergmann if (!chipcfg->set_config)
18971b9114dSArnd Bergmann chipcfg->set_config = samsung_gpio_setcfg_4bit;
19071b9114dSArnd Bergmann if (!chipcfg->get_config)
19171b9114dSArnd Bergmann chipcfg->get_config = samsung_gpio_getcfg_4bit;
19271b9114dSArnd Bergmann if (!chipcfg->set_pull)
19371b9114dSArnd Bergmann chipcfg->set_pull = samsung_gpio_setpull_updown;
19471b9114dSArnd Bergmann if (!chipcfg->get_pull)
19571b9114dSArnd Bergmann chipcfg->get_pull = samsung_gpio_getpull_updown;
19671b9114dSArnd Bergmann }
19771b9114dSArnd Bergmann }
19871b9114dSArnd Bergmann
19971b9114dSArnd Bergmann static struct samsung_gpio_cfg samsung_gpio_cfgs[] = {
20071b9114dSArnd Bergmann [0] = {
20171b9114dSArnd Bergmann .cfg_eint = 0x0,
20271b9114dSArnd Bergmann },
20371b9114dSArnd Bergmann [1] = {
20471b9114dSArnd Bergmann .cfg_eint = 0x3,
20571b9114dSArnd Bergmann },
20671b9114dSArnd Bergmann [2] = {
20771b9114dSArnd Bergmann .cfg_eint = 0x7,
20871b9114dSArnd Bergmann },
20971b9114dSArnd Bergmann [3] = {
21071b9114dSArnd Bergmann .cfg_eint = 0xF,
21171b9114dSArnd Bergmann },
21271b9114dSArnd Bergmann [4] = {
21371b9114dSArnd Bergmann .cfg_eint = 0x0,
21471b9114dSArnd Bergmann .set_config = samsung_gpio_setcfg_2bit,
21571b9114dSArnd Bergmann .get_config = samsung_gpio_getcfg_2bit,
21671b9114dSArnd Bergmann },
21771b9114dSArnd Bergmann [5] = {
21871b9114dSArnd Bergmann .cfg_eint = 0x2,
21971b9114dSArnd Bergmann .set_config = samsung_gpio_setcfg_2bit,
22071b9114dSArnd Bergmann .get_config = samsung_gpio_getcfg_2bit,
22171b9114dSArnd Bergmann },
22271b9114dSArnd Bergmann [6] = {
22371b9114dSArnd Bergmann .cfg_eint = 0x3,
22471b9114dSArnd Bergmann .set_config = samsung_gpio_setcfg_2bit,
22571b9114dSArnd Bergmann .get_config = samsung_gpio_getcfg_2bit,
22671b9114dSArnd Bergmann },
22771b9114dSArnd Bergmann [7] = {
22871b9114dSArnd Bergmann .set_config = samsung_gpio_setcfg_2bit,
22971b9114dSArnd Bergmann .get_config = samsung_gpio_getcfg_2bit,
23071b9114dSArnd Bergmann },
23171b9114dSArnd Bergmann };
23271b9114dSArnd Bergmann
23371b9114dSArnd Bergmann /*
23471b9114dSArnd Bergmann * Default routines for controlling GPIO, based on the original S3C24XX
23571b9114dSArnd Bergmann * GPIO functions which deal with the case where each gpio bank of the
23671b9114dSArnd Bergmann * chip is as following:
23771b9114dSArnd Bergmann *
23871b9114dSArnd Bergmann * base + 0x00: Control register, 2 bits per gpio
23971b9114dSArnd Bergmann * gpio n: 2 bits starting at (2*n)
24071b9114dSArnd Bergmann * 00 = input, 01 = output, others mean special-function
24171b9114dSArnd Bergmann * base + 0x04: Data register, 1 bit per gpio
24271b9114dSArnd Bergmann * bit n: data bit n
24371b9114dSArnd Bergmann */
24471b9114dSArnd Bergmann
samsung_gpiolib_2bit_input(struct gpio_chip * chip,unsigned offset)24571b9114dSArnd Bergmann static int samsung_gpiolib_2bit_input(struct gpio_chip *chip, unsigned offset)
24671b9114dSArnd Bergmann {
24771b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
24871b9114dSArnd Bergmann void __iomem *base = ourchip->base;
24971b9114dSArnd Bergmann unsigned long flags;
25071b9114dSArnd Bergmann unsigned long con;
25171b9114dSArnd Bergmann
25271b9114dSArnd Bergmann samsung_gpio_lock(ourchip, flags);
25371b9114dSArnd Bergmann
25471b9114dSArnd Bergmann con = __raw_readl(base + 0x00);
25571b9114dSArnd Bergmann con &= ~(3 << (offset * 2));
25671b9114dSArnd Bergmann
25771b9114dSArnd Bergmann __raw_writel(con, base + 0x00);
25871b9114dSArnd Bergmann
25971b9114dSArnd Bergmann samsung_gpio_unlock(ourchip, flags);
26071b9114dSArnd Bergmann return 0;
26171b9114dSArnd Bergmann }
26271b9114dSArnd Bergmann
samsung_gpiolib_2bit_output(struct gpio_chip * chip,unsigned offset,int value)26371b9114dSArnd Bergmann static int samsung_gpiolib_2bit_output(struct gpio_chip *chip,
26471b9114dSArnd Bergmann unsigned offset, int value)
26571b9114dSArnd Bergmann {
26671b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
26771b9114dSArnd Bergmann void __iomem *base = ourchip->base;
26871b9114dSArnd Bergmann unsigned long flags;
26971b9114dSArnd Bergmann unsigned long dat;
27071b9114dSArnd Bergmann unsigned long con;
27171b9114dSArnd Bergmann
27271b9114dSArnd Bergmann samsung_gpio_lock(ourchip, flags);
27371b9114dSArnd Bergmann
27471b9114dSArnd Bergmann dat = __raw_readl(base + 0x04);
27571b9114dSArnd Bergmann dat &= ~(1 << offset);
27671b9114dSArnd Bergmann if (value)
27771b9114dSArnd Bergmann dat |= 1 << offset;
27871b9114dSArnd Bergmann __raw_writel(dat, base + 0x04);
27971b9114dSArnd Bergmann
28071b9114dSArnd Bergmann con = __raw_readl(base + 0x00);
28171b9114dSArnd Bergmann con &= ~(3 << (offset * 2));
28271b9114dSArnd Bergmann con |= 1 << (offset * 2);
28371b9114dSArnd Bergmann
28471b9114dSArnd Bergmann __raw_writel(con, base + 0x00);
28571b9114dSArnd Bergmann __raw_writel(dat, base + 0x04);
28671b9114dSArnd Bergmann
28771b9114dSArnd Bergmann samsung_gpio_unlock(ourchip, flags);
28871b9114dSArnd Bergmann return 0;
28971b9114dSArnd Bergmann }
29071b9114dSArnd Bergmann
29171b9114dSArnd Bergmann /*
29271b9114dSArnd Bergmann * The samsung_gpiolib_4bit routines are to control the gpio banks where
29371b9114dSArnd Bergmann * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the
29471b9114dSArnd Bergmann * following example:
29571b9114dSArnd Bergmann *
29671b9114dSArnd Bergmann * base + 0x00: Control register, 4 bits per gpio
29771b9114dSArnd Bergmann * gpio n: 4 bits starting at (4*n)
29871b9114dSArnd Bergmann * 0000 = input, 0001 = output, others mean special-function
29971b9114dSArnd Bergmann * base + 0x04: Data register, 1 bit per gpio
30071b9114dSArnd Bergmann * bit n: data bit n
30171b9114dSArnd Bergmann *
30271b9114dSArnd Bergmann * Note, since the data register is one bit per gpio and is at base + 0x4
30371b9114dSArnd Bergmann * we can use samsung_gpiolib_get and samsung_gpiolib_set to change the
30471b9114dSArnd Bergmann * state of the output.
30571b9114dSArnd Bergmann */
30671b9114dSArnd Bergmann
samsung_gpiolib_4bit_input(struct gpio_chip * chip,unsigned int offset)30771b9114dSArnd Bergmann static int samsung_gpiolib_4bit_input(struct gpio_chip *chip,
30871b9114dSArnd Bergmann unsigned int offset)
30971b9114dSArnd Bergmann {
31071b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
31171b9114dSArnd Bergmann void __iomem *base = ourchip->base;
31271b9114dSArnd Bergmann unsigned long con;
31371b9114dSArnd Bergmann
31471b9114dSArnd Bergmann con = __raw_readl(base + GPIOCON_OFF);
31571b9114dSArnd Bergmann if (ourchip->bitmap_gpio_int & BIT(offset))
31671b9114dSArnd Bergmann con |= 0xf << con_4bit_shift(offset);
31771b9114dSArnd Bergmann else
31871b9114dSArnd Bergmann con &= ~(0xf << con_4bit_shift(offset));
31971b9114dSArnd Bergmann __raw_writel(con, base + GPIOCON_OFF);
32071b9114dSArnd Bergmann
32171b9114dSArnd Bergmann pr_debug("%s: %p: CON now %08lx\n", __func__, base, con);
32271b9114dSArnd Bergmann
32371b9114dSArnd Bergmann return 0;
32471b9114dSArnd Bergmann }
32571b9114dSArnd Bergmann
samsung_gpiolib_4bit_output(struct gpio_chip * chip,unsigned int offset,int value)32671b9114dSArnd Bergmann static int samsung_gpiolib_4bit_output(struct gpio_chip *chip,
32771b9114dSArnd Bergmann unsigned int offset, int value)
32871b9114dSArnd Bergmann {
32971b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
33071b9114dSArnd Bergmann void __iomem *base = ourchip->base;
33171b9114dSArnd Bergmann unsigned long con;
33271b9114dSArnd Bergmann unsigned long dat;
33371b9114dSArnd Bergmann
33471b9114dSArnd Bergmann con = __raw_readl(base + GPIOCON_OFF);
33571b9114dSArnd Bergmann con &= ~(0xf << con_4bit_shift(offset));
33671b9114dSArnd Bergmann con |= 0x1 << con_4bit_shift(offset);
33771b9114dSArnd Bergmann
33871b9114dSArnd Bergmann dat = __raw_readl(base + GPIODAT_OFF);
33971b9114dSArnd Bergmann
34071b9114dSArnd Bergmann if (value)
34171b9114dSArnd Bergmann dat |= 1 << offset;
34271b9114dSArnd Bergmann else
34371b9114dSArnd Bergmann dat &= ~(1 << offset);
34471b9114dSArnd Bergmann
34571b9114dSArnd Bergmann __raw_writel(dat, base + GPIODAT_OFF);
34671b9114dSArnd Bergmann __raw_writel(con, base + GPIOCON_OFF);
34771b9114dSArnd Bergmann __raw_writel(dat, base + GPIODAT_OFF);
34871b9114dSArnd Bergmann
34971b9114dSArnd Bergmann pr_debug("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
35071b9114dSArnd Bergmann
35171b9114dSArnd Bergmann return 0;
35271b9114dSArnd Bergmann }
35371b9114dSArnd Bergmann
35471b9114dSArnd Bergmann /*
35571b9114dSArnd Bergmann * The next set of routines are for the case where the GPIO configuration
35671b9114dSArnd Bergmann * registers are 4 bits per GPIO but there is more than one register (the
35771b9114dSArnd Bergmann * bank has more than 8 GPIOs.
35871b9114dSArnd Bergmann *
35971b9114dSArnd Bergmann * This case is the similar to the 4 bit case, but the registers are as
36071b9114dSArnd Bergmann * follows:
36171b9114dSArnd Bergmann *
36271b9114dSArnd Bergmann * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs)
36371b9114dSArnd Bergmann * gpio n: 4 bits starting at (4*n)
36471b9114dSArnd Bergmann * 0000 = input, 0001 = output, others mean special-function
36571b9114dSArnd Bergmann * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs)
36671b9114dSArnd Bergmann * gpio n: 4 bits starting at (4*n)
36771b9114dSArnd Bergmann * 0000 = input, 0001 = output, others mean special-function
36871b9114dSArnd Bergmann * base + 0x08: Data register, 1 bit per gpio
36971b9114dSArnd Bergmann * bit n: data bit n
37071b9114dSArnd Bergmann *
37171b9114dSArnd Bergmann * To allow us to use the samsung_gpiolib_get and samsung_gpiolib_set
37271b9114dSArnd Bergmann * routines we store the 'base + 0x4' address so that these routines see
37371b9114dSArnd Bergmann * the data register at ourchip->base + 0x04.
37471b9114dSArnd Bergmann */
37571b9114dSArnd Bergmann
samsung_gpiolib_4bit2_input(struct gpio_chip * chip,unsigned int offset)37671b9114dSArnd Bergmann static int samsung_gpiolib_4bit2_input(struct gpio_chip *chip,
37771b9114dSArnd Bergmann unsigned int offset)
37871b9114dSArnd Bergmann {
37971b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
38071b9114dSArnd Bergmann void __iomem *base = ourchip->base;
38171b9114dSArnd Bergmann void __iomem *regcon = base;
38271b9114dSArnd Bergmann unsigned long con;
38371b9114dSArnd Bergmann
38471b9114dSArnd Bergmann if (offset > 7)
38571b9114dSArnd Bergmann offset -= 8;
38671b9114dSArnd Bergmann else
38771b9114dSArnd Bergmann regcon -= 4;
38871b9114dSArnd Bergmann
38971b9114dSArnd Bergmann con = __raw_readl(regcon);
39071b9114dSArnd Bergmann con &= ~(0xf << con_4bit_shift(offset));
39171b9114dSArnd Bergmann __raw_writel(con, regcon);
39271b9114dSArnd Bergmann
39371b9114dSArnd Bergmann pr_debug("%s: %p: CON %08lx\n", __func__, base, con);
39471b9114dSArnd Bergmann
39571b9114dSArnd Bergmann return 0;
39671b9114dSArnd Bergmann }
39771b9114dSArnd Bergmann
samsung_gpiolib_4bit2_output(struct gpio_chip * chip,unsigned int offset,int value)39871b9114dSArnd Bergmann static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip,
39971b9114dSArnd Bergmann unsigned int offset, int value)
40071b9114dSArnd Bergmann {
40171b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
40271b9114dSArnd Bergmann void __iomem *base = ourchip->base;
40371b9114dSArnd Bergmann void __iomem *regcon = base;
40471b9114dSArnd Bergmann unsigned long con;
40571b9114dSArnd Bergmann unsigned long dat;
40671b9114dSArnd Bergmann unsigned con_offset = offset;
40771b9114dSArnd Bergmann
40871b9114dSArnd Bergmann if (con_offset > 7)
40971b9114dSArnd Bergmann con_offset -= 8;
41071b9114dSArnd Bergmann else
41171b9114dSArnd Bergmann regcon -= 4;
41271b9114dSArnd Bergmann
41371b9114dSArnd Bergmann con = __raw_readl(regcon);
41471b9114dSArnd Bergmann con &= ~(0xf << con_4bit_shift(con_offset));
41571b9114dSArnd Bergmann con |= 0x1 << con_4bit_shift(con_offset);
41671b9114dSArnd Bergmann
41771b9114dSArnd Bergmann dat = __raw_readl(base + GPIODAT_OFF);
41871b9114dSArnd Bergmann
41971b9114dSArnd Bergmann if (value)
42071b9114dSArnd Bergmann dat |= 1 << offset;
42171b9114dSArnd Bergmann else
42271b9114dSArnd Bergmann dat &= ~(1 << offset);
42371b9114dSArnd Bergmann
42471b9114dSArnd Bergmann __raw_writel(dat, base + GPIODAT_OFF);
42571b9114dSArnd Bergmann __raw_writel(con, regcon);
42671b9114dSArnd Bergmann __raw_writel(dat, base + GPIODAT_OFF);
42771b9114dSArnd Bergmann
42871b9114dSArnd Bergmann pr_debug("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat);
42971b9114dSArnd Bergmann
43071b9114dSArnd Bergmann return 0;
43171b9114dSArnd Bergmann }
43271b9114dSArnd Bergmann
samsung_gpiolib_set(struct gpio_chip * chip,unsigned offset,int value)43371b9114dSArnd Bergmann static void samsung_gpiolib_set(struct gpio_chip *chip,
43471b9114dSArnd Bergmann unsigned offset, int value)
43571b9114dSArnd Bergmann {
43671b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
43771b9114dSArnd Bergmann void __iomem *base = ourchip->base;
43871b9114dSArnd Bergmann unsigned long flags;
43971b9114dSArnd Bergmann unsigned long dat;
44071b9114dSArnd Bergmann
44171b9114dSArnd Bergmann samsung_gpio_lock(ourchip, flags);
44271b9114dSArnd Bergmann
44371b9114dSArnd Bergmann dat = __raw_readl(base + 0x04);
44471b9114dSArnd Bergmann dat &= ~(1 << offset);
44571b9114dSArnd Bergmann if (value)
44671b9114dSArnd Bergmann dat |= 1 << offset;
44771b9114dSArnd Bergmann __raw_writel(dat, base + 0x04);
44871b9114dSArnd Bergmann
44971b9114dSArnd Bergmann samsung_gpio_unlock(ourchip, flags);
45071b9114dSArnd Bergmann }
45171b9114dSArnd Bergmann
samsung_gpiolib_get(struct gpio_chip * chip,unsigned offset)45271b9114dSArnd Bergmann static int samsung_gpiolib_get(struct gpio_chip *chip, unsigned offset)
45371b9114dSArnd Bergmann {
45471b9114dSArnd Bergmann struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip);
45571b9114dSArnd Bergmann unsigned long val;
45671b9114dSArnd Bergmann
45771b9114dSArnd Bergmann val = __raw_readl(ourchip->base + 0x04);
45871b9114dSArnd Bergmann val >>= offset;
45971b9114dSArnd Bergmann val &= 1;
46071b9114dSArnd Bergmann
46171b9114dSArnd Bergmann return val;
46271b9114dSArnd Bergmann }
46371b9114dSArnd Bergmann
46471b9114dSArnd Bergmann /*
46571b9114dSArnd Bergmann * CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios
46671b9114dSArnd Bergmann * for use with the configuration calls, and other parts of the s3c gpiolib
46771b9114dSArnd Bergmann * support code.
46871b9114dSArnd Bergmann *
46971b9114dSArnd Bergmann * Not all s3c support code will need this, as some configurations of cpu
47071b9114dSArnd Bergmann * may only support one or two different configuration options and have an
47171b9114dSArnd Bergmann * easy gpio to samsung_gpio_chip mapping function. If this is the case, then
47271b9114dSArnd Bergmann * the machine support file should provide its own samsung_gpiolib_getchip()
47371b9114dSArnd Bergmann * and any other necessary functions.
47471b9114dSArnd Bergmann */
47571b9114dSArnd Bergmann
47671b9114dSArnd Bergmann #ifdef CONFIG_S3C_GPIO_TRACK
47771b9114dSArnd Bergmann struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END];
47871b9114dSArnd Bergmann
s3c_gpiolib_track(struct samsung_gpio_chip * chip)47971b9114dSArnd Bergmann static __init void s3c_gpiolib_track(struct samsung_gpio_chip *chip)
48071b9114dSArnd Bergmann {
48171b9114dSArnd Bergmann unsigned int gpn;
48271b9114dSArnd Bergmann int i;
48371b9114dSArnd Bergmann
48471b9114dSArnd Bergmann gpn = chip->chip.base;
48571b9114dSArnd Bergmann for (i = 0; i < chip->chip.ngpio; i++, gpn++) {
48671b9114dSArnd Bergmann BUG_ON(gpn >= ARRAY_SIZE(s3c_gpios));
48771b9114dSArnd Bergmann s3c_gpios[gpn] = chip;
48871b9114dSArnd Bergmann }
48971b9114dSArnd Bergmann }
49071b9114dSArnd Bergmann #endif /* CONFIG_S3C_GPIO_TRACK */
49171b9114dSArnd Bergmann
49271b9114dSArnd Bergmann /*
49371b9114dSArnd Bergmann * samsung_gpiolib_add() - add the Samsung gpio_chip.
49471b9114dSArnd Bergmann * @chip: The chip to register
49571b9114dSArnd Bergmann *
49671b9114dSArnd Bergmann * This is a wrapper to gpiochip_add() that takes our specific gpio chip
49771b9114dSArnd Bergmann * information and makes the necessary alterations for the platform and
49871b9114dSArnd Bergmann * notes the information for use with the configuration systems and any
49971b9114dSArnd Bergmann * other parts of the system.
50071b9114dSArnd Bergmann */
50171b9114dSArnd Bergmann
samsung_gpiolib_add(struct samsung_gpio_chip * chip)50271b9114dSArnd Bergmann static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip)
50371b9114dSArnd Bergmann {
50471b9114dSArnd Bergmann struct gpio_chip *gc = &chip->chip;
50571b9114dSArnd Bergmann int ret;
50671b9114dSArnd Bergmann
50771b9114dSArnd Bergmann BUG_ON(!chip->base);
50871b9114dSArnd Bergmann BUG_ON(!gc->label);
50971b9114dSArnd Bergmann BUG_ON(!gc->ngpio);
51071b9114dSArnd Bergmann
51171b9114dSArnd Bergmann spin_lock_init(&chip->lock);
51271b9114dSArnd Bergmann
51371b9114dSArnd Bergmann if (!gc->direction_input)
51471b9114dSArnd Bergmann gc->direction_input = samsung_gpiolib_2bit_input;
51571b9114dSArnd Bergmann if (!gc->direction_output)
51671b9114dSArnd Bergmann gc->direction_output = samsung_gpiolib_2bit_output;
51771b9114dSArnd Bergmann if (!gc->set)
51871b9114dSArnd Bergmann gc->set = samsung_gpiolib_set;
51971b9114dSArnd Bergmann if (!gc->get)
52071b9114dSArnd Bergmann gc->get = samsung_gpiolib_get;
52171b9114dSArnd Bergmann
52271b9114dSArnd Bergmann #ifdef CONFIG_PM
52371b9114dSArnd Bergmann if (chip->pm != NULL) {
52471b9114dSArnd Bergmann if (!chip->pm->save || !chip->pm->resume)
52571b9114dSArnd Bergmann pr_err("gpio: %s has missing PM functions\n",
52671b9114dSArnd Bergmann gc->label);
52771b9114dSArnd Bergmann } else
52871b9114dSArnd Bergmann pr_err("gpio: %s has no PM function\n", gc->label);
52971b9114dSArnd Bergmann #endif
53071b9114dSArnd Bergmann
53171b9114dSArnd Bergmann /* gpiochip_add() prints own failure message on error. */
53271b9114dSArnd Bergmann ret = gpiochip_add_data(gc, chip);
53371b9114dSArnd Bergmann if (ret >= 0)
53471b9114dSArnd Bergmann s3c_gpiolib_track(chip);
53571b9114dSArnd Bergmann }
53671b9114dSArnd Bergmann
samsung_gpiolib_add_2bit_chips(struct samsung_gpio_chip * chip,int nr_chips,void __iomem * base,unsigned int offset)53771b9114dSArnd Bergmann static void __init samsung_gpiolib_add_2bit_chips(struct samsung_gpio_chip *chip,
53871b9114dSArnd Bergmann int nr_chips, void __iomem *base,
53971b9114dSArnd Bergmann unsigned int offset)
54071b9114dSArnd Bergmann {
54171b9114dSArnd Bergmann int i;
54271b9114dSArnd Bergmann
54371b9114dSArnd Bergmann for (i = 0 ; i < nr_chips; i++, chip++) {
54471b9114dSArnd Bergmann chip->chip.direction_input = samsung_gpiolib_2bit_input;
54571b9114dSArnd Bergmann chip->chip.direction_output = samsung_gpiolib_2bit_output;
54671b9114dSArnd Bergmann
54771b9114dSArnd Bergmann if (!chip->config)
54871b9114dSArnd Bergmann chip->config = &samsung_gpio_cfgs[7];
54971b9114dSArnd Bergmann if (!chip->pm)
55071b9114dSArnd Bergmann chip->pm = __gpio_pm(&samsung_gpio_pm_2bit);
55171b9114dSArnd Bergmann if ((base != NULL) && (chip->base == NULL))
55271b9114dSArnd Bergmann chip->base = base + ((i) * offset);
55371b9114dSArnd Bergmann
55471b9114dSArnd Bergmann samsung_gpiolib_add(chip);
55571b9114dSArnd Bergmann }
55671b9114dSArnd Bergmann }
55771b9114dSArnd Bergmann
55871b9114dSArnd Bergmann /*
55971b9114dSArnd Bergmann * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config.
56071b9114dSArnd Bergmann * @chip: The gpio chip that is being configured.
56171b9114dSArnd Bergmann * @nr_chips: The no of chips (gpio ports) for the GPIO being configured.
56271b9114dSArnd Bergmann *
56371b9114dSArnd Bergmann * This helper deal with the GPIO cases where the control register has 4 bits
56471b9114dSArnd Bergmann * of control per GPIO, generally in the form of:
56571b9114dSArnd Bergmann * 0000 = Input
56671b9114dSArnd Bergmann * 0001 = Output
56771b9114dSArnd Bergmann * others = Special functions (dependent on bank)
56871b9114dSArnd Bergmann *
56971b9114dSArnd Bergmann * Note, since the code to deal with the case where there are two control
57071b9114dSArnd Bergmann * registers instead of one, we do not have a separate set of function
57171b9114dSArnd Bergmann * (samsung_gpiolib_add_4bit2_chips)for each case.
57271b9114dSArnd Bergmann */
57371b9114dSArnd Bergmann
samsung_gpiolib_add_4bit_chips(struct samsung_gpio_chip * chip,int nr_chips,void __iomem * base)57471b9114dSArnd Bergmann static void __init samsung_gpiolib_add_4bit_chips(struct samsung_gpio_chip *chip,
57571b9114dSArnd Bergmann int nr_chips, void __iomem *base)
57671b9114dSArnd Bergmann {
57771b9114dSArnd Bergmann int i;
57871b9114dSArnd Bergmann
57971b9114dSArnd Bergmann for (i = 0 ; i < nr_chips; i++, chip++) {
58071b9114dSArnd Bergmann chip->chip.direction_input = samsung_gpiolib_4bit_input;
58171b9114dSArnd Bergmann chip->chip.direction_output = samsung_gpiolib_4bit_output;
58271b9114dSArnd Bergmann
58371b9114dSArnd Bergmann if (!chip->config)
58471b9114dSArnd Bergmann chip->config = &samsung_gpio_cfgs[2];
58571b9114dSArnd Bergmann if (!chip->pm)
58671b9114dSArnd Bergmann chip->pm = __gpio_pm(&samsung_gpio_pm_4bit);
58771b9114dSArnd Bergmann if ((base != NULL) && (chip->base == NULL))
58871b9114dSArnd Bergmann chip->base = base + ((i) * 0x20);
58971b9114dSArnd Bergmann
59071b9114dSArnd Bergmann chip->bitmap_gpio_int = 0;
59171b9114dSArnd Bergmann
59271b9114dSArnd Bergmann samsung_gpiolib_add(chip);
59371b9114dSArnd Bergmann }
59471b9114dSArnd Bergmann }
59571b9114dSArnd Bergmann
samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip * chip,int nr_chips)59671b9114dSArnd Bergmann static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chip,
59771b9114dSArnd Bergmann int nr_chips)
59871b9114dSArnd Bergmann {
59971b9114dSArnd Bergmann for (; nr_chips > 0; nr_chips--, chip++) {
60071b9114dSArnd Bergmann chip->chip.direction_input = samsung_gpiolib_4bit2_input;
60171b9114dSArnd Bergmann chip->chip.direction_output = samsung_gpiolib_4bit2_output;
60271b9114dSArnd Bergmann
60371b9114dSArnd Bergmann if (!chip->config)
60471b9114dSArnd Bergmann chip->config = &samsung_gpio_cfgs[2];
60571b9114dSArnd Bergmann if (!chip->pm)
60671b9114dSArnd Bergmann chip->pm = __gpio_pm(&samsung_gpio_pm_4bit);
60771b9114dSArnd Bergmann
60871b9114dSArnd Bergmann samsung_gpiolib_add(chip);
60971b9114dSArnd Bergmann }
61071b9114dSArnd Bergmann }
61171b9114dSArnd Bergmann
samsung_gpiolib_to_irq(struct gpio_chip * chip,unsigned int offset)61271b9114dSArnd Bergmann int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
61371b9114dSArnd Bergmann {
61471b9114dSArnd Bergmann struct samsung_gpio_chip *samsung_chip = gpiochip_get_data(chip);
61571b9114dSArnd Bergmann
61671b9114dSArnd Bergmann return samsung_chip->irq_base + offset;
61771b9114dSArnd Bergmann }
61871b9114dSArnd Bergmann
s3c64xx_gpiolib_mbank_to_irq(struct gpio_chip * chip,unsigned pin)61971b9114dSArnd Bergmann static int s3c64xx_gpiolib_mbank_to_irq(struct gpio_chip *chip, unsigned pin)
62071b9114dSArnd Bergmann {
62171b9114dSArnd Bergmann return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;
62271b9114dSArnd Bergmann }
62371b9114dSArnd Bergmann
s3c64xx_gpiolib_lbank_to_irq(struct gpio_chip * chip,unsigned pin)62471b9114dSArnd Bergmann static int s3c64xx_gpiolib_lbank_to_irq(struct gpio_chip *chip, unsigned pin)
62571b9114dSArnd Bergmann {
62671b9114dSArnd Bergmann return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;
62771b9114dSArnd Bergmann }
62871b9114dSArnd Bergmann
62971b9114dSArnd Bergmann /*
63071b9114dSArnd Bergmann * GPIO bank summary:
63171b9114dSArnd Bergmann *
63271b9114dSArnd Bergmann * Bank GPIOs Style SlpCon ExtInt Group
63371b9114dSArnd Bergmann * A 8 4Bit Yes 1
63471b9114dSArnd Bergmann * B 7 4Bit Yes 1
63571b9114dSArnd Bergmann * C 8 4Bit Yes 2
63671b9114dSArnd Bergmann * D 5 4Bit Yes 3
63771b9114dSArnd Bergmann * E 5 4Bit Yes None
63871b9114dSArnd Bergmann * F 16 2Bit Yes 4 [1]
63971b9114dSArnd Bergmann * G 7 4Bit Yes 5
64071b9114dSArnd Bergmann * H 10 4Bit[2] Yes 6
64171b9114dSArnd Bergmann * I 16 2Bit Yes None
64271b9114dSArnd Bergmann * J 12 2Bit Yes None
64371b9114dSArnd Bergmann * K 16 4Bit[2] No None
64471b9114dSArnd Bergmann * L 15 4Bit[2] No None
64571b9114dSArnd Bergmann * M 6 4Bit No IRQ_EINT
64671b9114dSArnd Bergmann * N 16 2Bit No IRQ_EINT
64771b9114dSArnd Bergmann * O 16 2Bit Yes 7
64871b9114dSArnd Bergmann * P 15 2Bit Yes 8
64971b9114dSArnd Bergmann * Q 9 2Bit Yes 9
65071b9114dSArnd Bergmann *
65171b9114dSArnd Bergmann * [1] BANKF pins 14,15 do not form part of the external interrupt sources
65271b9114dSArnd Bergmann * [2] BANK has two control registers, GPxCON0 and GPxCON1
65371b9114dSArnd Bergmann */
65471b9114dSArnd Bergmann
65571b9114dSArnd Bergmann static struct samsung_gpio_chip s3c64xx_gpios_4bit[] = {
65671b9114dSArnd Bergmann {
65771b9114dSArnd Bergmann .chip = {
65871b9114dSArnd Bergmann .base = S3C64XX_GPA(0),
65971b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_A_NR,
66071b9114dSArnd Bergmann .label = "GPA",
66171b9114dSArnd Bergmann },
66271b9114dSArnd Bergmann }, {
66371b9114dSArnd Bergmann .chip = {
66471b9114dSArnd Bergmann .base = S3C64XX_GPB(0),
66571b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_B_NR,
66671b9114dSArnd Bergmann .label = "GPB",
66771b9114dSArnd Bergmann },
66871b9114dSArnd Bergmann }, {
66971b9114dSArnd Bergmann .chip = {
67071b9114dSArnd Bergmann .base = S3C64XX_GPC(0),
67171b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_C_NR,
67271b9114dSArnd Bergmann .label = "GPC",
67371b9114dSArnd Bergmann },
67471b9114dSArnd Bergmann }, {
67571b9114dSArnd Bergmann .chip = {
67671b9114dSArnd Bergmann .base = S3C64XX_GPD(0),
67771b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_D_NR,
67871b9114dSArnd Bergmann .label = "GPD",
67971b9114dSArnd Bergmann },
68071b9114dSArnd Bergmann }, {
68171b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[0],
68271b9114dSArnd Bergmann .chip = {
68371b9114dSArnd Bergmann .base = S3C64XX_GPE(0),
68471b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_E_NR,
68571b9114dSArnd Bergmann .label = "GPE",
68671b9114dSArnd Bergmann },
68771b9114dSArnd Bergmann }, {
68871b9114dSArnd Bergmann .base = S3C64XX_GPG_BASE,
68971b9114dSArnd Bergmann .chip = {
69071b9114dSArnd Bergmann .base = S3C64XX_GPG(0),
69171b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_G_NR,
69271b9114dSArnd Bergmann .label = "GPG",
69371b9114dSArnd Bergmann },
69471b9114dSArnd Bergmann }, {
69571b9114dSArnd Bergmann .base = S3C64XX_GPM_BASE,
69671b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[1],
69771b9114dSArnd Bergmann .chip = {
69871b9114dSArnd Bergmann .base = S3C64XX_GPM(0),
69971b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_M_NR,
70071b9114dSArnd Bergmann .label = "GPM",
70171b9114dSArnd Bergmann .to_irq = s3c64xx_gpiolib_mbank_to_irq,
70271b9114dSArnd Bergmann },
70371b9114dSArnd Bergmann },
70471b9114dSArnd Bergmann };
70571b9114dSArnd Bergmann
70671b9114dSArnd Bergmann static struct samsung_gpio_chip s3c64xx_gpios_4bit2[] = {
70771b9114dSArnd Bergmann {
70871b9114dSArnd Bergmann .base = S3C64XX_GPH_BASE + 0x4,
70971b9114dSArnd Bergmann .chip = {
71071b9114dSArnd Bergmann .base = S3C64XX_GPH(0),
71171b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_H_NR,
71271b9114dSArnd Bergmann .label = "GPH",
71371b9114dSArnd Bergmann },
71471b9114dSArnd Bergmann }, {
71571b9114dSArnd Bergmann .base = S3C64XX_GPK_BASE + 0x4,
71671b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[0],
71771b9114dSArnd Bergmann .chip = {
71871b9114dSArnd Bergmann .base = S3C64XX_GPK(0),
71971b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_K_NR,
72071b9114dSArnd Bergmann .label = "GPK",
72171b9114dSArnd Bergmann },
72271b9114dSArnd Bergmann }, {
72371b9114dSArnd Bergmann .base = S3C64XX_GPL_BASE + 0x4,
72471b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[1],
72571b9114dSArnd Bergmann .chip = {
72671b9114dSArnd Bergmann .base = S3C64XX_GPL(0),
72771b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_L_NR,
72871b9114dSArnd Bergmann .label = "GPL",
72971b9114dSArnd Bergmann .to_irq = s3c64xx_gpiolib_lbank_to_irq,
73071b9114dSArnd Bergmann },
73171b9114dSArnd Bergmann },
73271b9114dSArnd Bergmann };
73371b9114dSArnd Bergmann
73471b9114dSArnd Bergmann static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = {
73571b9114dSArnd Bergmann {
73671b9114dSArnd Bergmann .base = S3C64XX_GPF_BASE,
73771b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[6],
73871b9114dSArnd Bergmann .chip = {
73971b9114dSArnd Bergmann .base = S3C64XX_GPF(0),
74071b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_F_NR,
74171b9114dSArnd Bergmann .label = "GPF",
74271b9114dSArnd Bergmann },
74371b9114dSArnd Bergmann }, {
74471b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[7],
74571b9114dSArnd Bergmann .chip = {
74671b9114dSArnd Bergmann .base = S3C64XX_GPI(0),
74771b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_I_NR,
74871b9114dSArnd Bergmann .label = "GPI",
74971b9114dSArnd Bergmann },
75071b9114dSArnd Bergmann }, {
75171b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[7],
75271b9114dSArnd Bergmann .chip = {
75371b9114dSArnd Bergmann .base = S3C64XX_GPJ(0),
75471b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_J_NR,
75571b9114dSArnd Bergmann .label = "GPJ",
75671b9114dSArnd Bergmann },
75771b9114dSArnd Bergmann }, {
75871b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[6],
75971b9114dSArnd Bergmann .chip = {
76071b9114dSArnd Bergmann .base = S3C64XX_GPO(0),
76171b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_O_NR,
76271b9114dSArnd Bergmann .label = "GPO",
76371b9114dSArnd Bergmann },
76471b9114dSArnd Bergmann }, {
76571b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[6],
76671b9114dSArnd Bergmann .chip = {
76771b9114dSArnd Bergmann .base = S3C64XX_GPP(0),
76871b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_P_NR,
76971b9114dSArnd Bergmann .label = "GPP",
77071b9114dSArnd Bergmann },
77171b9114dSArnd Bergmann }, {
77271b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[6],
77371b9114dSArnd Bergmann .chip = {
77471b9114dSArnd Bergmann .base = S3C64XX_GPQ(0),
77571b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_Q_NR,
77671b9114dSArnd Bergmann .label = "GPQ",
77771b9114dSArnd Bergmann },
77871b9114dSArnd Bergmann }, {
77971b9114dSArnd Bergmann .base = S3C64XX_GPN_BASE,
78071b9114dSArnd Bergmann .irq_base = IRQ_EINT(0),
78171b9114dSArnd Bergmann .config = &samsung_gpio_cfgs[5],
78271b9114dSArnd Bergmann .chip = {
78371b9114dSArnd Bergmann .base = S3C64XX_GPN(0),
78471b9114dSArnd Bergmann .ngpio = S3C64XX_GPIO_N_NR,
78571b9114dSArnd Bergmann .label = "GPN",
78671b9114dSArnd Bergmann .to_irq = samsung_gpiolib_to_irq,
78771b9114dSArnd Bergmann },
78871b9114dSArnd Bergmann },
78971b9114dSArnd Bergmann };
79071b9114dSArnd Bergmann
79171b9114dSArnd Bergmann /* TODO: cleanup soc_is_* */
samsung_gpiolib_init(void)79271b9114dSArnd Bergmann static __init int samsung_gpiolib_init(void)
79371b9114dSArnd Bergmann {
79471b9114dSArnd Bergmann /*
79571b9114dSArnd Bergmann * Currently there are two drivers that can provide GPIO support for
79671b9114dSArnd Bergmann * Samsung SoCs. For device tree enabled platforms, the new
79771b9114dSArnd Bergmann * pinctrl-samsung driver is used, providing both GPIO and pin control
79871b9114dSArnd Bergmann * interfaces. For legacy (non-DT) platforms this driver is used.
79971b9114dSArnd Bergmann */
80071b9114dSArnd Bergmann if (of_have_populated_dt())
80171b9114dSArnd Bergmann return 0;
80271b9114dSArnd Bergmann
803*0d297df0SArnd Bergmann if (soc_is_s3c64xx()) {
80471b9114dSArnd Bergmann samsung_gpiolib_set_cfg(samsung_gpio_cfgs,
80571b9114dSArnd Bergmann ARRAY_SIZE(samsung_gpio_cfgs));
80671b9114dSArnd Bergmann samsung_gpiolib_add_2bit_chips(s3c64xx_gpios_2bit,
80771b9114dSArnd Bergmann ARRAY_SIZE(s3c64xx_gpios_2bit),
80871b9114dSArnd Bergmann S3C64XX_VA_GPIO + 0xE0, 0x20);
80971b9114dSArnd Bergmann samsung_gpiolib_add_4bit_chips(s3c64xx_gpios_4bit,
81071b9114dSArnd Bergmann ARRAY_SIZE(s3c64xx_gpios_4bit),
81171b9114dSArnd Bergmann S3C64XX_VA_GPIO);
81271b9114dSArnd Bergmann samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2,
81371b9114dSArnd Bergmann ARRAY_SIZE(s3c64xx_gpios_4bit2));
81471b9114dSArnd Bergmann }
81571b9114dSArnd Bergmann
81671b9114dSArnd Bergmann return 0;
81771b9114dSArnd Bergmann }
81871b9114dSArnd Bergmann core_initcall(samsung_gpiolib_init);
81971b9114dSArnd Bergmann
s3c_gpio_cfgpin(unsigned int pin,unsigned int config)82071b9114dSArnd Bergmann int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
82171b9114dSArnd Bergmann {
82271b9114dSArnd Bergmann struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
82371b9114dSArnd Bergmann unsigned long flags;
82471b9114dSArnd Bergmann int offset;
82571b9114dSArnd Bergmann int ret;
82671b9114dSArnd Bergmann
82771b9114dSArnd Bergmann if (!chip)
82871b9114dSArnd Bergmann return -EINVAL;
82971b9114dSArnd Bergmann
83071b9114dSArnd Bergmann offset = pin - chip->chip.base;
83171b9114dSArnd Bergmann
83271b9114dSArnd Bergmann samsung_gpio_lock(chip, flags);
83371b9114dSArnd Bergmann ret = samsung_gpio_do_setcfg(chip, offset, config);
83471b9114dSArnd Bergmann samsung_gpio_unlock(chip, flags);
83571b9114dSArnd Bergmann
83671b9114dSArnd Bergmann return ret;
83771b9114dSArnd Bergmann }
83871b9114dSArnd Bergmann EXPORT_SYMBOL(s3c_gpio_cfgpin);
83971b9114dSArnd Bergmann
s3c_gpio_cfgpin_range(unsigned int start,unsigned int nr,unsigned int cfg)84071b9114dSArnd Bergmann int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
84171b9114dSArnd Bergmann unsigned int cfg)
84271b9114dSArnd Bergmann {
84371b9114dSArnd Bergmann int ret;
84471b9114dSArnd Bergmann
84571b9114dSArnd Bergmann for (; nr > 0; nr--, start++) {
84671b9114dSArnd Bergmann ret = s3c_gpio_cfgpin(start, cfg);
84771b9114dSArnd Bergmann if (ret != 0)
84871b9114dSArnd Bergmann return ret;
84971b9114dSArnd Bergmann }
85071b9114dSArnd Bergmann
85171b9114dSArnd Bergmann return 0;
85271b9114dSArnd Bergmann }
85371b9114dSArnd Bergmann EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range);
85471b9114dSArnd Bergmann
s3c_gpio_cfgall_range(unsigned int start,unsigned int nr,unsigned int cfg,samsung_gpio_pull_t pull)85571b9114dSArnd Bergmann int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
85671b9114dSArnd Bergmann unsigned int cfg, samsung_gpio_pull_t pull)
85771b9114dSArnd Bergmann {
85871b9114dSArnd Bergmann int ret;
85971b9114dSArnd Bergmann
86071b9114dSArnd Bergmann for (; nr > 0; nr--, start++) {
86171b9114dSArnd Bergmann s3c_gpio_setpull(start, pull);
86271b9114dSArnd Bergmann ret = s3c_gpio_cfgpin(start, cfg);
86371b9114dSArnd Bergmann if (ret != 0)
86471b9114dSArnd Bergmann return ret;
86571b9114dSArnd Bergmann }
86671b9114dSArnd Bergmann
86771b9114dSArnd Bergmann return 0;
86871b9114dSArnd Bergmann }
86971b9114dSArnd Bergmann EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range);
87071b9114dSArnd Bergmann
s3c_gpio_setpull(unsigned int pin,samsung_gpio_pull_t pull)87171b9114dSArnd Bergmann int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull)
87271b9114dSArnd Bergmann {
87371b9114dSArnd Bergmann struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
87471b9114dSArnd Bergmann unsigned long flags;
87571b9114dSArnd Bergmann int offset, ret;
87671b9114dSArnd Bergmann
87771b9114dSArnd Bergmann if (!chip)
87871b9114dSArnd Bergmann return -EINVAL;
87971b9114dSArnd Bergmann
88071b9114dSArnd Bergmann offset = pin - chip->chip.base;
88171b9114dSArnd Bergmann
88271b9114dSArnd Bergmann samsung_gpio_lock(chip, flags);
88371b9114dSArnd Bergmann ret = samsung_gpio_do_setpull(chip, offset, pull);
88471b9114dSArnd Bergmann samsung_gpio_unlock(chip, flags);
88571b9114dSArnd Bergmann
88671b9114dSArnd Bergmann return ret;
88771b9114dSArnd Bergmann }
88871b9114dSArnd Bergmann EXPORT_SYMBOL(s3c_gpio_setpull);
889