1 // SPDX-License-Identifier: GPL-2.0-only
28 #include <linux/pinctrl/pinconf-generic.h>
69 	(CY8C95X0_VIRTUAL + (x) - CY8C95X0_PORTSEL + (p) * MUXED_STRIDE)
92 	{ "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
117 		 * Since first controller (gpio-sch.c) and second
118 		 * (gpio-dwapb.c) are at the fixed bases, we may safely
130  * struct cy8c95x0_pinctrl - driver data
141  * @nport:          Number of Gports in this chip
142  * @gpio_chip:      gpiolib chip
148  * @name:           Chip controller name
315 static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip,
318 static inline u8 cypress_get_port(struct cy8c95x0_pinctrl *chip, unsigned int pin)  in cypress_get_port()  argument
324 static int cypress_get_pin_mask(struct cy8c95x0_pinctrl *chip, unsigned int pin)  in cypress_get_pin_mask()  argument
474 static inline int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip,  in cy8c95x0_regmap_update_bits_base()  argument
482 	int ret, off, i;  in cy8c95x0_regmap_update_bits_base()  local
486 		return -EINVAL;  in cy8c95x0_regmap_update_bits_base()
490 		off = CY8C95X0_MUX_REGMAP_TO_OFFSET(reg, port);  in cy8c95x0_regmap_update_bits_base()
494 			off = reg + port;  in cy8c95x0_regmap_update_bits_base()
496 			off = reg;  in cy8c95x0_regmap_update_bits_base()
498 	guard(mutex)(&chip->i2c_lock);  in cy8c95x0_regmap_update_bits_base()
500 	ret = regmap_update_bits_base(chip->regmap, off, mask, val, change, async, force);  in cy8c95x0_regmap_update_bits_base()
505 	 * Allows to mark the registers as non-volatile and reduces I/O cycles.  in cy8c95x0_regmap_update_bits_base()
509 		regcache_cache_only(chip->regmap, true);  in cy8c95x0_regmap_update_bits_base()
514 			off = CY8C95X0_MUX_REGMAP_TO_OFFSET(i, port);  in cy8c95x0_regmap_update_bits_base()
515 			regmap_clear_bits(chip->regmap, off, mask & val);  in cy8c95x0_regmap_update_bits_base()
517 		regcache_cache_only(chip->regmap, false);  in cy8c95x0_regmap_update_bits_base()
524  * cy8c95x0_regmap_write_bits() - writes a register using the regmap cache
525  * @chip: The pinctrl to work on
541 static int cy8c95x0_regmap_write_bits(struct cy8c95x0_pinctrl *chip, unsigned int reg,  in cy8c95x0_regmap_write_bits()  argument
544 	return cy8c95x0_regmap_update_bits_base(chip, reg, port, mask, val, NULL, false, true);  in cy8c95x0_regmap_write_bits()
548  * cy8c95x0_regmap_update_bits() - updates a register using the regmap cache
549  * @chip: The pinctrl to work on
565 static int cy8c95x0_regmap_update_bits(struct cy8c95x0_pinctrl *chip, unsigned int reg,  in cy8c95x0_regmap_update_bits()  argument
568 	return cy8c95x0_regmap_update_bits_base(chip, reg, port, mask, val, NULL, false, false);  in cy8c95x0_regmap_update_bits()
572  * cy8c95x0_regmap_read() - reads a register using the regmap cache
573  * @chip: The pinctrl to work on
587 static int cy8c95x0_regmap_read(struct cy8c95x0_pinctrl *chip, unsigned int reg,  in cy8c95x0_regmap_read()  argument
590 	int off, ret;  in cy8c95x0_regmap_read()  local
594 		off = CY8C95X0_MUX_REGMAP_TO_OFFSET(reg, port);  in cy8c95x0_regmap_read()
598 			off = reg + port;  in cy8c95x0_regmap_read()
600 			off = reg;  in cy8c95x0_regmap_read()
602 	guard(mutex)(&chip->i2c_lock);  in cy8c95x0_regmap_read()
604 	ret = regmap_read(chip->regmap, off, read_val);  in cy8c95x0_regmap_read()
609 static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,  in cy8c95x0_write_regs_mask()  argument
620 	bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE);  in cy8c95x0_write_regs_mask()
622 	bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3);  in cy8c95x0_write_regs_mask()
624 	bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE);  in cy8c95x0_write_regs_mask()
626 	bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3);  in cy8c95x0_write_regs_mask()
628 	for (i = 0; i < chip->nport; i++) {  in cy8c95x0_write_regs_mask()
636 		ret = cy8c95x0_regmap_update_bits(chip, reg, i, bits, write_val);  in cy8c95x0_write_regs_mask()
643 		dev_err(chip->dev, "failed writing register %d, port %d: err %d\n", reg, i, ret);  in cy8c95x0_write_regs_mask()
648 static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,  in cy8c95x0_read_regs_mask()  argument
660 	bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
662 	bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3);  in cy8c95x0_read_regs_mask()
664 	bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
666 	bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3);  in cy8c95x0_read_regs_mask()
668 	for (i = 0; i < chip->nport; i++) {  in cy8c95x0_read_regs_mask()
674 		ret = cy8c95x0_regmap_read(chip, reg, i, &read_val);  in cy8c95x0_read_regs_mask()
685 	bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
689 		dev_err(chip->dev, "failed reading register %d, port %d: err %d\n", reg, i, ret);  in cy8c95x0_read_regs_mask()
694 static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off)  in cy8c95x0_gpio_direction_input()  argument
696 	return pinctrl_gpio_direction_input(gc, off);  in cy8c95x0_gpio_direction_input()
700 					  unsigned int off, int val)  in cy8c95x0_gpio_direction_output()  argument
702 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_gpio_direction_output()  local
703 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_gpio_direction_output()
704 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_gpio_direction_output()
708 	ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_OUTPUT, port, bit, val ? bit : 0);  in cy8c95x0_gpio_direction_output()
712 	return pinctrl_gpio_direction_output(gc, off);  in cy8c95x0_gpio_direction_output()
715 static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off)  in cy8c95x0_gpio_get_value()  argument
717 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_gpio_get_value()  local
718 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_gpio_get_value()
719 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_gpio_get_value()
723 	ret = cy8c95x0_regmap_read(chip, CY8C95X0_INPUT, port, &reg_val);  in cy8c95x0_gpio_get_value()
737 static void cy8c95x0_gpio_set_value(struct gpio_chip *gc, unsigned int off,  in cy8c95x0_gpio_set_value()  argument
740 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_gpio_set_value()  local
741 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_gpio_set_value()
742 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_gpio_set_value()
744 	cy8c95x0_regmap_write_bits(chip, CY8C95X0_OUTPUT, port, bit, val ? bit : 0);  in cy8c95x0_gpio_set_value()
747 static int cy8c95x0_gpio_get_direction(struct gpio_chip *gc, unsigned int off)  in cy8c95x0_gpio_get_direction()  argument
749 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_gpio_get_direction()  local
750 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_gpio_get_direction()
751 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_gpio_get_direction()
755 	ret = cy8c95x0_regmap_read(chip, CY8C95X0_DIRECTION, port, &reg_val);  in cy8c95x0_gpio_get_direction()
767 static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip,  in cy8c95x0_gpio_get_pincfg()  argument
768 				    unsigned int off,  in cy8c95x0_gpio_get_pincfg()  argument
772 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_gpio_get_pincfg()
773 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_gpio_get_pincfg()
826 		ret = -ENOTSUPP;  in cy8c95x0_gpio_get_pincfg()
833 	ret = cy8c95x0_regmap_read(chip, reg, port, &reg_val);  in cy8c95x0_gpio_get_pincfg()
847 static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,  in cy8c95x0_gpio_set_pincfg()  argument
848 				    unsigned int off,  in cy8c95x0_gpio_set_pincfg()  argument
851 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_gpio_set_pincfg()
852 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_gpio_set_pincfg()
860 		__clear_bit(off, chip->push_pull);  in cy8c95x0_gpio_set_pincfg()
864 		__clear_bit(off, chip->push_pull);  in cy8c95x0_gpio_set_pincfg()
868 		__clear_bit(off, chip->push_pull);  in cy8c95x0_gpio_set_pincfg()
872 		__clear_bit(off, chip->push_pull);  in cy8c95x0_gpio_set_pincfg()
876 		__clear_bit(off, chip->push_pull);  in cy8c95x0_gpio_set_pincfg()
880 		__set_bit(off, chip->push_pull);  in cy8c95x0_gpio_set_pincfg()
887 		ret = cy8c95x0_pinmux_direction(chip, off, !arg);  in cy8c95x0_gpio_set_pincfg()
890 		ret = cy8c95x0_pinmux_direction(chip, off, arg);  in cy8c95x0_gpio_set_pincfg()
893 		ret = -ENOTSUPP;  in cy8c95x0_gpio_set_pincfg()
900 	ret = cy8c95x0_regmap_write_bits(chip, reg, port, bit, bit);  in cy8c95x0_gpio_set_pincfg()
908 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_gpio_get_multiple()  local
910 	return cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, bits, mask);  in cy8c95x0_gpio_get_multiple()
916 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_gpio_set_multiple()  local
918 	cy8c95x0_write_regs_mask(chip, CY8C95X0_OUTPUT, bits, mask);  in cy8c95x0_gpio_set_multiple()
923 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_add_pin_ranges()  local
924 	struct device *dev = chip->dev;  in cy8c95x0_add_pin_ranges()
927 	ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin);  in cy8c95x0_add_pin_ranges()
934 static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip)  in cy8c95x0_setup_gpiochip()  argument
936 	struct gpio_chip *gc = &chip->gpio_chip;  in cy8c95x0_setup_gpiochip()
938 	gc->request = gpiochip_generic_request;  in cy8c95x0_setup_gpiochip()
939 	gc->free = gpiochip_generic_free;  in cy8c95x0_setup_gpiochip()
940 	gc->direction_input  = cy8c95x0_gpio_direction_input;  in cy8c95x0_setup_gpiochip()
941 	gc->direction_output = cy8c95x0_gpio_direction_output;  in cy8c95x0_setup_gpiochip()
942 	gc->get = cy8c95x0_gpio_get_value;  in cy8c95x0_setup_gpiochip()
943 	gc->set = cy8c95x0_gpio_set_value;  in cy8c95x0_setup_gpiochip()
944 	gc->get_direction = cy8c95x0_gpio_get_direction;  in cy8c95x0_setup_gpiochip()
945 	gc->get_multiple = cy8c95x0_gpio_get_multiple;  in cy8c95x0_setup_gpiochip()
946 	gc->set_multiple = cy8c95x0_gpio_set_multiple;  in cy8c95x0_setup_gpiochip()
947 	gc->set_config = gpiochip_generic_config;  in cy8c95x0_setup_gpiochip()
948 	gc->can_sleep = true;  in cy8c95x0_setup_gpiochip()
949 	gc->add_pin_ranges = cy8c95x0_add_pin_ranges;  in cy8c95x0_setup_gpiochip()
951 	gc->base = -1;  in cy8c95x0_setup_gpiochip()
952 	gc->ngpio = chip->tpin;  in cy8c95x0_setup_gpiochip()
954 	gc->parent = chip->dev;  in cy8c95x0_setup_gpiochip()
955 	gc->owner = THIS_MODULE;  in cy8c95x0_setup_gpiochip()
956 	gc->names = NULL;  in cy8c95x0_setup_gpiochip()
958 	gc->label = dev_name(chip->dev);  in cy8c95x0_setup_gpiochip()
960 	return devm_gpiochip_add_data(chip->dev, gc, chip);  in cy8c95x0_setup_gpiochip()
966 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_irq_mask()  local
969 	set_bit(hwirq, chip->irq_mask);  in cy8c95x0_irq_mask()
976 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_irq_unmask()  local
980 	clear_bit(hwirq, chip->irq_mask);  in cy8c95x0_irq_unmask()
986 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_irq_bus_lock()  local
988 	mutex_lock(&chip->irq_lock);  in cy8c95x0_irq_bus_lock()
994 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_irq_bus_sync_unlock()  local
1001 	cy8c95x0_write_regs_mask(chip, CY8C95X0_INTMASK, chip->irq_mask, ones);  in cy8c95x0_irq_bus_sync_unlock()
1004 	cy8c95x0_read_regs_mask(chip, CY8C95X0_DIRECTION, reg_direction, chip->irq_mask);  in cy8c95x0_irq_bus_sync_unlock()
1005 	bitmap_or(irq_mask, chip->irq_mask, reg_direction, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
1009 	cy8c95x0_write_regs_mask(chip, CY8C95X0_DIRECTION, ones, irq_mask);  in cy8c95x0_irq_bus_sync_unlock()
1011 	mutex_unlock(&chip->irq_lock);  in cy8c95x0_irq_bus_sync_unlock()
1017 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_irq_set_type()  local
1034 		dev_err(chip->dev, "irq %d: unsupported type %d\n", d->irq, type);  in cy8c95x0_irq_set_type()
1035 		return -EINVAL;  in cy8c95x0_irq_set_type()
1038 	assign_bit(hwirq, chip->irq_trig_fall, trig_type & IRQ_TYPE_EDGE_FALLING);  in cy8c95x0_irq_set_type()
1039 	assign_bit(hwirq, chip->irq_trig_raise, trig_type & IRQ_TYPE_EDGE_RISING);  in cy8c95x0_irq_set_type()
1040 	assign_bit(hwirq, chip->irq_trig_low, type == IRQ_TYPE_LEVEL_LOW);  in cy8c95x0_irq_set_type()
1041 	assign_bit(hwirq, chip->irq_trig_high, type == IRQ_TYPE_LEVEL_HIGH);  in cy8c95x0_irq_set_type()
1049 	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);  in cy8c95x0_irq_shutdown()  local
1052 	clear_bit(hwirq, chip->irq_trig_raise);  in cy8c95x0_irq_shutdown()
1053 	clear_bit(hwirq, chip->irq_trig_fall);  in cy8c95x0_irq_shutdown()
1054 	clear_bit(hwirq, chip->irq_trig_low);  in cy8c95x0_irq_shutdown()
1055 	clear_bit(hwirq, chip->irq_trig_high);  in cy8c95x0_irq_shutdown()
1059 	.name = "cy8c95x0-irq",
1070 static bool cy8c95x0_irq_pending(struct cy8c95x0_pinctrl *chip, unsigned long *pending)  in cy8c95x0_irq_pending()  argument
1080 	if (cy8c95x0_read_regs_mask(chip, CY8C95X0_INTSTATUS, trigger, ones))  in cy8c95x0_irq_pending()
1084 	if (cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, cur_stat, trigger))  in cy8c95x0_irq_pending()
1088 	bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise,  in cy8c95x0_irq_pending()
1098 	struct cy8c95x0_pinctrl *chip = devid;  in cy8c95x0_irq_handler()  local
1099 	struct gpio_chip *gc = &chip->gpio_chip;  in cy8c95x0_irq_handler()
1104 	ret = cy8c95x0_irq_pending(chip, pending);  in cy8c95x0_irq_handler()
1111 		nested_irq = irq_find_mapping(gc->irq.domain, level);  in cy8c95x0_irq_handler()
1114 			dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level);  in cy8c95x0_irq_handler()
1118 		if (test_bit(level, chip->irq_trig_low))  in cy8c95x0_irq_handler()
1121 		else if (test_bit(level, chip->irq_trig_high))  in cy8c95x0_irq_handler()
1135 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_pinctrl_get_groups_count()  local
1137 	return chip->tpin;  in cy8c95x0_pinctrl_get_groups_count()
1167 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_pin_dbg_show()  local
1174 	if (cy8c95x0_read_regs_mask(chip, CY8C95X0_PWMSEL, pwm, mask)) {  in cy8c95x0_pin_dbg_show()
1207 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_get_function_groups()  local
1210 	*num_groups = chip->tpin;  in cy8c95x0_get_function_groups()
1214 static int cy8c95x0_set_mode(struct cy8c95x0_pinctrl *chip, unsigned int off, bool mode)  in cy8c95x0_set_mode()  argument
1216 	u8 port = cypress_get_port(chip, off);  in cy8c95x0_set_mode()
1217 	u8 bit = cypress_get_pin_mask(chip, off);  in cy8c95x0_set_mode()
1219 	return cy8c95x0_regmap_write_bits(chip, CY8C95X0_PWMSEL, port, bit, mode ? bit : 0);  in cy8c95x0_set_mode()
1222 static int cy8c95x0_pinmux_mode(struct cy8c95x0_pinctrl *chip,  in cy8c95x0_pinmux_mode()  argument
1225 	u8 port = cypress_get_port(chip, group);  in cy8c95x0_pinmux_mode()
1226 	u8 bit = cypress_get_pin_mask(chip, group);  in cy8c95x0_pinmux_mode()
1229 	ret = cy8c95x0_set_mode(chip, group, selector);  in cy8c95x0_pinmux_mode()
1237 	ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DIRECTION, port, bit, bit);  in cy8c95x0_pinmux_mode()
1241 	return cy8c95x0_regmap_write_bits(chip, CY8C95X0_OUTPUT, port, bit, bit);  in cy8c95x0_pinmux_mode()
1247 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_set_mux()  local
1249 	return cy8c95x0_pinmux_mode(chip, selector, group);  in cy8c95x0_set_mux()
1256 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_gpio_request_enable()  local
1258 	return cy8c95x0_set_mode(chip, pin, false);  in cy8c95x0_gpio_request_enable()
1261 static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip,  in cy8c95x0_pinmux_direction()  argument
1264 	u8 port = cypress_get_port(chip, pin);  in cy8c95x0_pinmux_direction()
1265 	u8 bit = cypress_get_pin_mask(chip, pin);  in cy8c95x0_pinmux_direction()
1268 	ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DIRECTION, port, bit, input ? bit : 0);  in cy8c95x0_pinmux_direction()
1274 	 * the direction register isn't sufficient in Push-Pull mode.  in cy8c95x0_pinmux_direction()
1276 	if (input && test_bit(pin, chip->push_pull)) {  in cy8c95x0_pinmux_direction()
1277 		ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DRV_HIZ, port, bit, bit);  in cy8c95x0_pinmux_direction()
1281 		__clear_bit(pin, chip->push_pull);  in cy8c95x0_pinmux_direction()
1291 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_gpio_set_direction()  local
1293 	return cy8c95x0_pinmux_direction(chip, pin, input);  in cy8c95x0_gpio_set_direction()
1309 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_pinconf_get()  local
1311 	return cy8c95x0_gpio_get_pincfg(chip, pin, config);  in cy8c95x0_pinconf_get()
1317 	struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev);  in cy8c95x0_pinconf_set()  local
1322 		ret = cy8c95x0_gpio_set_pincfg(chip, pin, configs[i]);  in cy8c95x0_pinconf_set()
1336 static int cy8c95x0_irq_setup(struct cy8c95x0_pinctrl *chip, int irq)  in cy8c95x0_irq_setup()  argument
1338 	struct gpio_irq_chip *girq = &chip->gpio_chip.irq;  in cy8c95x0_irq_setup()
1342 	mutex_init(&chip->irq_lock);  in cy8c95x0_irq_setup()
1347 	ret = cy8c95x0_irq_pending(chip, pending_irqs);  in cy8c95x0_irq_setup()
1349 		dev_err(chip->dev, "failed to clear irq status register\n");  in cy8c95x0_irq_setup()
1354 	bitmap_fill(chip->irq_mask, MAX_LINE);  in cy8c95x0_irq_setup()
1359 	girq->parent_handler = NULL;  in cy8c95x0_irq_setup()
1360 	girq->num_parents = 0;  in cy8c95x0_irq_setup()
1361 	girq->parents = NULL;  in cy8c95x0_irq_setup()
1362 	girq->default_type = IRQ_TYPE_NONE;  in cy8c95x0_irq_setup()
1363 	girq->handler = handle_simple_irq;  in cy8c95x0_irq_setup()
1364 	girq->threaded = true;  in cy8c95x0_irq_setup()
1366 	ret = devm_request_threaded_irq(chip->dev, irq,  in cy8c95x0_irq_setup()
1369 					dev_name(chip->dev), chip);  in cy8c95x0_irq_setup()
1371 		dev_err(chip->dev, "failed to request irq %d\n", irq);  in cy8c95x0_irq_setup()
1374 	dev_info(chip->dev, "Registered threaded IRQ\n");  in cy8c95x0_irq_setup()
1379 static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip)  in cy8c95x0_setup_pinctrl()  argument
1381 	struct pinctrl_desc *pd = &chip->pinctrl_desc;  in cy8c95x0_setup_pinctrl()
1383 	pd->pctlops = &cy8c95x0_pinctrl_ops;  in cy8c95x0_setup_pinctrl()
1384 	pd->confops = &cy8c95x0_pinconf_ops;  in cy8c95x0_setup_pinctrl()
1385 	pd->pmxops = &cy8c95x0_pmxops;  in cy8c95x0_setup_pinctrl()
1386 	pd->name = dev_name(chip->dev);  in cy8c95x0_setup_pinctrl()
1387 	pd->pins = cy8c9560_pins;  in cy8c95x0_setup_pinctrl()
1388 	pd->npins = chip->tpin;  in cy8c95x0_setup_pinctrl()
1389 	pd->owner = THIS_MODULE;  in cy8c95x0_setup_pinctrl()
1391 	chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip);  in cy8c95x0_setup_pinctrl()
1392 	if (IS_ERR(chip->pctldev))  in cy8c95x0_setup_pinctrl()
1393 		return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev),  in cy8c95x0_setup_pinctrl()
1402 	struct i2c_adapter *adapter = client->adapter;  in cy8c95x0_detect()
1407 		return -ENODEV;  in cy8c95x0_detect()
1423 		return -ENODEV;  in cy8c95x0_detect()
1426 	dev_info(&client->dev, "Found a %s chip at 0x%02x.\n", name, client->addr);  in cy8c95x0_detect()
1427 	strscpy(info->type, name, I2C_NAME_SIZE);  in cy8c95x0_detect()
1434 	struct cy8c95x0_pinctrl *chip;  in cy8c95x0_probe()  local
1440 	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);  in cy8c95x0_probe()
1441 	if (!chip)  in cy8c95x0_probe()
1442 		return -ENOMEM;  in cy8c95x0_probe()
1444 	chip->dev = &client->dev;  in cy8c95x0_probe()
1447 	chip->driver_data = (uintptr_t)i2c_get_match_data(client);  in cy8c95x0_probe()
1448 	if (!chip->driver_data)  in cy8c95x0_probe()
1449 		return -ENODEV;  in cy8c95x0_probe()
1451 	i2c_set_clientdata(client, chip);  in cy8c95x0_probe()
1453 	chip->tpin = chip->driver_data & CY8C95X0_GPIO_MASK;  in cy8c95x0_probe()
1454 	chip->nport = DIV_ROUND_UP(CY8C95X0_PIN_TO_OFFSET(chip->tpin), BANK_SZ);  in cy8c95x0_probe()
1458 	switch (chip->tpin) {  in cy8c95x0_probe()
1460 		strscpy(chip->name, cy8c95x0_id[0].name, I2C_NAME_SIZE);  in cy8c95x0_probe()
1464 		strscpy(chip->name, cy8c95x0_id[1].name, I2C_NAME_SIZE);  in cy8c95x0_probe()
1468 		strscpy(chip->name, cy8c95x0_id[2].name, I2C_NAME_SIZE);  in cy8c95x0_probe()
1472 		return -ENODEV;  in cy8c95x0_probe()
1475 	reg = devm_regulator_get(&client->dev, "vdd");  in cy8c95x0_probe()
1477 		if (PTR_ERR(reg) == -EPROBE_DEFER)  in cy8c95x0_probe()
1478 			return -EPROBE_DEFER;  in cy8c95x0_probe()
1482 			dev_err(&client->dev, "failed to enable regulator vdd: %d\n", ret);  in cy8c95x0_probe()
1485 		chip->regulator = reg;  in cy8c95x0_probe()
1488 	/* bring the chip out of reset if reset pin is provided */  in cy8c95x0_probe()
1489 	chip->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH);  in cy8c95x0_probe()
1490 	if (IS_ERR(chip->gpio_reset)) {  in cy8c95x0_probe()
1491 		ret = dev_err_probe(chip->dev, PTR_ERR(chip->gpio_reset),  in cy8c95x0_probe()
1494 	} else if (chip->gpio_reset) {  in cy8c95x0_probe()
1496 		gpiod_set_value_cansleep(chip->gpio_reset, 0);  in cy8c95x0_probe()
1499 		gpiod_set_consumer_name(chip->gpio_reset, "CY8C95X0 RESET");  in cy8c95x0_probe()
1508 	chip->regmap = devm_regmap_init_i2c(client, &regmap_conf);  in cy8c95x0_probe()
1509 	if (IS_ERR(chip->regmap)) {  in cy8c95x0_probe()
1510 		ret = PTR_ERR(chip->regmap);  in cy8c95x0_probe()
1514 	bitmap_zero(chip->push_pull, MAX_LINE);  in cy8c95x0_probe()
1515 	bitmap_zero(chip->shiftmask, MAX_LINE);  in cy8c95x0_probe()
1516 	bitmap_set(chip->shiftmask, 0, 20);  in cy8c95x0_probe()
1517 	mutex_init(&chip->i2c_lock);  in cy8c95x0_probe()
1520 		ret = cy8c95x0_acpi_get_irq(&client->dev);  in cy8c95x0_probe()
1522 			client->irq = ret;  in cy8c95x0_probe()
1525 	if (client->irq) {  in cy8c95x0_probe()
1526 		ret = cy8c95x0_irq_setup(chip, client->irq);  in cy8c95x0_probe()
1531 	ret = cy8c95x0_setup_pinctrl(chip);  in cy8c95x0_probe()
1535 	ret = cy8c95x0_setup_gpiochip(chip);  in cy8c95x0_probe()
1542 	if (!IS_ERR_OR_NULL(chip->regulator))  in cy8c95x0_probe()
1543 		regulator_disable(chip->regulator);  in cy8c95x0_probe()
1549 	struct cy8c95x0_pinctrl *chip = i2c_get_clientdata(client);  in cy8c95x0_remove()  local
1551 	if (!IS_ERR_OR_NULL(chip->regulator))  in cy8c95x0_remove()
1552 		regulator_disable(chip->regulator);  in cy8c95x0_remove()
1563 		.name	= "cy8c95x0-pinctrl",