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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac1000_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
9 Copyright (C) 2007-2009 STMicroelectronics Ltd
28 void __iomem *ioaddr = hw->pcsr; in dwmac1000_core_init()
30 int mtu = dev->mtu; in dwmac1000_core_init()
32 /* Configure GMAC core */ in dwmac1000_core_init()
40 if (hw->ps) { in dwmac1000_core_init()
43 value &= ~hw->link.speed_mask; in dwmac1000_core_init()
44 switch (hw->ps) { in dwmac1000_core_init()
46 value |= hw->link.speed1000; in dwmac1000_core_init()
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H A Ddwmac4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
29 void __iomem *ioaddr = hw->pcsr; in dwmac4_core_init()
35 if (hw->ps) { in dwmac4_core_init()
38 value &= hw->link.speed_mask; in dwmac4_core_init()
39 switch (hw->ps) { in dwmac4_core_init()
41 value |= hw->link.speed1000; in dwmac4_core_init()
44 value |= hw->link.speed100; in dwmac4_core_init()
47 value |= hw->link.speed10; in dwmac4_core_init()
54 /* Configure LPI 1us counter to number of CSR clock ticks in 1us - 1 */ in dwmac4_core_init()
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/linux/arch/arm/boot/dts/st/
H A Dspear13xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
21 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
28 next-level-cache = <&L2>;
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/linux/Documentation/filesystems/smb/
H A Dksmbd.rst1 .. SPDX-License-Identifier: GPL-2.0
4 KSMBD - SMB3 Kernel Server
23 ---------------------
36 as workitems and to be executed in the handlers of the ksmbd-io kworker threads.
44 for each command which is further queued to be handled by ksmbd-io kworkers.
50 --------------------------------
77 Multi-credits Supported.
79 HMAC-SHA256 Signing Supported.
82 Pre-authentication integrity Supported.
85 SMB3 Multi-channel Partially Supported. Planned to implement
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/linux/drivers/net/ethernet/marvell/
H A Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
266 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
268 CHIP_REV_YU_LITE_A1 = 3, /* Chip Rev. for YUKON-Lite A1,A2 */
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H A Dsky2.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * of the original driver such as link fail-over and link management because
19 #include <linux/dma-mapping.h>
54 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
70 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))
77 static int debug = -1; /* defaults above */
85 static int disable_msi = -1;
94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
96 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
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/linux/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_main.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/dma-mapping.h>
54 static int debug = -1;
73 * sxgbe_verify_args - verify the driver parameters.
86 if (!priv->tx_path_in_lpi_mode) in sxgbe_enable_eee_mode()
87 priv->hw->mac->set_eee_mode(priv->ioaddr); in sxgbe_enable_eee_mode()
93 priv->hw->mac->reset_eee_mode(priv->ioaddr); in sxgbe_disable_eee_mode()
94 timer_delete_sync(&priv->eee_ctrl_timer); in sxgbe_disable_eee_mode()
95 priv->tx_path_in_lpi_mode = false; in sxgbe_disable_eee_mode()
111 mod_timer(&priv->eee_ctrl_timer, SXGBE_LPI_TIMER(eee_timer)); in sxgbe_eee_ctrl_timer()
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/linux/drivers/net/ethernet/sis/
H A Dsis190.c35 #include <linux/dma-mapping.h>
102 GIoCR = 0x48, // unused (GMAC IO Compensation)
103 GIoCtrl = 0x4c, // unused (GMAC IO Control)
159 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
191 LSEN = 0x08000000, // TSO ? -- FR
224 RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
345 } debug = { -1 };
349 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
360 * Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
402 mdio_write(tp->mmio_addr, phy_id, reg, val); in __mdio_write()
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/linux/drivers/net/ethernet/via/
H A Dvia-velocity.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * File: via-velocity.h
10 * Author: Chuang Liang-Shing, AJ Jiang
21 #define VELOCITY_NAME "via-velocity"
30 #define OPTION_DEFAULT { [0 ... MAX_UNITS-1] = -1}
126 #define TCR0_JMBO 0x02 // indicate a jumbo packet in GMAC side
167 __le16 len; /* bits 0--13; bit 15 - owner */
185 __le16 size; /* bits 0--14 - frame size, bit 15 - enable int. */
194 __le16 len; /* bits 0--13 - size of frame, bit 15 - owner */
200 u8 cmd; /* bits 0--1 - TCPLS, bits 4--7 - CMDZ */
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/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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