| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,padding.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, 24 - enum: 25 - mediatek,mt8188-disp-padding 26 - mediatek,mt8195-mdp3-padding 27 - items: [all …]
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| H A D | mediatek,dp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Jitao shi <jitao.shi@mediatek.com> 17 In addition, We just need to enable the power domain of DP, so the clock 24 - mediatek,mt8188-dp-tx 25 - mediatek,mt8188-edp-tx 26 - mediatek,mt8195-dp-tx 27 - mediatek,mt8195-edp-tx [all …]
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| H A D | mediatek,aal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 is responsible for backlight power saving and sunlight visibility improving. 24 - enum: 25 - mediatek,mt8173-disp-aal 26 - mediatek,mt8183-disp-aal 27 - mediatek,mt8195-mdp3-aal [all …]
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| H A D | mediatek,color.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 25 - enum: 26 - mediatek,mt2701-disp-color 27 - mediatek,mt8167-disp-color 28 - mediatek,mt8173-disp-color 29 - mediatek,mt8195-mdp3-color [all …]
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| H A D | mediatek,merge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line 15 inputs into one side-by-side output. 24 - enum: 25 - mediatek,mt8173-disp-merge 26 - mediatek,mt8195-disp-merge [all …]
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | mediatek,mt8188-mt6359.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-mt6359.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek MT8188 ASoC sound card 10 - Trevor Wu <trevor.wu@mediatek.com> 13 - $ref: sound-card-common.yaml# 18 - enum: 19 - mediatek,mt8188-es8326 20 - mediatek,mt8188-mt6359-evb [all …]
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| H A D | mediatek,mt8188-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek AFE PCM controller for mt8188 10 - Trevor Wu <trevor.wu@mediatek.com> 14 const: mediatek,mt8188-afe 25 reset-names: 28 memory-region: 31 Shared memory region for AFE memif. A "shared-dma-pool". [all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mediatek,smi-larb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 19 - enum: 20 - mediatek,mt2701-smi-larb 21 - mediatek,mt2712-smi-larb 22 - mediatek,mt6779-smi-larb 23 - mediatek,mt6795-smi-larb [all …]
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| H A D | mediatek,smi-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195. 31 - enum: 32 - mediatek,mt2701-smi-common 33 - mediatek,mt2712-smi-common 34 - mediatek,mt6779-smi-common [all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biao Huang <biao.huang@mediatek.com> 21 - mediatek,mt2712-gmac 22 - mediatek,mt8188-gmac 23 - mediatek,mt8195-gmac 25 - compatible 28 - $ref: snps,dwmac.yaml# [all …]
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| /linux/Documentation/devicetree/bindings/soc/mediatek/ |
| H A D | mediatek,mutex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display 27 - mediatek,mt2701-disp-mutex 28 - mediatek,mt2712-disp-mutex 29 - mediatek,mt6795-disp-mutex 30 - mediatek,mt8167-disp-mutex [all …]
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| H A D | mtk-svs.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Roger Lu <roger.lu@mediatek.com> 11 - Matthias Brugger <matthias.bgg@gmail.com> 12 - Kevin Hilman <khilman@kernel.org> 17 different power domains(CPU/GPU/CCI) according to 24 - mediatek,mt8183-svs 25 - mediatek,mt8186-svs [all …]
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | mediatek,mdp3-rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 24 - enum: 25 - mediatek,mt8183-mdp3-rdma 26 - mediatek,mt8188-mdp3-rdma 27 - mediatek,mt8195-mdp3-rdma [all …]
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| H A D | mediatek,mdp3-wrot.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 19 - enum: 20 - mediatek,mt8183-mdp3-wrot 21 - items: 22 - enum: [all …]
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | mediatek,mt8195-scpsys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 14 power management tasks. The tasks include MTCMOS power 20 - enum: 21 - mediatek,mt6893-scpsys 22 - mediatek,mt8167-scpsys 23 - mediatek,mt8173-scpsys [all …]
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| /linux/Documentation/devicetree/bindings/dsp/ |
| H A D | mediatek,mt8186-dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tinghan Shen <tinghan.shen@mediatek.com> 14 advanced pre- and post- audio processing. 19 - mediatek,mt8186-dsp 20 - mediatek,mt8188-dsp 24 - description: Address and size of the DSP config registers 25 - description: Address and size of the DSP SRAM [all …]
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| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chaotian Jing <chaotian.jing@mediatek.com> 11 - Wenbin Mei <wenbin.mei@mediatek.com> 16 - enum: 17 - mediatek,mt2701-mmc 18 - mediatek,mt2712-mmc 19 - mediatek,mt6779-mmc [all …]
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | mediatek,pwm-disp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jitao Shi <jitao.shi@mediatek.com> 13 - $ref: pwm.yaml# 18 - enum: 19 - mediatek,mt2701-disp-pwm 20 - mediatek,mt6595-disp-pwm 21 - mediatek,mt8173-disp-pwm [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | mediatek-pcie-gen3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jianjun Wang <jianjun.wang@mediatek.com> 19 +-----+ 21 +-----+ 24 port->irq 26 +-+-+-+-+-+-+-+-+ 28 +-+-+-+-+-+-+-+-+ [all …]
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-xhci.yaml 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci [all …]
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| H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 26 - mediatek,mt8183-mtu3 27 - mediatek,mt8186-mtu3 [all …]
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | mediatek,tphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek T-PHY Controller 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 The T-PHY controller supports physical layer functionality for a number of 17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and 18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode: 19 ----------------------------------- 67 pattern: "^t-phy(@[0-9a-f]+)?$" [all …]
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8390-genio-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Author: Chris Chen <chris-qj.chen@mediatek.com> 9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/interrupt-controller/irq.h> 17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 19 #include <dt-bindings/spmi/spmi.h> 20 #include <dt-bindings/usb/pd.h> [all …]
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| /linux/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_gpu.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/dma-mapping.h> 27 if (test_bit(PANFROST_COMP_BIT_GPU, pfdev->is_suspended)) in panfrost_gpu_irq_handler() 39 dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n", in panfrost_gpu_irq_handler() 44 dev_warn(pfdev->dev, "There were multiple GPU faults - some have not been reported\n"); in panfrost_gpu_irq_handler() 68 clear_bit(PANFROST_COMP_BIT_GPU, pfdev->is_suspended); in panfrost_gpu_soft_reset() 71 ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT, in panfrost_gpu_soft_reset() 75 dev_err(pfdev->dev, "gpu soft reset timed out, attempting hard reset\n"); in panfrost_gpu_soft_reset() 78 ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT, val, in panfrost_gpu_soft_reset() 81 dev_err(pfdev->dev, "gpu hard reset timed out\n"); in panfrost_gpu_soft_reset() [all …]
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| /linux/drivers/iommu/ |
| H A D | mtk_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2015-2016 MediaTek Inc. 6 #include <linux/arm-smccc.h> 17 #include <linux/io-pgtable.h> 36 #include <dt-bindings/memory/mtk-memory-port.h> 152 ((((pdata)->flags) & (mask)) == (_x)) 208 * is in 4G-8G and cam is in 8G-12G. Meanwhile, some masters may have the 210 * 0x40000000-0x44000000. 272 * In the sharing pgtable case, list data->list to the global list like m4ulist. 273 * In the non-sharing pgtable case, list data->list to the itself hw_list_head. [all …]
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