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/linux/Documentation/devicetree/bindings/power/reset/
H A Dreboot-mode.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic reboot mode core map
10 - Andy Yan <andy.yan@rock-chips.com>
13 This driver get reboot mode arguments and call the write
15 or ram. Then the bootloader can read it and take different
18 All mode properties are vendor specific, it is a indication to tell
19 the bootloader what to do when the system reboots, and should be named
[all …]
H A Dnvmem-reboot-mode.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/nvmem-reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic NVMEM reboot mode
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
13 This driver gets the reboot mode magic value from the reboot-mode driver
14 and stores it in the NVMEM cell named "reboot-mode". The bootloader can
19 const: nvmem-reboot-mode
21 nvmem-cells:
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H A Dsyscon-reboot-mode.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic SYSCON reboot mode driver
10 - Sebastian Reichel <sre@kernel.org>
13 This driver gets reboot mode magic value from reboot-mode driver
14 and stores it in a SYSCON mapped register. Then the bootloader
17 parental dt-node plus the offset. So the SYSCON reboot-mode node
18 should be represented as a sub-node of a "syscon", "simple-mfd" node.
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/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dcypress,cy8ctma340.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Javier Martinez Canillas <javier@dowhile0.org>
15 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: touchscreen.yaml#
26 - const: cypress,cy8ctma340
27 - const: cypress,cy8ctst341
28 - const: cypress,cyttsp-spi
31 - const: cypress,cyttsp-i2c
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/linux/drivers/input/mouse/
H A Dcyapa_gen3.c9 * Copyright (C) 2011-2015 Cypress Semiconductor, Inc.
10 * Copyright (C) 2011-2012 Google, Inc.
60 * Used in register 0x00, bit1-0, DeviceStatus field.
88 * bit 7 - 4: high 4 bits of x position value
89 * bit 3 - 0: high 4 bits of y position value
95 /* id range is 1 - 15. It is incremented with every new touch. */
101 * bit 0 - 1: device status
102 * bit 3 - 2: power mode
103 * bit 6 - 4: reserved
108 * bit 7 - 4: number of fingers currently touching pad
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/linux/drivers/input/touchscreen/
H A Dmelfas_mip4.c1 // SPDX-License-Identifier: GPL-2.0-or-later
185 .addr = ts->client->addr, in mip4_i2c_xfer()
190 .addr = ts->client->addr, in mip4_i2c_xfer()
201 res = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg)); in mip4_i2c_xfer()
205 error = res < 0 ? res : -EIO; in mip4_i2c_xfer()
206 dev_err(&ts->client->dev, in mip4_i2c_xfer()
207 "%s - i2c_transfer failed: %d (%d)\n", in mip4_i2c_xfer()
209 } while (--retry); in mip4_i2c_xfer()
216 v->boot = get_unaligned_le16(buf + 0); in mip4_parse_fw_version()
217 v->core = get_unaligned_le16(buf + 2); in mip4_parse_fw_version()
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/linux/arch/powerpc/boot/dts/
H A Dmpc5200b.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&mpc5200_pic>;
20 #address-cells = <1>;
21 #size-cells = <0>;
26 d-cache-line-size = <32>;
27 i-cache-line-size = <32>;
28 d-cache-size = <0x4000>; // L1, 16K
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H A Dlite5200.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2006-2007 Secret Lab Technologies Ltd.
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
16 interrupt-parent = <&mpc5200_pic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
25 d-cache-line-size = <32>;
26 i-cache-line-size = <32>;
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/linux/arch/arm/mach-exynos/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/platform_data/cpuidle-exynos.h>
113 /* CPU BOOT mode flag for Exynos3250 SoC bootloader */
116 * Magic values for bootloader indicating chosen low power mode.
117 * See also Documentation/arch/arm/samsung/bootloader-interface.rst
123 void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
124 void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
/linux/drivers/memory/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
42 Used to configure the EBI (external bus interface) when the device-
68 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
72 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
73 resides Coherency Manager v2 with embedded 1MB L2-cache. It's
75 tags and way-select latencies of RAM access. This driver provides a
76 dt properties-based and sysfs interface for it.
85 is intended to provide a glue-less interface to a variety of
99 functions of the driver includes re-configuring AC timing
118 Enables verbose debugging mostly to decode the bootloader provided
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/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101-pixel-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree nodes common for all GS101-based Pixel
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
23 /* Bootloader expects bootargs specified otherwise it crashes */
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/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-gp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-MV784MP-GP)
6 * Copyright (C) 2013-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 * Note: this Device Tree assumes that the bootloader has remapped the
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
16 * boards were delivered with an older version of the bootloader that
18 * situation, you should either update your bootloader (preferred
22 /dts-v1/;
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H A Darmada-xp-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-78460-BP)
6 * Copyright (C) 2012-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 * Note: this Device Tree assumes that the bootloader has remapped the
16 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
17 * boards were delivered with an older version of the bootloader that
19 * situation, you should either update your bootloader (preferred
23 /dts-v1/;
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/linux/arch/mips/include/asm/octeon/
H A Dcvmx-sysinfo.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 * This module provides system/board information obtained by the bootloader.
35 #include "cvmx-coremask.h"
46 * u-boot, etc.) The cvmx_sysinfo_minimal_initialize() function is
71 /* exception base address, as set by bootloader */
93 * proper addressing mode (XKPHYS, KSEG0, etc.)
101 * application to use the proper addressing mode (XKPHYS,
107 /* configuration flags from bootloader */
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3xcm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
39 compatible = "atmel,tcb-timer";
44 compatible = "atmel,tcb-timer";
51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
52 pinctr-name = "default";
[all …]
H A Dat91-sama5d27_wlsom1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
26 clock-frequency = <32768>;
30 clock-frequency = <24000000>;
34 reg_5v: regulator-5v {
[all …]
H A Dat91-sama5d27_som1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/gpio/gpio.h>
15 compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
23 clock-frequency = <32768>;
27 clock-frequency = <24000000>;
32 sdmmc0: sdio-host@a0000000 {
33 microchip,sdcal-inverted;
38 pinctrl-names = "default";
[all …]
H A Dat91-sama5d4_xplained.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d4_xplained.dts - Device Tree file for SAMA5D4 Xplained board
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
14 compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <12000000>;
37 atmel,use-dma-rx;
38 atmel,use-dma-tx;
[all …]
H A Dat91sam9261ek.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 /dts-v1/;
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <18432000>;
40 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
44 bits-per-pixel = <16>;
45 atmel,lcdcon-backlight;
[all …]
H A Dat91sam9rlek.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 /dts-v1/;
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <12000000>;
40 bits-per-pixel = <16>;
41 atmel,lcdcon-backlight;
44 atmel,guard-time = <1>;
[all …]
/linux/arch/arm/include/asm/
H A Dvirt.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * Flag indicating that the kernel was not entered in the same mode on every
23 * __boot_cpu_mode records what mode the primary CPU was booted in.
24 * A correctly-implemented bootloader must start all CPUs in the same mode:
26 * that some CPU(s) were booted in a different mode.
50 /* Reports the availability of HYP mode */
57 /* Check if the bootloader has booted CPUs in different modes */
/linux/arch/parisc/kernel/
H A Dreal2.S14 #include <asm/asm-offsets.h>
32 /************************ 32-bit real-mode calls ***********************/
46 STREG %rp, -RP_OFFSET(%sp) /* save RP */
50 STREG %r27, -1*REG_SZ(%sp)
51 STREG %r29, -2*REG_SZ(%sp)
53 STREG %sp, -REG_SZ(%arg0) /* save SP on real-mode stack */
54 copy %arg0, %sp /* adopt the real-mode SP */
60 /* 32-bit calling convention passes first 4 args in registers */
62 ldw -8(%arg1), %arg2
63 ldw -12(%arg1), %arg3
[all …]
/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_nsp.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
170 * struct nfp_eth_table - ETH table information
176 * @ports.index: chip-wide first channel index
183 * @ports.fec: forward error correction mode
184 * @ports.act_fec: active forward error correction mode
185 * @ports.aneg: auto negotiation mode
259 nfp_eth_set_fec(struct nfp_cpp *cpp, unsigned int idx, enum nfp_eth_fec mode);
267 return !!eth_port->fec_modes_supported; in nfp_eth_can_support_fec()
273 return eth_port->fec_modes_supported; in nfp_eth_supported_fec_modes()
[all …]
/linux/arch/arm/boot/dts/hisilicon/
H A Dhisi-x5hd2-dkb.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014 Linaro Ltd.
4 * Copyright (c) 2013-2014 HiSilicon Limited.
7 /dts-v1/;
8 #include "hisi-x5hd2.dtsi"
15 stdout-path = "serial0:115200n8";
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "hisilicon,hix5hd2-smp";
24 compatible = "arm,cortex-a9";
[all …]
/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
162 The ARM series is a line of low-power-consumption RISC chip designs
164 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
165 manufactured, but legacy ARM-based PC hardware remains popular in
173 relocations. The combined range is -/+ 256 MiB, which is usually
266 Patch phys-to-virt and virt-to-phys translation functions at
270 This can only be used with non-XIP MMU kernels where the base
316 bool "MMU-based Paged Memory Management Support"
319 Select if you want MMU-based virtualised addressing space
354 # This is sorted alphabetically by mach-* pathname. However, plat-*
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