1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 27ec94453SAneesh V# 37ec94453SAneesh V# Memory devices 47ec94453SAneesh V# 57ec94453SAneesh V 67ec94453SAneesh Vmenuconfig MEMORY 77ec94453SAneesh V bool "Memory Controller drivers" 82664a075SKrzysztof Kozlowski help 92664a075SKrzysztof Kozlowski This option allows to enable specific memory controller drivers, 102664a075SKrzysztof Kozlowski useful mostly on embedded systems. These could be controllers 112664a075SKrzysztof Kozlowski for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features 122664a075SKrzysztof Kozlowski vary from memory tuning and frequency scaling to enabling 132664a075SKrzysztof Kozlowski access to attached peripherals through memory bus. 147ec94453SAneesh V 157ec94453SAneesh Vif MEMORY 167ec94453SAneesh V 177b43b8fdSMasahiro Yamadaconfig DDR 187b43b8fdSMasahiro Yamada bool 197b43b8fdSMasahiro Yamada help 207b43b8fdSMasahiro Yamada Data from JEDEC specs for DDR SDRAM memories, 217b43b8fdSMasahiro Yamada particularly the AC timing parameters and addressing 227b43b8fdSMasahiro Yamada information. This data is useful for drivers handling 237b43b8fdSMasahiro Yamada DDR SDRAM controllers. 247b43b8fdSMasahiro Yamada 2517c50b70SJoachim Eastwoodconfig ARM_PL172_MPMC 2617c50b70SJoachim Eastwood tristate "ARM PL172 MPMC driver" 2717c50b70SJoachim Eastwood depends on ARM_AMBA && OF 2817c50b70SJoachim Eastwood help 2917c50b70SJoachim Eastwood This selects the ARM PrimeCell PL172 MultiPort Memory Controller. 3017c50b70SJoachim Eastwood If you have an embedded system with an AMBA bus and a PL172 3117c50b70SJoachim Eastwood controller, say Y or M here. 3217c50b70SJoachim Eastwood 336a4ec4cdSBoris Brezillonconfig ATMEL_EBI 346a4ec4cdSBoris Brezillon bool "Atmel EBI driver" 35ea0c0ad6SKrzysztof Kozlowski default y if ARCH_AT91 36ea0c0ad6SKrzysztof Kozlowski depends on ARCH_AT91 || COMPILE_TEST 37ea0c0ad6SKrzysztof Kozlowski depends on OF 386a4ec4cdSBoris Brezillon select MFD_SYSCON 398eb8c7d8SBoris Brezillon select MFD_ATMEL_SMC 406a4ec4cdSBoris Brezillon help 416a4ec4cdSBoris Brezillon Driver for Atmel EBI controller. 426a4ec4cdSBoris Brezillon Used to configure the EBI (external bus interface) when the device- 436a4ec4cdSBoris Brezillon tree is used. This bus supports NANDs, external ethernet controller, 446a4ec4cdSBoris Brezillon SRAMs, ATA devices, etc. 456a4ec4cdSBoris Brezillon 46904ffa81SKrzysztof Kozlowskiconfig BRCMSTB_DPFE 4713f995ceSFlorian Fainelli tristate "Broadcom STB DPFE driver" 4813f995ceSFlorian Fainelli default ARCH_BRCMSTB 49904ffa81SKrzysztof Kozlowski depends on ARCH_BRCMSTB || COMPILE_TEST 50904ffa81SKrzysztof Kozlowski help 51904ffa81SKrzysztof Kozlowski This driver provides access to the DPFE interface of Broadcom 52904ffa81SKrzysztof Kozlowski STB SoCs. The firmware running on the DCPU inside the DDR PHY can 53904ffa81SKrzysztof Kozlowski provide current information about the system's RAM, for instance 54904ffa81SKrzysztof Kozlowski the DRAM refresh rate. This can be used as an indirect indicator 55904ffa81SKrzysztof Kozlowski for the DRAM's temperature. Slower refresh rate means cooler RAM, 56904ffa81SKrzysztof Kozlowski higher refresh rate means hotter RAM. 57904ffa81SKrzysztof Kozlowski 58a4be90ffSFlorian Fainelliconfig BRCMSTB_MEMC 59a4be90ffSFlorian Fainelli tristate "Broadcom STB MEMC driver" 60a4be90ffSFlorian Fainelli default ARCH_BRCMSTB 61a4be90ffSFlorian Fainelli depends on ARCH_BRCMSTB || COMPILE_TEST 62a4be90ffSFlorian Fainelli help 63a4be90ffSFlorian Fainelli This driver provides a way to configure the Broadcom STB memory 64a4be90ffSFlorian Fainelli controller and specifically control the Self Refresh Power Down 65a4be90ffSFlorian Fainelli (SRPD) inactivity timeout. 66a4be90ffSFlorian Fainelli 6783ca8b3eSSerge Seminconfig BT1_L2_CTL 6883ca8b3eSSerge Semin bool "Baikal-T1 CM2 L2-RAM Cache Control Block" 6983ca8b3eSSerge Semin depends on MIPS_BAIKAL_T1 || COMPILE_TEST 7083ca8b3eSSerge Semin select MFD_SYSCON 7183ca8b3eSSerge Semin help 7283ca8b3eSSerge Semin Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU 7383ca8b3eSSerge Semin resides Coherency Manager v2 with embedded 1MB L2-cache. It's 7483ca8b3eSSerge Semin possible to tune the L2 cache performance up by setting the data, 7583ca8b3eSSerge Semin tags and way-select latencies of RAM access. This driver provides a 7683ca8b3eSSerge Semin dt properties-based and sysfs interface for it. 7783ca8b3eSSerge Semin 785a7c8154SIvan Khoronzhukconfig TI_AEMIF 795a7c8154SIvan Khoronzhuk tristate "Texas Instruments AEMIF driver" 80ea0c0ad6SKrzysztof Kozlowski depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST 81ea0c0ad6SKrzysztof Kozlowski depends on OF 825a7c8154SIvan Khoronzhuk help 835a7c8154SIvan Khoronzhuk This driver is for the AEMIF module available in Texas Instruments 845a7c8154SIvan Khoronzhuk SoCs. AEMIF stands for Asynchronous External Memory Interface and 855a7c8154SIvan Khoronzhuk is intended to provide a glue-less interface to a variety of 865a7c8154SIvan Khoronzhuk asynchronuous memory devices like ASRAM, NOR and NAND memory. A total 875a7c8154SIvan Khoronzhuk of 256M bytes of any of these memories can be accessed at a given 885a7c8154SIvan Khoronzhuk time via four chip selects with 64M byte access per chip select. 895a7c8154SIvan Khoronzhuk 907ec94453SAneesh Vconfig TI_EMIF 917ec94453SAneesh V tristate "Texas Instruments EMIF driver" 92ea0c0ad6SKrzysztof Kozlowski depends on ARCH_OMAP2PLUS || COMPILE_TEST 937ec94453SAneesh V select DDR 947ec94453SAneesh V help 957ec94453SAneesh V This driver is for the EMIF module available in Texas Instruments 967ec94453SAneesh V SoCs. EMIF is an SDRAM controller that, based on its revision, 977ec94453SAneesh V supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 987ec94453SAneesh V This driver takes care of only LPDDR2 memories presently. The 997ec94453SAneesh V functions of the driver includes re-configuring AC timing 1007ec94453SAneesh V parameters and other settings during frequency, voltage and 1017ec94453SAneesh V temperature changes 1027ec94453SAneesh V 10318640193STony Lindgrenconfig OMAP_GPMC 104854fd920SRoger Quadros tristate "Texas Instruments OMAP SoC GPMC driver" 10526cb1d2fSKrzysztof Kozlowski depends on OF_ADDRESS 10667c7fc6cSGeert Uytterhoeven depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST 107d2d00862SRoger Quadros select GPIOLIB 10818640193STony Lindgren help 10918640193STony Lindgren This driver is for the General Purpose Memory Controller (GPMC) 11018640193STony Lindgren present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows 11118640193STony Lindgren interfacing to a variety of asynchronous as well as synchronous 11218640193STony Lindgren memory drives like NOR, NAND, OneNAND, SRAM. 11318640193STony Lindgren 11463aa945bSTony Lindgrenconfig OMAP_GPMC_DEBUG 115be59b619STony Lindgren bool "Enable GPMC debug output and skip reset of GPMC during init" 11663aa945bSTony Lindgren depends on OMAP_GPMC 11763aa945bSTony Lindgren help 11863aa945bSTony Lindgren Enables verbose debugging mostly to decode the bootloader provided 119be59b619STony Lindgren timings. To preserve the bootloader provided timings, the reset 120be59b619STony Lindgren of GPMC is skipped during init. Enable this during development to 121be59b619STony Lindgren configure devices connected to the GPMC bus. 122be59b619STony Lindgren 123be59b619STony Lindgren NOTE: In addition to matching the register setup with the bootloader 124be59b619STony Lindgren you also need to match the GPMC FCLK frequency used by the 125be59b619STony Lindgren bootloader or else the GPMC timings won't be identical with the 126be59b619STony Lindgren bootloader timings. 12763aa945bSTony Lindgren 1288428e5adSDave Gerlachconfig TI_EMIF_SRAM 1298428e5adSDave Gerlach tristate "Texas Instruments EMIF SRAM driver" 130d77d22d7SArnd Bergmann depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST) 131ea0c0ad6SKrzysztof Kozlowski depends on SRAM 1328428e5adSDave Gerlach help 1338428e5adSDave Gerlach This driver is for the EMIF module available on Texas Instruments 1348428e5adSDave Gerlach AM33XX and AM43XX SoCs and is required for PM. Certain parts of 1358428e5adSDave Gerlach the EMIF PM code must run from on-chip SRAM late in the suspend 1368428e5adSDave Gerlach sequence so this driver provides several relocatable PM functions 1378428e5adSDave Gerlach for the SoC PM code to use. 1388428e5adSDave Gerlach 139477dfdccSXu Yilunconfig FPGA_DFL_EMIF 140477dfdccSXu Yilun tristate "FPGA DFL EMIF Driver" 141477dfdccSXu Yilun depends on FPGA_DFL && HAS_IOMEM 142477dfdccSXu Yilun help 143477dfdccSXu Yilun This driver is for the EMIF private feature implemented under 144477dfdccSXu Yilun FPGA Device Feature List (DFL) framework. It is used to expose 145477dfdccSXu Yilun memory interface status information as well as memory clearing 146477dfdccSXu Yilun control. 147477dfdccSXu Yilun 1483edad321SEzequiel Garciaconfig MVEBU_DEVBUS 1493edad321SEzequiel Garcia bool "Marvell EBU Device Bus Controller" 150ea0c0ad6SKrzysztof Kozlowski default y if PLAT_ORION 151ea0c0ad6SKrzysztof Kozlowski depends on PLAT_ORION || COMPILE_TEST 152ea0c0ad6SKrzysztof Kozlowski depends on OF 1533edad321SEzequiel Garcia help 1543edad321SEzequiel Garcia This driver is for the Device Bus controller available in some 1553edad321SEzequiel Garcia Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and 1563edad321SEzequiel Garcia Armada 370 and Armada XP. This controller allows to handle flash 1573edad321SEzequiel Garcia devices such as NOR, NAND, SRAM, and FPGA. 1583edad321SEzequiel Garcia 15954afbec0SScott Woodconfig FSL_CORENET_CF 16054afbec0SScott Wood tristate "Freescale CoreNet Error Reporting" 161ea0c0ad6SKrzysztof Kozlowski depends on FSL_SOC_BOOKE || COMPILE_TEST 16254afbec0SScott Wood help 16354afbec0SScott Wood Say Y for reporting of errors from the Freescale CoreNet 16454afbec0SScott Wood Coherency Fabric. Errors reported include accesses to 16554afbec0SScott Wood physical addresses that mapped by no local access window 16654afbec0SScott Wood (LAW) or an invalid LAW, as well as bad cache state that 16754afbec0SScott Wood represents a coherency violation. 16854afbec0SScott Wood 16942d87b18SPaul Gortmakerconfig FSL_IFC 170*9ba0cae3SEsben Haabendal bool "Freescale IFC driver" 171b30a2bd4SBoris Brezillon depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 172b30a2bd4SBoris Brezillon depends on HAS_IOMEM 17342d87b18SPaul Gortmaker 174911a8882SAlex Smithconfig JZ4780_NEMC 175911a8882SAlex Smith bool "Ingenic JZ4780 SoC NEMC driver" 17694b3a02cSPaul Cercueil depends on MIPS || COMPILE_TEST 17716909c81SAnders Roxell depends on HAS_IOMEM && OF 178911a8882SAlex Smith help 179911a8882SAlex Smith This driver is for the NAND/External Memory Controller (NEMC) in 180911a8882SAlex Smith the Ingenic JZ4780. This controller is used to handle external 181911a8882SAlex Smith memory devices such as NAND and SRAM. 182911a8882SAlex Smith 183cc8bbe1aSYong Wuconfig MTK_SMI 18450fc8d92SYong Wu tristate "MediaTek SoC Memory Controller driver" if COMPILE_TEST 185cc8bbe1aSYong Wu depends on ARCH_MEDIATEK || COMPILE_TEST 186cc8bbe1aSYong Wu help 187cc8bbe1aSYong Wu This driver is for the Memory Controller module in MediaTek SoCs, 188cc8bbe1aSYong Wu mainly help enable/disable iommu and control the power domain and 189cc8bbe1aSYong Wu clocks for each local arbiter. 190cc8bbe1aSYong Wu 19162a8a739SBartosz Golaszewskiconfig DA8XX_DDRCTL 19262a8a739SBartosz Golaszewski bool "Texas Instruments da8xx DDR2/mDDR driver" 193ea0c0ad6SKrzysztof Kozlowski depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST 19462a8a739SBartosz Golaszewski help 19562a8a739SBartosz Golaszewski This driver is for the DDR2/mDDR Memory Controller present on 19662a8a739SBartosz Golaszewski Texas Instruments da8xx SoCs. It's used to tweak various memory 19762a8a739SBartosz Golaszewski controller configuration options. 19862a8a739SBartosz Golaszewski 199fee10bd2SNaga Sureshkumar Relliconfig PL353_SMC 200fee10bd2SNaga Sureshkumar Relli tristate "ARM PL35X Static Memory Controller(SMC) driver" 201ea0c0ad6SKrzysztof Kozlowski default y if ARM 2025445a0c0SKrzysztof Kozlowski depends on ARM || COMPILE_TEST 2035445a0c0SKrzysztof Kozlowski depends on ARM_AMBA 204fee10bd2SNaga Sureshkumar Relli help 205fee10bd2SNaga Sureshkumar Relli This driver is for the ARM PL351/PL353 Static Memory 206fee10bd2SNaga Sureshkumar Relli Controller(SMC) module. 207fee10bd2SNaga Sureshkumar Relli 208ca7d8b98SSergei Shtylyovconfig RENESAS_RPCIF 209ca7d8b98SSergei Shtylyov tristate "Renesas RPC-IF driver" 210ea0c0ad6SKrzysztof Kozlowski depends on ARCH_RENESAS || COMPILE_TEST 211ca7d8b98SSergei Shtylyov select REGMAP_MMIO 2124a26df8eSGeert Uytterhoeven select RESET_CONTROLLER 213ca7d8b98SSergei Shtylyov help 214409f9fe9SAdam Ford This supports Renesas R-Car Gen3 or RZ/G2 RPC-IF which provides 215409f9fe9SAdam Ford either SPI host or HyperFlash. You'll have to select individual 216409f9fe9SAdam Ford components under the corresponding menu. 217ca7d8b98SSergei Shtylyov 21866b8173aSChristophe Kerelloconfig STM32_FMC2_EBI 21966b8173aSChristophe Kerello tristate "Support for FMC2 External Bus Interface on STM32MP SoCs" 22020c082a2SChristophe Kerello depends on ARCH_STM32 || COMPILE_TEST 22166b8173aSChristophe Kerello select MFD_SYSCON 22266b8173aSChristophe Kerello help 22366b8173aSChristophe Kerello Select this option to enable the STM32 FMC2 External Bus Interface 22466b8173aSChristophe Kerello controller. This driver configures the transactions with external 22566b8173aSChristophe Kerello devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on 22666b8173aSChristophe Kerello SOCs containing the FMC2 External Bus Interface. 22766b8173aSChristophe Kerello 228a8aabb91SPankaj Dubeysource "drivers/memory/samsung/Kconfig" 22989184651SThierry Redingsource "drivers/memory/tegra/Kconfig" 23089184651SThierry Reding 2317ec94453SAneesh Vendif 232