Searched +full:meson +full:- +full:display (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/meson/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 tristate "DRM Support for Amlogic Meson Display Controller" 18 tristate "HDMI Synopsys Controller support for Amlogic Meson Display" 25 tristate "MIPI DSI Synopsys Controller support for Amlogic Meson Display"
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | amlogic,meson-gx-spicc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/spi/amlogic,meson-gx-spicc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic Meson SPI Communication Controller 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Meson SPICC is a generic SPI controller for general purpose Full-Duplex 20 - amlogic,meson-gx-spicc # SPICC controller on Amlogic GX and compatible SoCs 21 - amlogic,meson-axg-spicc # SPICC controller on Amlogic AXG and compatible SoCs 22 - amlogic,meson-g12a-spicc # SPICC controller on Amlogic G12A and compatible SoCs [all …]
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| /linux/Documentation/gpu/ |
| H A D | meson.rst | 2 drm/meson AmLogic Meson Video Processing Unit 5 .. kernel-doc:: drivers/gpu/drm/meson/meson_drv.c 11 The Amlogic Meson Display controller is composed of several components 16 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------| 18 D |-------| |----| | | | | HDMI PLL | 19 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK | 20 R |-------| |----| Processing | | | | | 21 | osd2 | | | |---| Enci ----------|----|-----VDAC------| 22 R |-------| CSC |----| Scalers | | Encp ----------|----|----HDMI-TX----| 23 A | osd1 | | | Blenders | | Encl ----------|----|---------------| [all …]
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | amlogic,meson-g12a-dw-mipi-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/amlogic,meson-g12a-dw-mipi-dsi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic Meson Synopsys Designware Integration is composed of 15 - A Synopsys DesignWare MIPI DSI Host Controller IP 16 - A TOP control block controlling the Clocks & Resets of the IP 19 - $ref: dsi-controller.yaml# 24 - amlogic,meson-g12a-dw-mipi-dsi [all …]
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| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-g12b-a311d-bananapi-m2s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-g12b-a311d.dtsi" 9 #include "meson-g12b-bananapi.dtsi" 12 compatible = "bananapi,bpi-m2s", "amlogic,a311d", "amlogic,g12b"; 24 pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c1_sck_h7_pins>; 25 pinctrl-names = "default"; 28 /* Display (DSI) bus */ 31 pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; 32 pinctrl-names = "default";
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| /linux/drivers/pwm/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 bool "Pulse-Width Modulation (PWM) Support" 5 Generic Pulse-Width Modulation (PWM) support. 7 In Pulse-Width Modulation, a variation of the width of pulses 12 display backlights. 57 will be called pwm-ab8500. 74 will be called pwm-airoha. 86 will be called pwm-apple. 95 will be called pwm-argon-fan-hat. 105 will be called pwm-atmel. [all …]
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------- [all...] |
| /linux/drivers/clk/meson/ |
| H A D | axg.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * AmLogic Meson-AXG Clock Controller Driver 12 #include <linux/clk-provider.h> 18 #include "clk-regmap.h" 19 #include "clk-pll.h" 20 #include "clk-mpll.h" 21 #include "meson-clkc-utils.h" 23 #include <dt-bindings/clock/axg-clkc.h> 467 * b) CCF has a clock hand-off mechanism to make the sure the 1164 * display has been set by Bootloader [all …]
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 38 Documentation/arch/m68k/kernel-options.rst. 48 PARISC The PA-RISC architecture is enabled. 63 the Documentation/scsi/ sub-directory. 83 X86-32 X86-32, aka i386 architecture is enabled. 84 X86-64 X86-64 architecture is enabled. 85 X86 Either 32-bit or 64-bit x86 (same as X86-3 [all...] |