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/linux/Documentation/devicetree/bindings/net/
H A Daspeed,ast2600-mdio.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/net/aspeed,ast2600-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2600 MDIO Controller
10 - Andrew Jeffery <andrew@aj.id.au>
13 The ASPEED AST2600 MDIO controller is the third iteration of ASPEED's MDIO
14 bus register interface, this time also separating out the controller from the
18 - $ref: mdio.yaml#
22 const: aspeed,ast2600-mdio
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H A Dhisilicon-hns-mdio.txt1 Hisilicon MDIO bus controller
4 - compatible: can be one of:
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
11 - #address-cells: Must be <1>.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
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H A Dairoha,an7583-mdio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/airoha,an7583-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Airoha AN7583 Dedicated MDIO Controller
10 - Christian Marangi <ansuelsmth@gmail.com>
13 Airoha AN7583 SoC have 3 different MDIO Controller.
20 $ref: mdio.yaml#
24 const: airoha,an7583-mdio
35 clock-frequency:
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H A Drealtek,rtl9301-mdio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek RTL9300 MDIO Controller
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
15 - items:
16 - enum:
17 - realtek,rtl9302b-mdio
18 - realtek,rtl9302c-mdio
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H A Dqcom,ipq4019-mdio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ40xx MDIO Controller
10 - Robert Marko <robert.marko@sartura.hr>
15 - enum:
16 - qcom,ipq4019-mdio
17 - qcom,ipq5018-mdio
19 - items:
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H A Dmarvell,mvusb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell USB to MDIO Controller
10 - Tobias Waldekranz <tobias@waldekranz.com>
13 This controller is mounted on development boards for Marvell's Link Street
15 using the standard MDIO interface.
23 - $ref: mdio.yaml#
30 description: The USB port number on the host controller
33 - compatible
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H A Damlogic,g12a-mdio-mux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
11 the internal mdio bus leading to the embedded 10/100 PHY or the external
12 MDIO bus.
15 - Neil Armstrong <neil.armstrong@linaro.org>
18 - $ref: mdio-mux.yaml#
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H A Dqcom,ipq8064-mdio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm ipq806x MDIO bus controller
10 - Ansuel Smith <ansuelsmth@gmail.com>
13 The ipq806x soc have a MDIO dedicated controller that is
17 - $ref: mdio.yaml#
21 const: qcom,ipq8064-mdio
30 - compatible
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H A Drealtek,rtl9301-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/realtek,rtl9301-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
17 $ref: ethernet-switch.yaml#/$defs/ethernet-ports
22 - enum:
23 - realtek,rtl9301-switch
24 - realtek,rtl9302b-switch
25 - realtek,rtl9302c-switch
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H A Dhisilicon-hip04-net.txt1 Hisilicon hip04 Ethernet Controller
3 * Ethernet controller node
6 - compatible: should be "hisilicon,hip04-mac".
7 - reg: address and length of the register set for the device.
8 - interrupts: interrupt for the device.
9 - port-handle: <phandle port channel>
11 port, port number connected to the controller
14 - phy-mode: see ethernet.txt [1].
17 - phy-handle: see ethernet.txt [1].
22 * MDIO bus node:
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H A Dsocionext,synquacer-netsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/socionext,synquacer-netsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext NetSec Ethernet Controller IP
10 - Jassi Brar <jaswinder.singh@linaro.org>
11 - Ilias Apalodimas <ilias.apalodimas@linaro.org>
14 - $ref: ethernet-controller.yaml#
18 const: socionext,synquacer-netsec
22 - description: control register area
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H A Dfsl,gianfar.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Three-Speed Ethernet Controller (TSEC), "Gianfar"
10 - J. Neuschäfer <j.ne@posteo.net>
12 # This is needed to distinguish gianfar.yaml and gianfar-mdio.yaml, because
16 - properties:
23 - device_type
25 - properties:
30 - compatible
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/linux/Documentation/devicetree/bindings/mux/
H A Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
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/linux/Documentation/firmware-guide/acpi/dsd/
H A Dphy.rst1 .. SPDX-License-Identifier: GPL-2.0
4 MDIO bus and PHYs in ACPI
7 The PHYs on an MDIO bus [phy] are probed and registered using
11 on the MDIO bus have to be referenced.
14 for connecting PHYs on the MDIO bus [dsd-properties-rules] to the MAC layer.
17 Properties UUID For _DSD" [dsd-guide] document and the
18 daffd814-6eba-4d8c-8a91-bc9bbf4aa301 UUID must be used in the Device
21 phy-handle
22 ----------
23 For each MAC node, a device property "phy-handle" is used to reference
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmarvell,mv88e6xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
22 - enum:
23 - marvell,mv88e6085
24 - marvell,mv88e6190
25 - marvell,mv88e6250
43 - items:
44 - const: marvell,turris-mox-mv88e6085
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H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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H A Dqca,ar9331.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros AR9331 built-in switch
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 Qualcomm Atheros AR9331 is a switch built-in to Atheros AR9331 WiSoC and
14 addressable over internal MDIO bus. All PHYs are built-in as well.
18 const: qca,ar9331-switch
26 interrupt-controller: true
28 '#interrupt-cells':
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/linux/arch/mips/boot/dts/realtek/
H A Drtl930x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
4 compatible = "realtek,rtl9302-soc";
6 #address-cells = <1>;
7 #size-cells = <1>;
15 compatible = "mti,cpu-interrupt-controller";
16 #address-cells = <0>;
17 #interrupt-cells = <1>;
18 interrupt-controller;
22 #address-cells = <1>;
23 #size-cells = <0>;
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/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
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/linux/Documentation/devicetree/bindings/mfd/
H A Dairoha,en7581-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Airoha EN7581 GPIO System Controller
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Lorenzo Bianconi <lorenzo@kernel.org>
14 Airoha EN7581 SoC GPIO system controller which provided a register map
20 - const: airoha,en7581-gpio-sysctl
21 - const: syscon
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dcv180x.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/clock/sophgo,cv1800.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "cv18xx-reset.h"
13 #address-cells = <1>;
14 #size-cells = <1>;
17 compatible = "fixed-clock";
18 clock-output-names = "osc_25m";
19 #clock-cells = <0>;
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/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-zii-dev-rev-c.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
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/linux/Documentation/leds/
H A Dwell-known-leds.txt1 -*- org -*-
17 Notice there's a list of functions in include/dt-bindings/leds/common.h .
24 player. For example, a game controller with 4 LEDs, may be programmed with "x---"
25 to indicate player 1, "-x--" to indicate player 2 etcetera where "x" means on.
27 of a game controller using the function "player".
31 Good: "input*:*:player-{1,2,3,4,5}
38 Legacy: "shift-key-light" (Motorola Droid 4, capslock)
47 Legacy: "button-backlight" (Motorola Droid 4)
62 Legacy: "status-led:{red,green,blue}" (Motorola Droid 4)
65 Phones usually have multi-color status LED.
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