xref: /linux/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml (revision 621cde16e49b3ecf7d59a8106a20aaebfb4a59a9)
14972eceeSRobert Marko# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
24972eceeSRobert Marko%YAML 1.2
34972eceeSRobert Marko---
44972eceeSRobert Marko$id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
54972eceeSRobert Marko$schema: http://devicetree.org/meta-schemas/core.yaml#
64972eceeSRobert Marko
7dd3cb467SAndrew Lunntitle: Qualcomm IPQ40xx MDIO Controller
84972eceeSRobert Marko
94972eceeSRobert Markomaintainers:
104972eceeSRobert Marko  - Robert Marko <robert.marko@sartura.hr>
114972eceeSRobert Marko
124972eceeSRobert Markoproperties:
134972eceeSRobert Marko  compatible:
14cbe5f7c0SRobert Marko    oneOf:
15cbe5f7c0SRobert Marko      - enum:
162a4c32e7SLuo Jie          - qcom,ipq4019-mdio
172a4c32e7SLuo Jie          - qcom,ipq5018-mdio
184972eceeSRobert Marko
19cbe5f7c0SRobert Marko      - items:
20cbe5f7c0SRobert Marko          - enum:
21cbe5f7c0SRobert Marko              - qcom,ipq6018-mdio
2205c1cbb9SRobert Marko              - qcom,ipq8074-mdio
23*3a2a192bSAlexandru Gagniuc              - qcom,ipq9574-mdio
24cbe5f7c0SRobert Marko          - const: qcom,ipq4019-mdio
25cbe5f7c0SRobert Marko
264972eceeSRobert Marko  "#address-cells":
274972eceeSRobert Marko    const: 1
284972eceeSRobert Marko
294972eceeSRobert Marko  "#size-cells":
304972eceeSRobert Marko    const: 0
314972eceeSRobert Marko
324972eceeSRobert Marko  reg:
332a4c32e7SLuo Jie    minItems: 1
342a4c32e7SLuo Jie    maxItems: 2
352a4c32e7SLuo Jie    description:
362a4c32e7SLuo Jie      the first Address and length of the register set for the MDIO controller.
372a4c32e7SLuo Jie      the second Address and length of the register for ethernet LDO, this second
382a4c32e7SLuo Jie      address range is only required by the platform IPQ50xx.
392a4c32e7SLuo Jie
402a4c32e7SLuo Jie  clocks:
41e50c5036SRobert Marko    items:
42e50c5036SRobert Marko      - description: MDIO clock source frequency fixed to 100MHZ
434972eceeSRobert Marko
444a8c1438SRobert Marko  clock-names:
454a8c1438SRobert Marko    items:
464a8c1438SRobert Marko      - const: gcc_mdio_ahb_clk
474a8c1438SRobert Marko
489484b955SChristian Marangi  clock-frequency:
499484b955SChristian Marangi    description:
509484b955SChristian Marangi      The MDIO bus clock that must be output by the MDIO bus hardware, if
519484b955SChristian Marangi      absent, the default hardware values are used.
529484b955SChristian Marangi
539484b955SChristian Marangi      MDC rate is feed by an external clock (fixed 100MHz) and is divider
549484b955SChristian Marangi      internally. The default divider is /256 resulting in the default rate
559484b955SChristian Marangi      applied of 390KHz.
569484b955SChristian Marangi
579484b955SChristian Marangi      To follow 802.3 standard that instruct up to 2.5MHz by default, if
589484b955SChristian Marangi      this property is not declared and the divider is set to /256, by
599484b955SChristian Marangi      default 1.5625Mhz is select.
609484b955SChristian Marangi    enum: [ 390625, 781250, 1562500, 3125000, 6250000, 12500000 ]
619484b955SChristian Marangi    default: 1562500
629484b955SChristian Marangi
634972eceeSRobert Markorequired:
644972eceeSRobert Marko  - compatible
654972eceeSRobert Marko  - reg
664972eceeSRobert Marko  - "#address-cells"
674972eceeSRobert Marko  - "#size-cells"
684972eceeSRobert Marko
69e50c5036SRobert MarkoallOf:
703079bfdbSRob Herring  - $ref: mdio.yaml#
71e50c5036SRobert Marko
72e50c5036SRobert Marko  - if:
73e50c5036SRobert Marko      properties:
74e50c5036SRobert Marko        compatible:
75e50c5036SRobert Marko          contains:
76e50c5036SRobert Marko            enum:
77e50c5036SRobert Marko              - qcom,ipq5018-mdio
78e50c5036SRobert Marko              - qcom,ipq6018-mdio
79e50c5036SRobert Marko              - qcom,ipq8074-mdio
80*3a2a192bSAlexandru Gagniuc              - qcom,ipq9574-mdio
81e50c5036SRobert Marko    then:
82e50c5036SRobert Marko      required:
83e50c5036SRobert Marko        - clocks
844a8c1438SRobert Marko        - clock-names
85e50c5036SRobert Marko    else:
86e50c5036SRobert Marko      properties:
87e50c5036SRobert Marko        clocks: false
884a8c1438SRobert Marko        clock-names: false
89e50c5036SRobert Marko
906fdc6e23SRob HerringunevaluatedProperties: false
916fdc6e23SRob Herring
924972eceeSRobert Markoexamples:
934972eceeSRobert Marko  - |
944972eceeSRobert Marko    mdio@90000 {
954972eceeSRobert Marko      #address-cells = <1>;
964972eceeSRobert Marko      #size-cells = <0>;
974972eceeSRobert Marko      compatible = "qcom,ipq4019-mdio";
984972eceeSRobert Marko      reg = <0x90000 0x64>;
994972eceeSRobert Marko
1004972eceeSRobert Marko      ethphy0: ethernet-phy@0 {
1014972eceeSRobert Marko        reg = <0>;
1024972eceeSRobert Marko      };
1034972eceeSRobert Marko
1044972eceeSRobert Marko      ethphy1: ethernet-phy@1 {
1054972eceeSRobert Marko        reg = <1>;
1064972eceeSRobert Marko      };
1074972eceeSRobert Marko
1084972eceeSRobert Marko      ethphy2: ethernet-phy@2 {
1094972eceeSRobert Marko        reg = <2>;
1104972eceeSRobert Marko      };
1114972eceeSRobert Marko
1124972eceeSRobert Marko      ethphy3: ethernet-phy@3 {
1134972eceeSRobert Marko        reg = <3>;
1144972eceeSRobert Marko      };
1154972eceeSRobert Marko
1164972eceeSRobert Marko      ethphy4: ethernet-phy@4 {
1174972eceeSRobert Marko        reg = <4>;
1184972eceeSRobert Marko      };
1194972eceeSRobert Marko    };
120