Home
last modified time | relevance | path

Searched full:lvds (Results 1 – 25 of 251) sorted by relevance

1234567891011

/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,lvds.yaml4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
7 title: Renesas R-Car LVDS Encoder
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
21 - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
22 - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders
23 - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders
24 - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders
25 - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders
[all …]
H A Dti,sn65dsi83.yaml7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
14 to 1x Single-link LVDS
17 to 1x Dual-link or 2x Single-link LVDS
86 description: Video port for LVDS Channel-A output (panel or bridge).
87 $ref: '#/$defs/lvds-port'
90 description: Video port for LVDS Channel-B output (panel or bridge).
91 $ref: '#/$defs/lvds-port'
103 lvds-port:
113 ti,lvds-termination-ohms:
118 ti,lvds-vod-swing-clock-microvolt:
[all …]
H A Dtoshiba,tc358775.yaml7 title: Toshiba TC358775 DSI to LVDS bridge
13 This binding supports DSI to LVDS bridges TC358765 and TC358775
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
18 limited by 135 MHz LVDS speed
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
20 panel, limited by 270 MHz LVDS speed.
33 description: 1.2V LVDS Power Supply
75 Video port for LVDS output (panel or connector).
80 Video port for Dual link LVDS output (panel or connector).
110 /* For single-link LVDS display panel */
[all …]
H A Dthine,thc63lvd1024.yaml7 title: Thine Electronics THC63LVD1024 LVDS Decoder
14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
16 modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
45 description: First LVDS input port
49 description: Second LVDS input port
73 Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and
87 lvds-decoder {
H A Dmicrochip,sam9x75-lvds.yaml4 $id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml#
7 title: Microchip SAM9X75 LVDS Controller
15 LVDS output signals. LVDSC functions include bit mapping, balanced mode
20 const: microchip,sam9x75-lvds
49 lvds-controller@f8060000 {
50 compatible = "microchip,sam9x75-lvds";
/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8qm-lvds-phy.yaml4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-lvds-phy.yaml#
7 title: Mixel LVDS PHY for Freescale i.MX8qm SoC
13 The Mixel LVDS PHY IP block is found on Freescale i.MX8qm SoC.
15 groups of four data lanes of LVDS data streams. A phase-locked
17 data streams over a fifth LVDS link. Every cycle of the transmit
19 through the two groups of LVDS data streams. Together with the
20 transmit clocks, the two groups of LVDS data streams form two
21 LVDS channels.
23 The Mixel LVDS PHY found on Freescale i.MX8qm SoC is controlled
30 - fsl,imx8qm-lvds-phy
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a774c0-ek874-idk-2121wr.dts4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
23 panel-lvds {
24 compatible = "advantech,idk-2121wr", "panel-lvds";
49 dual-lvds-odd-pixels;
57 dual-lvds-even-pixels;
68 * When GP0_17 is low LVDS[01] are connected to the LVDS connector
69 * When GP0_17 is high LVDS[01] are connected to the LT8918L
71 lvds-connector-en-hog {
75 line-name = "lvds-connector-en-gpio";
H A Dhihope-rzg2-ex-lvds.dtsi3 * Device Tree Source for the RZ/G2[MN] HiHope sub board LVDS common parts
20 * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
23 lvds-connector-en-hog {
27 line-name = "lvds-connector-en-gpio";
/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6q-ldb.yaml7 title: Freescale LVDS Display Bridge (ldb)
10 The LVDS Display Bridge device tree node contains up to two lvds-channel
11 nodes describing each of the two LVDS encoder channels of the bridge.
38 The phandle points to the iomuxc-gpr region containing the LVDS
67 if it exists, only LVDS channel 0 should
72 '^lvds-channel@[0-1]$':
75 Each LVDS Channel has to contain either an of graph link to a panel device node
77 LVDS display as well as the fsl,data-mapping and fsl,data-width properties.
114 (lvds-channel@[0,1], respectively).
116 to the four LVDS multiplexer inputs.
[all …]
/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,lvds.yaml4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#
7 title: Rockchip low-voltage differential signal (LVDS) transmitter
16 - rockchip,px30-lvds
17 - rockchip,rk3288-lvds
43 enum: [rgb, lvds, duallvds]
90 const: rockchip,px30-lvds
109 const: rockchip,rk3288-lvds
130 lvds: lvds@ff96c000 {
131 compatible = "rockchip,rk3288-lvds";
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s-colibri-iris-v2.dts31 * This switches the LVDS transceiver to VESA color mapping mode.
33 lvds-color-map-hog {
43 * This switches the LVDS transceiver to the 24-bit RGB mode.
45 lvds-rgb-mode-hog {
53 * This switches the LVDS transceiver to the single-channel
56 lvds-ch-mode-hog {
63 /* This turns the LVDS transceiver on */
64 lvds-power-on-hog {
H A Dimx7d-colibri-iris-v2.dts31 * This switches the LVDS transceiver to VESA color mapping mode.
33 lvds-color-map-hog {
43 * This switches the LVDS transceiver to the 24-bit RGB mode.
45 lvds-rgb-mode-hog {
53 * This switches the LVDS transceiver to the single-channel
56 lvds-ch-mode-hog {
63 /* This turns the LVDS transceiver on */
64 lvds-power-on-hog {
H A Dimx6ull-colibri-wifi-iris-v2.dts31 /* This turns the LVDS transceiver on */
32 lvds-power-on-hog {
42 * This switches the LVDS transceiver to the single-channel
45 lvds-ch-mode-hog {
53 * This switches the LVDS transceiver to the 24-bit RGB mode.
55 lvds-rgb-mode-hog {
65 * This switches the LVDS transceiver to VESA color mapping mode.
67 lvds-color-map-hog {
H A Dimx6ull-colibri-iris-v2.dts31 /* This turns the LVDS transceiver on */
32 lvds-power-on-hog {
42 * This switches the LVDS transceiver to the single-channel
45 lvds-ch-mode-hog {
53 * This switches the LVDS transceiver to the 24-bit RGB mode.
55 lvds-rgb-mode-hog {
65 * This switches the LVDS transceiver to VESA color mapping mode.
67 lvds-color-map-hog {
H A Dimx6q-var-mx6customboard.dts19 panel0: lvds-panel0 {
20 compatible = "panel-lvds";
46 panel1: lvds-panel1 {
47 compatible = "panel-lvds";
71 backlight_lvds: backlight-lvds {
206 lvds-channel@0 {
220 lvds-channel@1 {
H A Dimx53-sk-imx53-atm0700d4-lvds.dts11 lvds-decoder {
12 compatible = "ti,sn65lvds94", "lvds-decoder";
39 /* LVDS pins only have pin mux configuration */
64 lvds0: lvds-channel@0 {
/linux/drivers/gpu/drm/i915/display/
H A Dintel_lvds_regs.h11 /* LVDS port control */
12 #define LVDS _MMIO(0x61180) macro
14 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
15 * the DPLL semantics change when the LVDS is assigned to that pipe.
18 /* Selects pipe B for LVDS data. Must be set on pre-965. */
23 /* LVDS dithering flag on 965/g4x platform */
25 /* LVDS sync polarity flags. Set to invert (i.e. negative) */
/linux/drivers/gpu/drm/stm/
H A DKconfig27 tristate "STMicroelectronics LVDS Display Interface Transmitter DRM driver"
30 Enable support for LVDS encoders on STMicroelectronics SoC.
31 The STM LVDS is a bridge which serialize pixel stream onto
32 a LVDS protocol.
35 called lvds.
/linux/Documentation/devicetree/bindings/display/
H A Dlvds.yaml4 $id: http://devicetree.org/schemas/display/lvds.yaml#
7 title: LVDS Display Common Properties
10 - $ref: lvds-data-mapping.yaml#
17 This binding extends the data mapping defined in lvds-data-mapping.yaml.
20 data formats and layouts is used to drive LVDS displays.
H A Dallwinner,sun4i-a10-tcon.yaml14 The TCON acts as a timing controller for RGB, LVDS and TV
90 - description: TCON LVDS Reset Line
99 - description: TCON LVDS Reset Line
107 - const: lvds
116 - const: lvds
144 (RGB, LVDS, etc.), and the second being used for the
207 - const: lvds-alt
226 - const: lvds-alt
310 - const: lvds
328 - const: lvds
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dradeon_legacy_encoders.c72 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; in radeon_legacy_lvds_update() local
73 panel_pwr_delay = lvds->panel_pwr_delay; in radeon_legacy_lvds_update()
74 if (lvds->bl_dev) in radeon_legacy_lvds_update()
75 backlight_level = lvds->backlight_level; in radeon_legacy_lvds_update()
77 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; in radeon_legacy_lvds_update() local
78 panel_pwr_delay = lvds->panel_pwr_delay; in radeon_legacy_lvds_update()
79 if (lvds->bl_dev) in radeon_legacy_lvds_update()
80 backlight_level = lvds->backlight_level; in radeon_legacy_lvds_update()
84 /* macs (and possibly some x86 oem systems?) wire up LVDS strangely in radeon_legacy_lvds_update()
153 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; in radeon_legacy_lvds_dpms() local
[all …]
/linux/drivers/video/fbdev/sis/
H A Dinitdef.h261 [0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
265 010 LVDS
266 011 LVDS + Tumpion Zurac
267 100 LVDS + Chrontel 7005
271 010 LVDS
272 011 LVDS + Chrontel 7019
277 [4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
305 #define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */
320 010 LVDS
334 D[7] LVDS (SiS or third party)
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-lvds-display.dtsi3 /* This dtsi file describes parts common for Asus T30 devices with a LVDS panel. */
35 /* Texas Instruments SN75LVDS83B LVDS Transmitter */
36 lvds-encoder {
37 compatible = "ti,sn75lvds83", "lvds-encoder";
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_encoders.c259 drm_info(adev_to_drm(adev), "ATOM LVDS backlight unloaded\n"); in amdgpu_atombios_encoder_fini_backlight()
547 * crtc0 -> dig1 -> UNIPHY2 link A -> LVDS
1975 struct amdgpu_encoder_atom_dig *lvds = NULL; in amdgpu_atombios_encoder_get_lcd_info() local
1982 lvds = in amdgpu_atombios_encoder_get_lcd_info()
1985 if (!lvds) in amdgpu_atombios_encoder_get_lcd_info()
1988 lvds->native_mode.clock = in amdgpu_atombios_encoder_get_lcd_info()
1990 lvds->native_mode.hdisplay = in amdgpu_atombios_encoder_get_lcd_info()
1992 lvds->native_mode.vdisplay = in amdgpu_atombios_encoder_get_lcd_info()
1994 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
1996 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
[all …]
/linux/include/linux/phy/
H A Dphy-lvds.h10 * struct phy_configure_opts_lvds - LVDS configuration set
13 * @differential_clk_rate: Clock rate, in Hertz, of the LVDS
23 * This structure is used to represent the configuration state of a LVDS phy.

1234567891011