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/linux/drivers/gpu/drm/radeon/
H A Dradeon_legacy_encoders.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
46 static void radeon_legacy_encoder_disable(struct drm_encoder *encoder) in radeon_legacy_encoder_disable() argument
48 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); in radeon_legacy_encoder_disable()
51 encoder_funcs = encoder->helper_private; in radeon_legacy_encoder_disable()
52 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF); in radeon_legacy_encoder_disable()
53 radeon_encoder->active_device = 0; in radeon_legacy_encoder_disable()
56 static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode) in radeon_legacy_lvds_update() argument
58 struct drm_device *dev = encoder->dev; in radeon_legacy_lvds_update()
59 struct radeon_device *rdev = dev->dev_private; in radeon_legacy_lvds_update()
60 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); in radeon_legacy_lvds_update()
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H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
678 UCHAR ucAction; // 0: turn off encoder
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H A Dradeon_atombios.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
52 if ((rdev->family == CHIP_R420) || in radeon_lookup_i2c_gpio_quirks()
53 (rdev->family == CHIP_R423) || in radeon_lookup_i2c_gpio_quirks()
54 (rdev->family == CHIP_RV410)) { in radeon_lookup_i2c_gpio_quirks()
55 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) || in radeon_lookup_i2c_gpio_quirks()
56 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) || in radeon_lookup_i2c_gpio_quirks()
57 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) { in radeon_lookup_i2c_gpio_quirks()
58 gpio->ucClkMaskShift = 0x19; in radeon_lookup_i2c_gpio_quirks()
59 gpio->ucDataMaskShift = 0x18; in radeon_lookup_i2c_gpio_quirks()
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H A Dradeon_encoders.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
40 static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) in radeon_encoder_clones() argument
42 struct drm_device *dev = encoder->dev; in radeon_encoder_clones()
43 struct radeon_device *rdev = dev->dev_private; in radeon_encoder_clones()
44 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); in radeon_encoder_clones()
46 uint32_t index_mask = drm_encoder_mask(encoder); in radeon_encoder_clones()
50 if (rdev->family >= CHIP_R600) in radeon_encoder_clones()
52 /* LVDS/TV are too wacky */ in radeon_encoder_clones()
53 if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT) in radeon_encoder_clones()
56 if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) in radeon_encoder_clones()
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_encoders.c2 * Copyright 2007-11 Advanced Micro Devices, Inc.
74 struct drm_device *dev = amdgpu_encoder->base.dev; in amdgpu_atombios_encoder_get_backlight_level()
77 if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) in amdgpu_atombios_encoder_get_backlight_level()
87 struct drm_encoder *encoder = &amdgpu_encoder->base; in amdgpu_atombios_encoder_set_backlight_level() local
88 struct drm_device *dev = amdgpu_encoder->base.dev; in amdgpu_atombios_encoder_set_backlight_level()
92 if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) in amdgpu_atombios_encoder_set_backlight_level()
95 if ((amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) && in amdgpu_atombios_encoder_set_backlight_level()
96 amdgpu_encoder->enc_priv) { in amdgpu_atombios_encoder_set_backlight_level()
97 dig = amdgpu_encoder->enc_priv; in amdgpu_atombios_encoder_set_backlight_level()
98 dig->backlight_level = level; in amdgpu_atombios_encoder_set_backlight_level()
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-lvds-display.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /* This dtsi file describes parts common for Asus T30 devices with a LVDS panel. */
5 #include <dt-bindings/gpio/tegra-gpio.h>
15 remote-endpoint = <&bridge_input>;
16 bus-width = <24>;
23 display-panel {
24 power-supply = <&vdd_pnl>;
25 ddc-i2c-bus = <&lcd_ddc>;
30 remote-endpoint = <&bridge_output>;
35 /* Texas Instruments SN75LVDS83B LVDS Transmitter */
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/linux/drivers/gpu/drm/renesas/rcar-du/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 tristate "DRM Support for R-Car Display Unit"
14 Choose this option if you have an R-Car chipset.
15 If M is selected the module will be called rcar-du-drm.
18 bool "R-Car DU Color Management Module (CMM) Support"
22 Enable support for R-Car Color Management Module (CMM).
29 tristate "R-Car Gen3 and RZ/G2 DU HDMI Encoder Support"
34 Enable support for R-Car Gen3 or RZ/G2 internal HDMI encoder.
37 bool "R-Car DU LVDS Encoder Support"
42 Enable support for the R-Car Display Unit embedded LVDS encoders.
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H A Drcar_lvds.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
25 return -ENOSYS; in rcar_lvds_pclk_enable()
/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
21 struct drm_device *dev = mdp4_kms->dev; in mdp4_hw_init()
25 pm_runtime_get_sync(dev->dev); in mdp4_hw_init()
27 if (mdp4_kms->rev > 1) { in mdp4_hw_init()
37 clk = clk_get_rate(mdp4_kms->clk); in mdp4_hw_init()
39 if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) { in mdp4_hw_init()
40 dmap_cfg = 0x47; /* 16 bytes-burst x 8 req */ in mdp4_hw_init()
41 vg_cfg = 0x47; /* 16 bytes-burs x 8 req */ in mdp4_hw_init()
43 dmap_cfg = 0x27; /* 8 bytes-burst x 8 req */ in mdp4_hw_init()
44 vg_cfg = 0x43; /* 16 bytes-burst x 4 req */ in mdp4_hw_init()
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/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,lvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip low-voltage differential signal (LVDS) transmitter
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,px30-lvds
17 - rockchip,rk3288-lvds
25 clock-names:
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
73 /* these are outputs from the chip - integrated only
91 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
107 * create the DMA scatter-gather list for each FB color plane. This sg
119 * in the rotated and remapped GTT view all no-CCS formats (up to 2
174 void (*link_check)(struct intel_encoder *encoder);
176 enum intel_hotplug_state (*hotplug)(struct intel_encoder *encoder,
217 void (*audio_enable)(struct intel_encoder *encoder,
220 void (*audio_disable)(struct intel_encoder *encoder,
224 * the encoder is active. If the encoder is enabled it also set the pipe
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H A Dintel_connector.c47 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n", connector->base.base.id, in intel_connector_modeset_retry_work_fn()
48 connector->base.name); in intel_connector_modeset_retry_work_fn()
51 mutex_lock(&display->drm->mode_config.mutex); in intel_connector_modeset_retry_work_fn()
55 drm_connector_set_link_status_property(&connector->base, in intel_connector_modeset_retry_work_fn()
57 mutex_unlock(&display->drm->mode_config.mutex); in intel_connector_modeset_retry_work_fn()
59 drm_kms_helper_connector_hotplug_event(&connector->base); in intel_connector_modeset_retry_work_fn()
61 drm_connector_put(&connector->base); in intel_connector_modeset_retry_work_fn()
68 drm_connector_get(&connector->base); in intel_connector_queue_modeset_retry_work()
69 if (!queue_work(display->wq.unordered, &connector->modeset_retry_work)) in intel_connector_queue_modeset_retry_work()
70 drm_connector_put(&connector->base); in intel_connector_queue_modeset_retry_work()
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/linux/drivers/gpu/drm/gma500/
H A Dgma_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
32 struct drm_device *dev = crtc->dev; in gma_pipe_has_type()
38 if (connector->encoder && connector->encoder->crtc == crtc) { in gma_pipe_has_type()
41 if (gma_encoder->type == type) { in gma_pipe_has_type()
61 struct drm_device *dev = crtc->dev; in gma_pipe_set_base()
64 struct drm_framebuffer *fb = crtc->primary->fb; in gma_pipe_set_base()
66 int pipe = gma_crtc->pipe; in gma_pipe_set_base()
67 const struct psb_offset *map = &dev_priv->regmap[pipe]; in gma_pipe_set_base()
77 dev_err(dev->dev, "No FB bound\n"); in gma_pipe_set_base()
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H A Dpsb_intel_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
49 /* The single-channel range is 25-112Mhz, and dual-channel
50 * is 80-224Mhz. Prefer single channel as much as possible.
71 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); in psb_intel_clock()
72 clock->p = clock->p1 * clock->p2; in psb_intel_clock()
73 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock()
74 clock->dot = clock->vco / clock->p; in psb_intel_clock()
79 * or -1 if the panel fitter is not present or not in use
89 return -1; in psb_intel_panel_fitter_pipe()
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H A Dcdv_intel_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
58 /* The single-channel range is 25-112Mhz, and dual-channel
59 * is 80-224Mhz. Prefer single channel as much as possible.
119 ret__ = -ETIMEDOUT; \
218 int pipe = gma_crtc->pipe; in cdv_dpll_set_clock_cdv()
273 m |= ((clock->m2) << SB_M_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv()
289 n_vco |= ((clock->n) << SB_N_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv()
291 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv()
294 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv()
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/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6q-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale LVDS Display Bridge (ldb)
10 The LVDS Display Bridge device tree node contains up to two lvds-channel
11 nodes describing each of the two LVDS encoder channels of the bridge.
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,imx53-ldb
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/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_tcon.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
27 #define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe))
30 #define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe))
67 #define SUN4I_TCON0_BASIC0_X(width) ((((width) - 1) & 0xfff) << 16)
68 #define SUN4I_TCON0_BASIC0_Y(height) (((height) - 1) & 0xfff)
71 #define SUN4I_TCON0_BASIC1_H_TOTAL(total) ((((total) - 1) & 0x1fff) << 16)
72 #define SUN4I_TCON0_BASIC1_H_BACKPORCH(bp) (((bp) - 1) & 0xfff)
76 #define SUN4I_TCON0_BASIC2_V_BACKPORCH(bp) (((bp) - 1) & 0xfff)
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/linux/drivers/gpu/drm/amd/include/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Ddfp.c5 * Copyright 2007-2009 Stuart Bennett
58 * this does not give a correct answer for off-chip dvi, but there's no in nv04_dfp_get_bound_head()
61 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_get_bound_head()
72 * Luckily we do know the values ;-) in nv04_dfp_bind_head()
78 int ramdac = (dcbent->or & DCB_OUTPUT_C) >> 2; in nv04_dfp_bind_head()
84 if (dcbent->type == DCB_OUTPUT_LVDS) in nv04_dfp_bind_head()
87 nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04); in nv04_dfp_bind_head()
90 nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08); in nv04_dfp_bind_head()
95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()
113 void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode) in nv04_dfp_update_fp_control() argument
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/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_connector.c55 const struct drm_connector_helper_funcs *helper = connector->helper_private; in nouveau_conn_native_mode()
56 struct nouveau_drm *drm = nouveau_drm(connector->dev); in nouveau_conn_native_mode()
57 struct drm_device *dev = connector->dev; in nouveau_conn_native_mode()
61 list_for_each_entry(mode, &connector->probed_modes, head) { in nouveau_conn_native_mode()
62 if (helper->mode_valid(connector, mode) != MODE_OK || in nouveau_conn_native_mode()
63 (mode->flags & DRM_MODE_FLAG_INTERLACE)) in nouveau_conn_native_mode()
67 if (mode->type & DRM_MODE_TYPE_PREFERRED) { in nouveau_conn_native_mode()
75 if (mode->hdisplay < high_w) in nouveau_conn_native_mode()
78 if (mode->hdisplay == high_w && mode->vdisplay < high_h) in nouveau_conn_native_mode()
81 if (mode->hdisplay == high_w && mode->vdisplay == high_h && in nouveau_conn_native_mode()
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/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi83.c1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
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H A Dtc358764.c1 // SPDX-License-Identifier: GPL-2.0
23 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
38 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
66 /* LVDS registers */
109 #define LV_CFG 0x049C /* LVDS Configuration */
110 #define LV_PHY0 0x04A0 /* LVDS PHY 0 */
120 #define SYS_RST_I2CS BIT(0) /* Reset I2C-Slave controller */
121 #define SYS_RST_I2CM BIT(1) /* Reset I2C-Master controller */
124 #define SYS_RST_DSIRX BIT(4) /* Reset DSI-RX and App controller */
159 int ret = ctx->error; in tc358764_clear_error()
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-nattis-2-natte-2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-nattis-2-natte-2.dts - Device Tree file for the Linea/Nattis board
9 /dts-v1/;
10 #include "at91-linea.dtsi"
11 #include "at91-natte.dtsi"
14 model = "Axentia Linea-Nattis v2 Natte v2";
15 compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
18 gpio-keys {
19 compatible = "gpio-keys";
21 key-wakeup {
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/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
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