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/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_lvds.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
23 struct drm_encoder encoder; member
36 drm_encoder_to_sun4i_lvds(struct drm_encoder *encoder) in drm_encoder_to_sun4i_lvds() argument
38 return container_of(encoder, struct sun4i_lvds, in drm_encoder_to_sun4i_lvds()
39 encoder); in drm_encoder_to_sun4i_lvds()
44 struct sun4i_lvds *lvds = in sun4i_lvds_get_modes() local
47 return drm_panel_get_modes(lvds->panel, connector); in sun4i_lvds_get_modes()
68 static void sun4i_lvds_encoder_enable(struct drm_encoder *encoder) in sun4i_lvds_encoder_enable() argument
70 struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); in sun4i_lvds_encoder_enable() local
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H A Dsun4i_tcon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
11 #include <linux/media-bus-format.h>
43 static struct drm_connector *sun4i_tcon_get_connector(const struct drm_encoder *encoder) in sun4i_tcon_get_connector() argument
48 drm_connector_list_iter_begin(encoder->dev, &iter); in sun4i_tcon_get_connector()
50 if (connector->encoder == encoder) { in sun4i_tcon_get_connector()
59 static int sun4i_tcon_get_pixel_depth(const struct drm_encoder *encoder) in sun4i_tcon_get_pixel_depth() argument
64 connector = sun4i_tcon_get_connector(encoder); in sun4i_tcon_get_pixel_depth()
66 return -EINVAL; in sun4i_tcon_get_pixel_depth()
68 info = &connector->display_info; in sun4i_tcon_get_pixel_depth()
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H A Dsun4i_tcon.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
27 #define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe))
30 #define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe))
67 #define SUN4I_TCON0_BASIC0_X(width) ((((width) - 1) & 0xfff) << 16)
68 #define SUN4I_TCON0_BASIC0_Y(height) (((height) - 1) & 0xfff)
71 #define SUN4I_TCON0_BASIC1_H_TOTAL(total) ((((total) - 1) & 0x1fff) << 16)
72 #define SUN4I_TCON0_BASIC1_H_BACKPORCH(bp) (((bp) - 1) & 0xfff)
76 #define SUN4I_TCON0_BASIC2_V_BACKPORCH(bp) (((bp) - 1) & 0xfff)
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_encoders.c2 * Copyright 2007-11 Advanced Micro Devices, Inc.
74 struct drm_device *dev = amdgpu_encoder->base.dev; in amdgpu_atombios_encoder_get_backlight_level()
77 if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) in amdgpu_atombios_encoder_get_backlight_level()
87 struct drm_encoder *encoder = &amdgpu_encoder->base; in amdgpu_atombios_encoder_set_backlight_level() local
88 struct drm_device *dev = amdgpu_encoder->base.dev; in amdgpu_atombios_encoder_set_backlight_level()
92 if (!(adev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU)) in amdgpu_atombios_encoder_set_backlight_level()
95 if ((amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) && in amdgpu_atombios_encoder_set_backlight_level()
96 amdgpu_encoder->enc_priv) { in amdgpu_atombios_encoder_set_backlight_level()
97 dig = amdgpu_encoder->enc_priv; in amdgpu_atombios_encoder_set_backlight_level()
98 dig->backlight_level = level; in amdgpu_atombios_encoder_set_backlight_level()
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/linux/drivers/gpu/drm/gma500/
H A Doaktrail_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2009 Intel Corporation
24 /* The max/min PWM frequency in BPCR[31:17] - */
26 * 15-bit field of the and then*/
27 /* shifts to the left by one bit to get the actual 16-bit
28 * value that the 15-bits correspond to.*/
51 dev_priv->is_lvds_on = true; in oaktrail_lvds_set_power()
52 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
53 dev_priv->ops->lvds_bl_power(dev, true); in oaktrail_lvds_set_power()
55 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
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H A Dgma_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
32 struct drm_device *dev = crtc->dev; in gma_pipe_has_type()
38 if (connector->encoder && connector->encoder->crtc == crtc) { in gma_pipe_has_type()
41 if (gma_encoder->type == type) { in gma_pipe_has_type()
61 struct drm_device *dev = crtc->dev; in gma_pipe_set_base()
64 struct drm_framebuffer *fb = crtc->primary->fb; in gma_pipe_set_base()
66 int pipe = gma_crtc->pipe; in gma_pipe_set_base()
67 const struct psb_offset *map = &dev_priv->regmap[pipe]; in gma_pipe_set_base()
77 dev_err(dev->dev, "No FB bound\n"); in gma_pipe_set_base()
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H A Dpsb_intel_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
48 /* The single-channel range is 25-112Mhz, and dual-channel
49 * is 80-224Mhz. Prefer single channel as much as possible.
70 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); in psb_intel_clock()
71 clock->p = clock->p1 * clock->p2; in psb_intel_clock()
72 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock()
73 clock->dot = clock->vco / clock->p; in psb_intel_clock()
78 * or -1 if the panel fitter is not present or not in use
88 return -1; in psb_intel_panel_fitter_pipe()
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/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_encoder.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Encoder
5 * Copyright (C) 2013-2014 Renesas Electronics Corporation
21 /* -----------------------------------------------------------------------------
22 * Encoder
70 bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel, in rcar_du_encoder_init()
77 return -EPROBE_DEFER; in rcar_du_encoder_init()
81 rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge; in rcar_du_encoder_init()
85 rcdu->dsi[output - RCAR_DU_OUTPUT_DSI0] = bridge; in rcar_du_encoder_init()
89 * Create and initialize the encoder. On Gen3, skip the LVDS1 output if in rcar_du_encoder_init()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 tristate "DRM Support for R-Car Display Unit"
14 Choose this option if you have an R-Car chipset.
15 If M is selected the module will be called rcar-du-drm.
18 bool "R-Car DU Color Management Module (CMM) Support"
22 Enable support for R-Car Color Management Module (CMM).
29 tristate "R-Car Gen3 and RZ/G2 DU HDMI Encoder Support"
34 Enable support for R-Car Gen3 or RZ/G2 internal HDMI encoder.
37 bool "R-Car DU LVDS Encoder Support"
42 Enable support for the R-Car Display Unit embedded LVDS encoders.
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H A Drcar_du_crtc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit CRTCs
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
35 struct rcar_du_device *rcdu = rcrtc->dev; in rcar_du_crtc_read()
37 return rcar_du_read(rcdu, rcrtc->mmio_offset + reg); in rcar_du_crtc_read()
42 struct rcar_du_device *rcdu = rcrtc->dev; in rcar_du_crtc_write()
44 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data); in rcar_du_crtc_write()
49 struct rcar_du_device *rcdu = rcrtc->dev; in rcar_du_crtc_clr()
51 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, in rcar_du_crtc_clr()
52 rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr); in rcar_du_crtc_clr()
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H A Drcar_du_drv.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * R-Car Display Unit DRM driver
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
29 #define RCAR_DU_FEATURE_CRTC_IRQ BIT(0) /* Per-CRTC IRQ */
30 #define RCAR_DU_FEATURE_CRTC_CLOCK BIT(1) /* Per-CRTC clock */
52 * struct rcar_du_output_routing - Output routing specification
58 * of in-SoC encoder for the output.
66 * struct rcar_du_device_info - DU model-specific information
72 * @num_lvds: number of internal LVDS encoders
76 * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_combios.c3 * Copyright 2007-8 Advanced Micro Devices, Inc.
133 struct radeon_device *rdev = dev->dev_private; in combios_get_table_offset()
137 if (!rdev->bios) in combios_get_table_offset()
362 size = RBIOS8(rdev->bios_header_start + 0x6); in combios_get_table_offset()
365 offset = RBIOS16(rdev->bios_header_start + check_offset); in combios_get_table_offset()
379 raw = rdev->bios + edid_info; in radeon_combios_check_hardcoded_edid()
388 rdev->mode_info.bios_hardcoded_edid = edid; in radeon_combios_check_hardcoded_edid()
396 return drm_edid_duplicate(drm_edid_raw(rdev->mode_info.bios_hardcoded_edid)); in radeon_bios_get_hardcoded_edid()
447 if (rdev->family == CHIP_RS300 || in combios_setup_i2c_bus()
448 rdev->family == CHIP_RS400 || in combios_setup_i2c_bus()
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H A Dradeon_legacy_crtc.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
40 struct drm_device *dev = crtc->dev; in radeon_overscan_setup()
41 struct radeon_device *rdev = dev->dev_private; in radeon_overscan_setup()
44 WREG32(RADEON_OVR_CLR + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
45 WREG32(RADEON_OVR_WID_LEFT_RIGHT + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
46 WREG32(RADEON_OVR_WID_TOP_BOTTOM + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
52 struct drm_device *dev = crtc->dev; in radeon_legacy_rmx_mode_set()
53 struct radeon_device *rdev = dev->dev_private; in radeon_legacy_rmx_mode_set()
55 int xres = mode->hdisplay; in radeon_legacy_rmx_mode_set()
56 int yres = mode->vdisplay; in radeon_legacy_rmx_mode_set()
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H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
678 UCHAR ucAction; // 0: turn off encoder
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H A Dradeon_atombios.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
52 if ((rdev->family == CHIP_R420) || in radeon_lookup_i2c_gpio_quirks()
53 (rdev->family == CHIP_R423) || in radeon_lookup_i2c_gpio_quirks()
54 (rdev->family == CHIP_RV410)) { in radeon_lookup_i2c_gpio_quirks()
55 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) || in radeon_lookup_i2c_gpio_quirks()
56 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) || in radeon_lookup_i2c_gpio_quirks()
57 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) { in radeon_lookup_i2c_gpio_quirks()
58 gpio->ucClkMaskShift = 0x19; in radeon_lookup_i2c_gpio_quirks()
59 gpio->ucDataMaskShift = 0x18; in radeon_lookup_i2c_gpio_quirks()
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H A Dradeon_mode.h39 #include <linux/i2c-algo-bit.h>
102 /* radeon gpio-based i2c
124 /* uses multi-media i2c engine */
251 /* DVI-I properties */
274 /* pointer to backlight encoder */
277 /* bitmask for active encoder frontends */
284 struct radeon_encoder *encoder; member
359 struct drm_encoder *encoder; member
376 /* legacy lvds */
425 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-lvds-display.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /* This dtsi file describes parts common for Asus T30 devices with a LVDS panel. */
5 #include <dt-bindings/gpio/tegra-gpio.h>
15 remote-endpoint = <&bridge_input>;
16 bus-width = <24>;
23 display-panel {
24 power-supply = <&vdd_pnl>;
25 ddc-i2c-bus = <&lcd_ddc>;
30 remote-endpoint = <&bridge_output>;
35 /* Texas Instruments SN75LVDS83B LVDS Transmitter */
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/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip,lvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip low-voltage differential signal (LVDS) transmitter
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,px30-lvds
17 - rockchip,rk3288-lvds
25 clock-names:
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/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6q-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale LVDS Display Bridge (ldb)
10 The LVDS Display Bridge device tree node contains up to two lvds-channel
11 nodes describing each of the two LVDS encoder channels of the bridge.
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,imx53-ldb
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/linux/drivers/gpu/drm/bridge/
H A Dmegachips-stdpxxxx-ge-b850v3-fw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
4 * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
10 * This driver creates a drm_bridge and a drm_connector for the LVDS to DP++
12 * signal pipeline: a STDP4028(LVDS to DP) and a STDP2690(DP to DP++). The
19 * Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
71 struct i2c_adapter *adapter = client->adapter; in stdp2690_read_block()
76 .addr = client->addr, in stdp2690_read_block()
81 .addr = client->addr, in stdp2690_read_block()
89 return -1; in stdp2690_read_block()
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/linux/Documentation/devicetree/bindings/display/
H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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/linux/drivers/gpu/drm/amd/include/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-nattis-2-natte-2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-nattis-2-natte-2.dts - Device Tree file for the Linea/Nattis board
9 /dts-v1/;
10 #include "at91-linea.dtsi"
11 #include "at91-natte.dtsi"
14 model = "Axentia Linea-Nattis v2 Natte v2";
15 compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
18 gpio-keys {
19 compatible = "gpio-keys";
21 key-wakeup {
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/linux/drivers/gpu/drm/
H A Ddrm_encoder.c40 * generic sink entity, represented by &struct drm_connector). An encoder takes
64 { DRM_MODE_ENCODER_LVDS, "LVDS" },
74 struct drm_encoder *encoder; in drm_encoder_register_all() local
77 drm_for_each_encoder(encoder, dev) { in drm_encoder_register_all()
78 drm_debugfs_encoder_add(encoder); in drm_encoder_register_all()
80 if (encoder->funcs && encoder->funcs->late_register) in drm_encoder_register_all()
81 ret = encoder->funcs->late_register(encoder); in drm_encoder_register_all()
91 struct drm_encoder *encoder; in drm_encoder_unregister_all() local
93 drm_for_each_encoder(encoder, dev) { in drm_encoder_unregister_all()
94 if (encoder->funcs && encoder->funcs->early_unregister) in drm_encoder_unregister_all()
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