xref: /linux/drivers/gpu/drm/i915/display/intel_dvo.c (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *	Eric Anholt <eric@anholt.net>
26  */
27 
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_edid.h>
34 
35 #include "i915_drv.h"
36 #include "i915_reg.h"
37 #include "intel_connector.h"
38 #include "intel_de.h"
39 #include "intel_display_driver.h"
40 #include "intel_display_types.h"
41 #include "intel_dvo.h"
42 #include "intel_dvo_dev.h"
43 #include "intel_dvo_regs.h"
44 #include "intel_gmbus.h"
45 #include "intel_panel.h"
46 
47 #define INTEL_DVO_CHIP_NONE	0
48 #define INTEL_DVO_CHIP_LVDS	1
49 #define INTEL_DVO_CHIP_TMDS	2
50 #define INTEL_DVO_CHIP_TVOUT	4
51 #define INTEL_DVO_CHIP_LVDS_NO_FIXED	5
52 
53 #define SIL164_ADDR	0x38
54 #define CH7xxx_ADDR	0x76
55 #define TFP410_ADDR	0x38
56 #define NS2501_ADDR     0x38
57 
58 static const struct intel_dvo_device intel_dvo_devices[] = {
59 	{
60 		.type = INTEL_DVO_CHIP_TMDS,
61 		.name = "sil164",
62 		.port = PORT_C,
63 		.target_addr = SIL164_ADDR,
64 		.dev_ops = &sil164_ops,
65 	},
66 	{
67 		.type = INTEL_DVO_CHIP_TMDS,
68 		.name = "ch7xxx",
69 		.port = PORT_C,
70 		.target_addr = CH7xxx_ADDR,
71 		.dev_ops = &ch7xxx_ops,
72 	},
73 	{
74 		.type = INTEL_DVO_CHIP_TMDS,
75 		.name = "ch7xxx",
76 		.port = PORT_C,
77 		.target_addr = 0x75, /* For some ch7010 */
78 		.dev_ops = &ch7xxx_ops,
79 	},
80 	{
81 		.type = INTEL_DVO_CHIP_LVDS,
82 		.name = "ivch",
83 		.port = PORT_A,
84 		.target_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
85 		.dev_ops = &ivch_ops,
86 	},
87 	{
88 		.type = INTEL_DVO_CHIP_TMDS,
89 		.name = "tfp410",
90 		.port = PORT_C,
91 		.target_addr = TFP410_ADDR,
92 		.dev_ops = &tfp410_ops,
93 	},
94 	{
95 		.type = INTEL_DVO_CHIP_LVDS,
96 		.name = "ch7017",
97 		.port = PORT_C,
98 		.target_addr = 0x75,
99 		.gpio = GMBUS_PIN_DPB,
100 		.dev_ops = &ch7017_ops,
101 	},
102 	{
103 		.type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
104 		.name = "ns2501",
105 		.port = PORT_B,
106 		.target_addr = NS2501_ADDR,
107 		.dev_ops = &ns2501_ops,
108 	},
109 };
110 
111 struct intel_dvo {
112 	struct intel_encoder base;
113 
114 	struct intel_dvo_device dev;
115 
116 	struct intel_connector *attached_connector;
117 };
118 
enc_to_dvo(struct intel_encoder * encoder)119 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
120 {
121 	return container_of(encoder, struct intel_dvo, base);
122 }
123 
intel_attached_dvo(struct intel_connector * connector)124 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
125 {
126 	return enc_to_dvo(intel_attached_encoder(connector));
127 }
128 
intel_dvo_connector_get_hw_state(struct intel_connector * connector)129 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
130 {
131 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
132 	struct intel_encoder *encoder = intel_attached_encoder(connector);
133 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
134 	enum port port = encoder->port;
135 	u32 tmp;
136 
137 	tmp = intel_de_read(i915, DVO(port));
138 
139 	if (!(tmp & DVO_ENABLE))
140 		return false;
141 
142 	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
143 }
144 
intel_dvo_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)145 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
146 				   enum pipe *pipe)
147 {
148 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
149 	enum port port = encoder->port;
150 	u32 tmp;
151 
152 	tmp = intel_de_read(i915, DVO(port));
153 
154 	*pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp);
155 
156 	return tmp & DVO_ENABLE;
157 }
158 
intel_dvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)159 static void intel_dvo_get_config(struct intel_encoder *encoder,
160 				 struct intel_crtc_state *pipe_config)
161 {
162 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
163 	enum port port = encoder->port;
164 	u32 tmp, flags = 0;
165 
166 	pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
167 
168 	tmp = intel_de_read(i915, DVO(port));
169 	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
170 		flags |= DRM_MODE_FLAG_PHSYNC;
171 	else
172 		flags |= DRM_MODE_FLAG_NHSYNC;
173 	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
174 		flags |= DRM_MODE_FLAG_PVSYNC;
175 	else
176 		flags |= DRM_MODE_FLAG_NVSYNC;
177 
178 	pipe_config->hw.adjusted_mode.flags |= flags;
179 
180 	pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
181 }
182 
intel_disable_dvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)183 static void intel_disable_dvo(struct intel_atomic_state *state,
184 			      struct intel_encoder *encoder,
185 			      const struct intel_crtc_state *old_crtc_state,
186 			      const struct drm_connector_state *old_conn_state)
187 {
188 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
189 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
190 	enum port port = encoder->port;
191 
192 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
193 
194 	intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0);
195 	intel_de_posting_read(i915, DVO(port));
196 }
197 
intel_enable_dvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)198 static void intel_enable_dvo(struct intel_atomic_state *state,
199 			     struct intel_encoder *encoder,
200 			     const struct intel_crtc_state *pipe_config,
201 			     const struct drm_connector_state *conn_state)
202 {
203 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
204 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
205 	enum port port = encoder->port;
206 
207 	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
208 					 &pipe_config->hw.mode,
209 					 &pipe_config->hw.adjusted_mode);
210 
211 	intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE);
212 	intel_de_posting_read(i915, DVO(port));
213 
214 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
215 }
216 
217 static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector * _connector,struct drm_display_mode * mode)218 intel_dvo_mode_valid(struct drm_connector *_connector,
219 		     struct drm_display_mode *mode)
220 {
221 	struct intel_connector *connector = to_intel_connector(_connector);
222 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
223 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
224 	const struct drm_display_mode *fixed_mode =
225 		intel_panel_fixed_mode(connector, mode);
226 	int max_dotclk = to_i915(connector->base.dev)->display.cdclk.max_dotclk_freq;
227 	int target_clock = mode->clock;
228 	enum drm_mode_status status;
229 
230 	status = intel_cpu_transcoder_mode_valid(i915, mode);
231 	if (status != MODE_OK)
232 		return status;
233 
234 	/* XXX: Validate clock range */
235 
236 	if (fixed_mode) {
237 		enum drm_mode_status status;
238 
239 		status = intel_panel_mode_valid(connector, mode);
240 		if (status != MODE_OK)
241 			return status;
242 
243 		target_clock = fixed_mode->clock;
244 	}
245 
246 	if (target_clock > max_dotclk)
247 		return MODE_CLOCK_HIGH;
248 
249 	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
250 }
251 
intel_dvo_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)252 static int intel_dvo_compute_config(struct intel_encoder *encoder,
253 				    struct intel_crtc_state *pipe_config,
254 				    struct drm_connector_state *conn_state)
255 {
256 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
257 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
258 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
259 	const struct drm_display_mode *fixed_mode =
260 		intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
261 
262 	/*
263 	 * If we have timings from the BIOS for the panel, put them in
264 	 * to the adjusted mode.  The CRTC will be set up for this mode,
265 	 * with the panel scaling set up to source from the H/VDisplay
266 	 * of the original mode.
267 	 */
268 	if (fixed_mode) {
269 		int ret;
270 
271 		ret = intel_panel_compute_config(connector, adjusted_mode);
272 		if (ret)
273 			return ret;
274 	}
275 
276 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
277 		return -EINVAL;
278 
279 	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
280 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
281 
282 	return 0;
283 }
284 
intel_dvo_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)285 static void intel_dvo_pre_enable(struct intel_atomic_state *state,
286 				 struct intel_encoder *encoder,
287 				 const struct intel_crtc_state *pipe_config,
288 				 const struct drm_connector_state *conn_state)
289 {
290 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
291 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
292 	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
293 	enum port port = encoder->port;
294 	enum pipe pipe = crtc->pipe;
295 	u32 dvo_val;
296 
297 	/* Save the active data order, since I don't know what it should be set to. */
298 	dvo_val = intel_de_read(i915, DVO(port)) &
299 		  (DVO_DEDICATED_INT_ENABLE |
300 		   DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK);
301 	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
302 		   DVO_BLANK_ACTIVE_HIGH;
303 
304 	dvo_val |= DVO_PIPE_SEL(pipe);
305 	dvo_val |= DVO_PIPE_STALL;
306 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
307 		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
308 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
309 		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
310 
311 	intel_de_write(i915, DVO_SRCDIM(port),
312 		       DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) |
313 		       DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay));
314 	intel_de_write(i915, DVO(port), dvo_val);
315 }
316 
317 static enum drm_connector_status
intel_dvo_detect(struct drm_connector * _connector,bool force)318 intel_dvo_detect(struct drm_connector *_connector, bool force)
319 {
320 	struct intel_connector *connector = to_intel_connector(_connector);
321 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
322 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
323 
324 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
325 		    connector->base.base.id, connector->base.name);
326 
327 	if (!intel_display_device_enabled(i915))
328 		return connector_status_disconnected;
329 
330 	if (!intel_display_driver_check_access(i915))
331 		return connector->base.status;
332 
333 	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
334 }
335 
intel_dvo_get_modes(struct drm_connector * _connector)336 static int intel_dvo_get_modes(struct drm_connector *_connector)
337 {
338 	struct intel_connector *connector = to_intel_connector(_connector);
339 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
340 	int num_modes;
341 
342 	if (!intel_display_driver_check_access(i915))
343 		return drm_edid_connector_add_modes(&connector->base);
344 
345 	/*
346 	 * We should probably have an i2c driver get_modes function for those
347 	 * devices which will have a fixed set of modes determined by the chip
348 	 * (TV-out, for example), but for now with just TMDS and LVDS,
349 	 * that's not the case.
350 	 */
351 	num_modes = intel_ddc_get_modes(&connector->base, connector->base.ddc);
352 	if (num_modes)
353 		return num_modes;
354 
355 	return intel_panel_get_modes(connector);
356 }
357 
358 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
359 	.detect = intel_dvo_detect,
360 	.late_register = intel_connector_register,
361 	.early_unregister = intel_connector_unregister,
362 	.destroy = intel_connector_destroy,
363 	.fill_modes = drm_helper_probe_single_connector_modes,
364 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
365 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
366 };
367 
368 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
369 	.mode_valid = intel_dvo_mode_valid,
370 	.get_modes = intel_dvo_get_modes,
371 };
372 
intel_dvo_enc_destroy(struct drm_encoder * encoder)373 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
374 {
375 	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
376 
377 	if (intel_dvo->dev.dev_ops->destroy)
378 		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
379 
380 	intel_encoder_destroy(encoder);
381 }
382 
383 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
384 	.destroy = intel_dvo_enc_destroy,
385 };
386 
intel_dvo_encoder_type(const struct intel_dvo_device * dvo)387 static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo)
388 {
389 	switch (dvo->type) {
390 	case INTEL_DVO_CHIP_TMDS:
391 		return DRM_MODE_ENCODER_TMDS;
392 	case INTEL_DVO_CHIP_LVDS_NO_FIXED:
393 	case INTEL_DVO_CHIP_LVDS:
394 		return DRM_MODE_ENCODER_LVDS;
395 	default:
396 		MISSING_CASE(dvo->type);
397 		return DRM_MODE_ENCODER_NONE;
398 	}
399 }
400 
intel_dvo_connector_type(const struct intel_dvo_device * dvo)401 static int intel_dvo_connector_type(const struct intel_dvo_device *dvo)
402 {
403 	switch (dvo->type) {
404 	case INTEL_DVO_CHIP_TMDS:
405 		return DRM_MODE_CONNECTOR_DVII;
406 	case INTEL_DVO_CHIP_LVDS_NO_FIXED:
407 	case INTEL_DVO_CHIP_LVDS:
408 		return DRM_MODE_CONNECTOR_LVDS;
409 	default:
410 		MISSING_CASE(dvo->type);
411 		return DRM_MODE_CONNECTOR_Unknown;
412 	}
413 }
414 
intel_dvo_init_dev(struct drm_i915_private * dev_priv,struct intel_dvo * intel_dvo,const struct intel_dvo_device * dvo)415 static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv,
416 			       struct intel_dvo *intel_dvo,
417 			       const struct intel_dvo_device *dvo)
418 {
419 	struct i2c_adapter *i2c;
420 	u32 dpll[I915_MAX_PIPES];
421 	enum pipe pipe;
422 	int gpio;
423 	bool ret;
424 
425 	/*
426 	 * Allow the I2C driver info to specify the GPIO to be used in
427 	 * special cases, but otherwise default to what's defined
428 	 * in the spec.
429 	 */
430 	if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
431 		gpio = dvo->gpio;
432 	else if (dvo->type == INTEL_DVO_CHIP_LVDS)
433 		gpio = GMBUS_PIN_SSC;
434 	else
435 		gpio = GMBUS_PIN_DPB;
436 
437 	/*
438 	 * Set up the I2C bus necessary for the chip we're probing.
439 	 * It appears that everything is on GPIOE except for panels
440 	 * on i830 laptops, which are on GPIOB (DVOA).
441 	 */
442 	i2c = intel_gmbus_get_adapter(dev_priv, gpio);
443 
444 	intel_dvo->dev = *dvo;
445 
446 	/*
447 	 * GMBUS NAK handling seems to be unstable, hence let the
448 	 * transmitter detection run in bit banging mode for now.
449 	 */
450 	intel_gmbus_force_bit(i2c, true);
451 
452 	/*
453 	 * ns2501 requires the DVO 2x clock before it will
454 	 * respond to i2c accesses, so make sure we have
455 	 * the clock enabled before we attempt to initialize
456 	 * the device.
457 	 */
458 	for_each_pipe(dev_priv, pipe)
459 		dpll[pipe] = intel_de_rmw(dev_priv, DPLL(dev_priv, pipe), 0,
460 					  DPLL_DVO_2X_MODE);
461 
462 	ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
463 
464 	/* restore the DVO 2x clock state to original */
465 	for_each_pipe(dev_priv, pipe) {
466 		intel_de_write(dev_priv, DPLL(dev_priv, pipe), dpll[pipe]);
467 	}
468 
469 	intel_gmbus_force_bit(i2c, false);
470 
471 	return ret;
472 }
473 
intel_dvo_probe(struct drm_i915_private * i915,struct intel_dvo * intel_dvo)474 static bool intel_dvo_probe(struct drm_i915_private *i915,
475 			    struct intel_dvo *intel_dvo)
476 {
477 	int i;
478 
479 	/* Now, try to find a controller */
480 	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
481 		if (intel_dvo_init_dev(i915, intel_dvo,
482 				       &intel_dvo_devices[i]))
483 			return true;
484 	}
485 
486 	return false;
487 }
488 
intel_dvo_init(struct drm_i915_private * i915)489 void intel_dvo_init(struct drm_i915_private *i915)
490 {
491 	struct intel_connector *connector;
492 	struct intel_encoder *encoder;
493 	struct intel_dvo *intel_dvo;
494 
495 	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
496 	if (!intel_dvo)
497 		return;
498 
499 	connector = intel_connector_alloc();
500 	if (!connector) {
501 		kfree(intel_dvo);
502 		return;
503 	}
504 
505 	intel_dvo->attached_connector = connector;
506 
507 	encoder = &intel_dvo->base;
508 
509 	encoder->disable = intel_disable_dvo;
510 	encoder->enable = intel_enable_dvo;
511 	encoder->get_hw_state = intel_dvo_get_hw_state;
512 	encoder->get_config = intel_dvo_get_config;
513 	encoder->compute_config = intel_dvo_compute_config;
514 	encoder->pre_enable = intel_dvo_pre_enable;
515 	connector->get_hw_state = intel_dvo_connector_get_hw_state;
516 
517 	if (!intel_dvo_probe(i915, intel_dvo)) {
518 		kfree(intel_dvo);
519 		intel_connector_free(connector);
520 		return;
521 	}
522 
523 	assert_port_valid(i915, intel_dvo->dev.port);
524 
525 	encoder->type = INTEL_OUTPUT_DVO;
526 	encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
527 	encoder->port = intel_dvo->dev.port;
528 	encoder->pipe_mask = ~0;
529 
530 	if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS)
531 		encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) |
532 			BIT(INTEL_OUTPUT_DVO);
533 
534 	drm_encoder_init(&i915->drm, &encoder->base,
535 			 &intel_dvo_enc_funcs,
536 			 intel_dvo_encoder_type(&intel_dvo->dev),
537 			 "DVO %c", port_name(encoder->port));
538 
539 	drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n",
540 		    encoder->base.base.id, encoder->base.name,
541 		    intel_dvo->dev.name);
542 
543 	if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS)
544 		connector->polled = DRM_CONNECTOR_POLL_CONNECT |
545 			DRM_CONNECTOR_POLL_DISCONNECT;
546 	connector->base.polled = connector->polled;
547 
548 	drm_connector_init_with_ddc(&i915->drm, &connector->base,
549 				    &intel_dvo_connector_funcs,
550 				    intel_dvo_connector_type(&intel_dvo->dev),
551 				    intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC));
552 
553 	drm_connector_helper_add(&connector->base,
554 				 &intel_dvo_connector_helper_funcs);
555 	connector->base.display_info.subpixel_order = SubPixelHorizontalRGB;
556 
557 	intel_connector_attach_encoder(connector, encoder);
558 
559 	if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) {
560 		/*
561 		 * For our LVDS chipsets, we should hopefully be able
562 		 * to dig the fixed panel mode out of the BIOS data.
563 		 * However, it's in a different format from the BIOS
564 		 * data on chipsets with integrated LVDS (stored in AIM
565 		 * headers, likely), so for now, just get the current
566 		 * mode being output through DVO.
567 		 */
568 		intel_panel_add_encoder_fixed_mode(connector, encoder);
569 
570 		intel_panel_init(connector, NULL);
571 	}
572 }
573