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Searched +full:ls1028a +full:- +full:flexspi +full:- +full:clk (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,flexspi-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,flexspi-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale FlexSPI clock driver for Layerscape SoCs
10 - Michael Walle <michael@walle.cc>
13 The Freescale Layerscape SoCs have a special FlexSPI clock which is
19 - fsl,ls1028a-flexspi-clk
20 - fsl,lx2160a-flexspi-clk
28 '#clock-cells':
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/linux/drivers/clk/
H A Dclk-fsl-flexspi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Layerscape FlexSPI clock driver
8 #include <linux/clk-provider.h>
49 struct device *dev = &pdev->dev; in fsl_flexspi_clk_probe()
50 struct device_node *np = dev->of_node; in fsl_flexspi_clk_probe()
51 const char *clk_name = np->name; in fsl_flexspi_clk_probe()
60 return -ENOENT; in fsl_flexspi_clk_probe()
64 return -ENOENT; in fsl_flexspi_clk_probe()
70 reg = devm_ioremap(dev, res->start, resource_size(res)); in fsl_flexspi_clk_probe()
72 return -ENOMEM; in fsl_flexspi_clk_probe()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
6 The <linux/clk.h> calls support software clock gating and
16 Select this option when the clock API in <linux/clk.h> is implemented
19 'struct clk'.
29 clk, useful across many platforms, as well as an
30 implementation of the clock API in include/linux/clk.h.
31 Architectures utilizing the common struct clk should select
43 source "drivers/clk/versatile/Kconfig"
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
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/linux/drivers/spi/
H A Dspi-nxp-fspi.c1 // SPDX-License-Identifier: GPL-2.0+
4 * NXP FlexSPI(FSPI) controller driver.
6 * Copyright 2019-2020 NXP
9 * FlexSPI is a flexsible SPI host controller which supports two SPI
14 * FlexSPI controller is driven by the LUT(Look-up Table) registers
15 * LUT registers are a look-up-table for sequences of instructions.
19 * LUTs are being created at run-time based on the commands passed
20 * from the spi-mem framework, thus using single LUT index.
26 * Based on SPI MEM interface and spi-fsl-qspi.c driver.
37 #include <linux/clk.h>
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "fsl,ls1028a";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
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