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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A Dcache.json6 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe…
12 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe…
18 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe…
24 …cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefe…
36 …ocaltion other than the local core's L2 due to either only demand loads or demand loads plus prefe…
42 … core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefe…
48 … local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefe…
54 …ithout dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefe…
60 …d from local core's L2 without conflict due to either only demand loads or demand loads plus prefe…
66 …cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefe…
[all …]
H A Dother.json377 … and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch",
383 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch",
384 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe…
389 … on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch",
390 …t Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefe…
395 …ther chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch",
396 … on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefe…
401 …her chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch",
402 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe…
407 …cessor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch",
[all …]
H A Dmemory.json18 …ory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefe…
24 …s reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefe…
30 …cluding L4 from local remote or distant due to either only demand loads or demand loads plus prefe…
36 … L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe…
42 …ory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefe…
/freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/
H A Dmemory.json12 "BriefDescription": "Loads with latency value being above 128",
20 "PublicDescription": "Loads with latency value being above 128.",
26 "BriefDescription": "Loads with latency value being above 16",
34 "PublicDescription": "Loads with latency value being above 16.",
40 "BriefDescription": "Loads with latency value being above 256",
48 "PublicDescription": "Loads with latency value being above 256.",
54 "BriefDescription": "Loads with latency value being above 32",
62 "PublicDescription": "Loads with latency value being above 32.",
68 "BriefDescription": "Loads with latency value being above 4",
76 "PublicDescription": "Loads with latency value being above 4.",
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMParallelDSP.cpp52 cl::desc("Limit the number of loads analysed"));
70 SmallVector<LoadInst*, 2> VecLd; // Container for loads to widen.
197 SmallVector<LoadInst*, 4> Loads; member in __anon176cfc890111::WidenedLoad
202 append_range(Loads, Lds); in WidenedLoad()
226 LoadInst* CreateWideLoad(MemInstList &Loads, IntegerType *LoadTy);
307 LLVM_DEBUG(dbgs() << "Loads are sequential and valid:\n"; in AreSequentialLoads()
337 /// Iterate through the block and record base, offset pairs of loads which can
340 SmallVector<LoadInst*, 8> Loads; in RecordMemoryOps() local
345 // Collect loads and instruction that may write to memory. For now we only in RecordMemoryOps()
346 // record loads which are simple, sign-extended and have a single user. in RecordMemoryOps()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DExpandMemCmp.cpp9 // This pass tries to expand memcmp() calls into optimally-sized loads and
51 "memcmp-num-loads-per-block", cl::Hidden, cl::init(1),
52 cl::desc("The number of loads per basic block for inline expansion of "
56 "max-loads-per-memcmp", cl::Hidden,
57 cl::desc("Set maximum number of loads used in expanded memcmp"));
60 "max-loads-per-memcmp-opt-size", cl::Hidden,
61 cl::desc("Set maximum number of loads used in expanded memcmp for -Os/Oz"));
91 // comparing 33 bytes on X86+sse can be done with 2x16-byte loads and
161 // Do not expand if the total number of loads is larger than what the in computeGreedyLoadSequence()
190 // We try to do as many non-overlapping loads as possible starting from the in computeOverlappingLoadSequence()
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/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A Dmemory.json25 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
35 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
41 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
51 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
57 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
67 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
73 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
83 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
89 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
99 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
[all …]
/freebsd/share/man/man9/
H A Datomic.992 ordinary loads and stores of integers in cache-coherent memory are
95 However, such loads and stores may be elided from the program by
188 Conversely, acquire semantics do not require that prior loads or stores have
198 completed before any subsequent loads and stores are performed, use
201 When an atomic operation has release semantics, all prior loads or stores
212 For example, to add two long integers ensuring that all prior loads and
221 subsequent loads by the acquiring thread.
233 will prevent any loads or stores from moving outside of the critical
235 However, they will not prevent the compiler or processor from moving loads
244 When a fence has acquire semantics, all prior loads (by program order) must
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/
H A Dmemory.json94 "BriefDescription": "Loads with latency value being above 128",
103 "PublicDescription": "This event counts loads with latency value being above 128.",
109 "BriefDescription": "Loads with latency value being above 16",
118 "PublicDescription": "This event counts loads with latency value being above 16.",
124 "BriefDescription": "Loads with latency value being above 256",
133 "PublicDescription": "This event counts loads with latency value being above 256.",
139 "BriefDescription": "Loads with latency value being above 32",
148 "PublicDescription": "This event counts loads with latency value being above 32.",
154 "BriefDescription": "Loads with latency value being above 4",
163 "PublicDescription": "This event counts loads with latency value being above four.",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/
H A Dmemory.json12 "BriefDescription": "Loads with latency value being above 128",
20 "PublicDescription": "Loads with latency value being above 128.",
26 "BriefDescription": "Loads with latency value being above 16",
34 "PublicDescription": "Loads with latency value being above 16.",
40 "BriefDescription": "Loads with latency value being above 256",
48 "PublicDescription": "Loads with latency value being above 256.",
54 "BriefDescription": "Loads with latency value being above 32",
62 "PublicDescription": "Loads with latency value being above 32.",
68 "BriefDescription": "Loads with latency value being above 4",
76 "PublicDescription": "Loads with latency value being above 4.",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A Dmemory.json69 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
79 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
85 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
95 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
101 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
111 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
117 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
127 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
133 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
143 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
[all …]
/freebsd/lib/libpmc/
H A Dpmc.westmere.3175 Loads that partially overlap an earlier store
184 Counts number of loads delayed with at-Retirement block code.
186 loads need to be executed at retirement and wait for all senior stores on
192 Cacheable loads delayed with L1D block code
212 .It Li MEM_INST_RETIRED.LOADS
319 Counts number of loads dispatched from the Reservation Station that bypass
328 Counts the number of loads dispatched from the Reservation Station to the
332 Counts all loads dispatched from the Reservation Station.
376 Counts number of loads that hit the L2 cache.
377 L2 loads include both L1D demand misses as well as L1D prefetches.
[all …]
H A Dpmc.corei7.3177 Counts number of loads delayed with at-Retirement block code.
178 The following loads need to be executed at retirement and wait for all
184 Cacheable loads delayed with L1D block code
204 .It Li MEM_INST_RETIRED.LOADS
322 Counts number of loads dispatched from the Reservation Station that bypass
331 Counts the number of loads dispatched from the Reservation Station to the
335 Counts all loads dispatched from the Reservation Station.
377 Counts number of loads that hit the L2 cache.
378 L2 loads include both L1D demand misses as well as L1D prefetches.
379 L2 loads can be rejected for various reasons.
[all …]
H A Dpmc.haswellxeon.3113 L2 prefetcher to L3 for loads.
205 Loads blocked by overlapping with store buffer that
207 .It Li MISALIGN_MEM_REF.LOADS
646 Cycles with pending L2 miss loads.
650 Cycles with pending memory loads.
654 Number of loads missed L2.
657 Cycles with pending L1 cache miss loads.
688 Number of DTLB page walker loads that hit in the
692 Number of ITLB page walker loads that hit in the
696 Number of DTLB page walker loads that hit in the L2.
[all …]
H A Dpmc.haswell.3112 L2 prefetcher to L3 for loads.
204 Loads blocked by overlapping with store buffer that
206 .It Li MISALIGN_MEM_REF.LOADS
633 Cycles with pending L2 miss loads.
637 Cycles with pending memory loads.
641 Number of loads missed L2.
644 Cycles with pending L1 cache miss loads.
676 Number of DTLB page walker loads that hit in the
680 Number of ITLB page walker loads that hit in the
684 Number of DTLB page walker loads that hit in the L2.
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DLSUnit.h210 /// True if loads don't alias with stores.
212 /// By default, the LS unit assumes that loads and stores don't alias with
213 /// eachother. If this field is set to false, then loads are always assumed to
319 // Loads are tracked by the LDQ (load queue) from dispatch until completion.
322 // dispatch. Loads leave the LDQ at retirement stage.
343 /// stores nor barriers in between the two loads.
349 /// This class optimistically assumes that loads don't alias store operations.
350 /// Under this assumption, younger loads are always allowed to pass older
353 /// identify aliasing loads and stores.
355 /// To enforce aliasing between loads and stores, flag `AssumeNoAlias` must be
[all …]
/freebsd/share/man/man4/
H A Dmod_cc.4139 This directive loads the NewReno congestion control algorithm.
141 This directive loads the CUBIC congestion control algorithm and is included
144 This directive loads the vegas congestion control algorithm, note that
147 This directive loads the cdg congestion control algorithm, note that
150 This directive loads the dctcp congestion control algorithm.
152 This directive loads the hd congestion control algorithm, note that
155 This directive loads the chd congestion control algorithm, note that
158 This directive loads the htcp congestion control algorithm.
/freebsd/crypto/openssl/doc/man3/
H A DSSL_CTX_use_certificate.pod57 The SSL_CTX_* class of functions loads the certificates and keys into the
62 The SSL_* class of functions only loads certificates and keys into a
66 SSL_CTX_use_certificate() loads the certificate B<x> into B<ctx>,
67 SSL_use_certificate() loads B<x> into B<ssl>. The rest of the
73 SSL_CTX_use_certificate_ASN1() loads the ASN1 encoded certificate from
75 SSL_use_certificate_ASN1() loads the ASN1 encoded certificate into B<ssl>.
77 SSL_CTX_use_certificate_file() loads the first certificate stored in B<file>
80 SSL_use_certificate_file() loads the certificate from B<file> into B<ssl>.
84 SSL_CTX_use_certificate_chain_file() loads a certificate chain from
89 similar except it loads th
[all...]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A Dmemory.json27 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
37 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
43 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
53 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
59 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
69 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
75 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
85 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
91 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
101 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A Dmemory.json105 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
115 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
121 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
131 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
137 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
147 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
153 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
163 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
169 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
179 …"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to compl…
[all …]
/freebsd/secure/lib/libcrypto/man/man3/
H A DSSL_CTX_use_certificate.3192 The SSL_CTX_* class of functions loads the certificates and keys into the
197 The SSL_* class of functions only loads certificates and keys into a
201 \&\fBSSL_CTX_use_certificate()\fR loads the certificate \fBx\fR into \fBctx\fR,
202 \&\fBSSL_use_certificate()\fR loads \fBx\fR into \fBssl\fR. The rest of the
208 \&\fBSSL_CTX_use_certificate_ASN1()\fR loads the \s-1ASN1\s0 encoded certificate from
210 \&\fBSSL_use_certificate_ASN1()\fR loads the \s-1ASN1\s0 encoded certificate into \fBssl\fR.
212 \&\fBSSL_CTX_use_certificate_file()\fR loads the first certificate stored in \fBfile\fR
215 \&\fBSSL_use_certificate_file()\fR loads the certificate from \fBfile\fR into \fBssl\fR.
219 \&\fBSSL_CTX_use_certificate_chain_file()\fR loads a certificate chain from
224 similar except it loads the certificate chain into \fBssl\fR.
/freebsd/lib/libpmc/pmu-events/arch/x86/knightslanding/
H A Dfloating-point.json12 …AVX, AVX2, AVX-512 micro-ops (both floating point and integer) except for loads (memory-to-registe…
16 … AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-registe…
21 …ecifically, it counts scalar SSE, AVX, AVX2, AVX-512 micro-ops except for loads (memory-to-registe…
25 … AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-registe…
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/
H A Dmemory.json94 "BriefDescription": "Randomly selected loads with latency value being above 128",
104 "PublicDescription": "Counts randomly selected loads with latency value being above 128.",
110 "BriefDescription": "Randomly selected loads with latency value being above 16",
120 "PublicDescription": "Counts randomly selected loads with latency value being above 16.",
126 "BriefDescription": "Randomly selected loads with latency value being above 256",
136 "PublicDescription": "Counts randomly selected loads with latency value being above 256.",
142 "BriefDescription": "Randomly selected loads with latency value being above 32",
152 "PublicDescription": "Counts randomly selected loads with latency value being above 32.",
158 "BriefDescription": "Randomly selected loads with latency value being above 4",
168 "PublicDescription": "Counts randomly selected loads with latency value being above four.",
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A Dmemory.json158 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
174 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
190 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
206 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
222 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
238 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
254 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
270 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple…
/freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/
H A Dmemory.json13 "BriefDescription": "Loads with latency value being above 128.",
26 "BriefDescription": "Loads with latency value being above 16.",
39 "BriefDescription": "Loads with latency value being above 256.",
52 "BriefDescription": "Loads with latency value being above 32.",
65 "BriefDescription": "Loads with latency value being above 4 .",
78 "BriefDescription": "Loads with latency value being above 512.",
91 "BriefDescription": "Loads with latency value being above 64.",
104 "BriefDescription": "Loads with latency value being above 8.",
133 "EventName": "MISALIGN_MEM_REF.LOADS",

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