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/linux/Documentation/devicetree/bindings/sound/
H A Dmax98373.txt7 - compatible : "maxim,max98373"
9 - reg : the I2C address of the device.
13 - maxim,vmon-slot-no : slot number used to send voltage information
14 or in inteleave mode this will be used as
15 interleave slot.
18 - maxim,imon-slot-no : slot number used to send current information
21 - maxim,spkfb-slot-no : slot number used to send speaker feedback information
24 - maxim,interleave-mode : For cases where a single combined channel
29 Boolean, define to enable the interleave mode, Default : false
36 maxim,vmon-slot-no = <0>;
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H A Dmaxim,max98925.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ryan Lee <ryans.lee@maximintegrated.com>
15 - maxim,max98925
16 - maxim,max98926
17 - maxim,max98927
22 reset-gpios:
25 '#sound-dai-cells':
28 vmon-slot-no:
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H A Dadi,max98388.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ryan Lee <ryans.lee@analog.com>
13 The MAX98388 is a mono Class-D speaker amplifier with I/V feedback.
18 - $ref: dai-common.yaml#
23 - adi,max98388
28 '#sound-dai-cells':
31 adi,vmon-slot-no:
38 adi,imon-slot-no:
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/linux/Documentation/admin-guide/mm/
H A Dnuma_memory_policy.rst10 supported platforms with Non-Uniform Memory Access architectures since 2.4.?.
16 (``Documentation/admin-guide/cgroup-v1/cpusets.rst``)
19 programming interface that a NUMA-aware application can take advantage of. When
28 ------------------------
39 up, the system default policy will be set to interleave
41 not to overload the initial boot node with boot-time
45 this is an optional, per-task policy. When defined for a
61 In a multi-threaded task, task policies apply only to the thread
98 mapping-- i.e., at Copy-On-Write.
101 virtual address space--a.k.a. threads--independent of when
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/linux/Documentation/driver-api/cxl/linux/example-configurations/
H A Dmulti-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Level Interleave
6 This cxl-cli configuration dump shows the following host configuration:
11 * The CXL root is configured to interleave across the two host bridges.
14 This output is generated by :code:`cxl list -v` and describes the relationships
49 to the platform's memory controller - which routes memory requests to it.
109 "mode":"ram"
135 "mode":"ram"
144 which has the same interleave configuration as :code:`region0` (shown later).
147 which has the same interleave configuration as :code:`region0` (shown later).
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H A Dintra-hb-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intra-Host-Bridge Interleave
6 This cxl-cli configuration dump shows the following host configuration:
11 * The Host bridge decoder is programmed to interleave across the expanders.
13 This output is generated by :code:`cxl list -v` and describes the relationships
48 to the platform's memory controller - which routes memory requests to it.
108 "mode":"ram"
134 "mode":"ram"
143 which has the same interleave configuration memory region they belong to
178 targets: :code:`dport1` and :code:`dport3` - which are attached to
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H A Dhb-interleave.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Inter-Host-Bridge Interleave
6 This cxl-cli configuration dump shows the following host configuration:
11 * The CXL root is configured to interleave across the two host bridges.
13 This output is generated by :code:`cxl list -v` and describes the relationships
48 to the platform's memory controller - which routes memory requests to it.
108 "mode":"ram"
117 which has the same interleave configuration as :code:`region0` (shown later).
144 target is :code:`dport1` - which is attached to :code:`endpoint5`.
186 "mode":"ram"
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/linux/Documentation/ABI/testing/
H A Dsysfs-kernel-mm-mempolicy-weighted-interleave3 Contact: Linux memory management mailing list <linux-mm@kvack.org>
4 Description: Configuration Interface for the Weighted Interleave policy
8 Contact: Linux memory management mailing list <linux-mm@kvack.org>
11 The interleave weight for a memory node (N). These weights are
24 empty string, ...) will return -EINVAL.
27 switch the system to manual mode as well.
31 Contact: Linux memory management mailing list <linux-mm@kvack.org>
32 Description: Auto-weighting configuration interface
34 Configuration mode for weighted interleave. 'true' indicates
35 that the system is in auto mode, and a 'false' indicates that
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H A Dsysfs-bus-cxl4 Contact: linux-cxl@vger.kernel.org
14 Contact: linux-cxl@vger.kernel.org
17 Memory Device Output Payload in the CXL-2.0
24 Contact: linux-cxl@vger.kernel.org
34 Contact: linux-cxl@vger.kernel.org
42 Contact: linux-cxl@vger.kernel.org
46 Payload in the CXL-2.0 specification.
52 Contact: linux-cxl@vger.kernel.org
58 class-ids can be compared against a similar "qos_class"
60 that the endpoints map their local memory-class to a
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/linux/Documentation/driver-api/cxl/linux/
H A Dcxl-driver.rst1 .. SPDX-License-Identifier: GPL-2.0
12 The :code:`cxl-cli` library, maintained as part of the NDTCL project, may
19 * cxl_core - fundamental init interface and core object creation
20 * cxl_port - initializes root and provides port enumeration interface.
21 * cxl_acpi - initializes root decoders and interacts with ACPI data.
22 * cxl_p/mem - initializes memory devices
23 * cxl_pci - uses cxl_port to enumerate the actual fabric hierarchy.
27 Here is an example from a single-socket system with 4 host bridges. Two host
38 .. kernel-render:: DOT
39 :alt: Digraph of CXL fabric describing host-bridge interleaving
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/linux/drivers/mtd/chips/
H A Dcfi_util.c1 // SPDX-License-Identifier: GPL-2.0
43 unsigned interleave = cfi_interleave(cfi); in cfi_build_cmd_addr() local
44 unsigned type = cfi->device_type; in cfi_build_cmd_addr()
47 addr = (cmd_ofs * type) * interleave; in cfi_build_cmd_addr()
49 /* Modify the unlock address if we are in compatibility mode. in cfi_build_cmd_addr()
54 if (((type * interleave) > bankwidth) && ((cmd_ofs & 0xff) == 0xaa)) in cfi_build_cmd_addr()
55 addr |= (type >> 1)*interleave; in cfi_build_cmd_addr()
62 * Transforms the CFI command for the given geometry (bus width & interleave).
88 /* First, determine what the bit-pattern should be for a single in cfi_build_cmd()
89 device, according to chip mode and endianness... */ in cfi_build_cmd()
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H A Dcfi_cmdset_0020.c1 // SPDX-License-Identifier: GPL-2.0
9 * - completely revamped method functions so they are aware and
10 * independent of the flash geometry (buswidth, interleave, etc.)
11 * - scalability vs code size is completely set at compile-time
13 * - optimized write buffer method
14 * 06/21/2002 Joern Engel <joern@wh.fh-wedel.de> and others
15 * - modified Intel Command Set 0x0001 to support ST Advanced Architecture
17 * - added a writev function
18 * 07/13/2005 Joern Engel <joern@wh.fh-wedel.de>
19 * - Plugged memory leak in cfi_staa_writev().
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H A Dcfi_cmdset_0001.c1 // SPDX-License-Identifier: GPL-2.0
10 * - completely revamped method functions so they are aware and
11 * independent of the flash geometry (buswidth, interleave, etc.)
12 * - scalability vs code size is completely set at compile-time
14 * - optimized write buffer method
16 * - reworked lock/unlock/erase support for var size flash
18 * - auto unlock sectors on resume for auto locking flash on power up
42 // debugging, turns off buffer write mode if set to 1
99 static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
100 static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
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/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
41 /**** Echo24: Gina24, Layla24, Mona, Mia, Mia-midi ****/
81 * These are the offsets for the memory-mapped DSP registers; the DSP base
108 * DSP commands sent via slave mode; these are sent to the DSP by write_dsp()
133 #define MIDI_IN_SKIP_DATA (-1)
136 /*----------------------------------------------------------------------------
145 the future), Layla24 also has "continuous sample rate mode". In this mode,
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H A Dechoaudio_dsp.c3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
40 command and then write a non-zero value to the Handshake field in the
50 if (chip->comm_page->handshake) { in wait_handshake()
56 dev_err(chip->card->dev, "wait_handshake(): Timeout waiting for DSP\n"); in wait_handshake()
57 return -EBUSY; in wait_handshake()
83 dev_err(chip->card->dev, "timeout on send_vector\n"); in send_vector()
84 return -EBUSY; in send_vector()
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/linux/drivers/ras/amd/atl/
H A Ddenormalize.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 case DF2: return FIELD_GET(DF2_DST_FABRIC_ID, ctx->map.limit); in get_dst_fabric_id()
23 case DF3: return FIELD_GET(DF3_DST_FABRIC_ID, ctx->map.limit); in get_dst_fabric_id()
24 case DF3p5: return FIELD_GET(DF3p5_DST_FABRIC_ID, ctx->map.limit); in get_dst_fabric_id()
25 case DF4: return FIELD_GET(DF4_DST_FABRIC_ID, ctx->map.ctl); in get_dst_fabric_id()
26 case DF4p5: return FIELD_GET(DF4p5_DST_FABRIC_ID, ctx->map.ctl); in get_dst_fabric_id()
38 * # of interleave bits (n): 3
39 * starting interleave bit (p): 8
41 * expanded address bits: [20+n : n+p][n+p-1 : p][p-1 : 0]
46 return expand_bits(ctx->map.intlv_bit_pos, in make_space_for_coh_st_id_at_intlv_bit()
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H A Dinternal.h1 /* SPDX-License-Identifier: GPL-2.0 */
109 * interleave modes with a number of channels divisible by 3 or the
110 * value will be 5 for interleave modes with a number of channels
111 * divisible by 5. Power-of-two interleave modes are handled
119 * address. The other bits depend on the interleave bit position which
120 * will be bit 10 for 1K interleave stripe cases and bit 11 for 2K
121 * interleave stripe cases.
148 * These masks operate on the 16-bit Coherent Station IDs,
157 * Least-significant bit of Node ID portion of the
158 * system-wide Coherent Station Fabric ID.
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/linux/drivers/cxl/core/
H A Dregion.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/memory-tiers.h>
30 * 1. Interleave granularity
31 * 2. Interleave size
44 .attr = { .name = __stringify(_name), .mode = 0444 }, \
58 if (cxlr->coord[level].attrib == 0) \
59 return -ENOENT; \
61 return sysfs_emit(buf, "%u\n", cxlr->coord[level].attrib); \
102 cxlr->coord[level].read_latency == 0) \
106 cxlr->coord[level].write_latency == 0) \
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/linux/mm/
H A Dmempolicy.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * interleave Allocate memory interleaved over a set of nodes,
22 * weighted interleave
24 * a set of weights (per-node), with normal fallback if it
25 * fails. Otherwise operates the same as interleave.
26 * Example: nodeset(0,1) & weights (2,1) - 2 pages allocated
124 #define MPOL_MF_WRLOCK (MPOL_MF_INTERNAL << 2) /* Write-lock walked vmas */
134 * run-time system-wide default policy => local allocation
138 .mode = MPOL_LOCAL,
152 * A null weighted_interleave_state is interpreted as having .mode="auto",
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/linux/sound/soc/codecs/
H A Dmax98926.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98926.c -- ALSA SoC MAX98926 driver
4 * Copyright 2013-15 Maxim Integrated Products
48 { 0x1A, 0x04 }, /* DAI Clock Mode 1 */
49 { 0x1B, 0x00 }, /* DAI Clock Mode 2 */
205 static DECLARE_TLV_DB_SCALE(max98926_spk_tlv, -600, 100, 0);
222 (1<<MAX98926_SPK_GAIN_WIDTH)-1, 0,
232 (1<<MAX98926_ALC_TH_WIDTH)-1, 0),
236 (1<<MAX98926_BST_ILIM_SHIFT)-1, 0,
291 regmap_update_bits(max98926->regmap, in max98926_set_sense_data()
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/linux/drivers/edac/
H A Dsb_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Intel Sandy Bridge -EN/-EP/-EX Memory Controller kernel module
24 #include <asm/intel-family.h>
70 0x60, 0x68, 0x70, 0x78, 0x80, /* 0-4 */
71 0x88, 0x90, 0x98, 0xa0, 0xa8, /* 5-9 */
72 0xb0, 0xb8, 0xc0, 0xc8, 0xd0, /* 10-14 */
73 0xd8, 0xe0, 0xe8, 0xf0, 0xf8, /* 15-19 */
74 0x100, 0x108, 0x110, 0x118, /* 20-23 */
107 0x64, 0x6c, 0x74, 0x7c, 0x84, /* 0-4 */
108 0x8c, 0x94, 0x9c, 0xa4, 0xac, /* 5-9 */
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/linux/Documentation/translations/zh_CN/filesystems/
H A Dtmpfs.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_CN.rst
19 页面swap出去。它具有最大限制，可以通过“mount -o remount ...”调整。
50 4) 也许还有更多我不知道的地方:-)
73 可以通过“mount -o remount ...”调整
80 mpol=interleave 倾向于依次从每个节点分配
81 mpol=interleave:NodeList 依次从每个节点分配
85 NodeList格式是以逗号分隔的十进制数字表示大小和范围，最大和最小范围是用-
86 分隔符的十进制数来表示。例如，mpol=bind0-3,5,7,9-15
90 由调用任务的cpuset[请参见Documentation/admin-guide/cgroup-v1/cpusets.rst]
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/linux/Documentation/translations/zh_TW/filesystems/
H A Dtmpfs.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_TW.rst
19 頁面swap出去。它具有最大限制，可以通過“mount -o remount ...”調整。
50 4) 也許還有更多我不知道的地方:-)
73 可以通過“mount -o remount ...”調整
80 mpol=interleave 傾向於依次從每個節點分配
81 mpol=interleave:NodeList 依次從每個節點分配
85 NodeList格式是以逗號分隔的十進制數字表示大小和範圍，最大和最小範圍是用-
86 分隔符的十進制數來表示。例如，mpol=bind0-3,5,7,9-15
90 由調用任務的cpuset[請參見Documentation/admin-guide/cgroup-v1/cpusets.rst]
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/linux/Documentation/fb/
H A Darkfb.rst2 arkfb - fbdev driver for ARK Logic chips
12 - only BIOS initialized VGA devices supported
13 - probably not working on big endian
20 * 8 bpp pseudocolor mode (with 18bit palette)
22 * 24 bpp truecolor mode (RGB 888)
23 * 32 bpp truecolor mode (RGB 888)
24 * text mode (activated by bpp = 0)
25 * doublescan mode variant (not available in text mode)
29 Text mode is supported even in higher resolutions, but there is limitation to
31 hardware). This limitation is not enforced by driver. Text mode supports 8bit
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H A Dvt8623fb.rst2 vt8623fb - fbdev driver for graphics core in VIA VT8623 chipset
12 I tested vt8623fb on VIA EPIA ML-6000
19 * 8 bpp pseudocolor mode (with 18bit palette)
20 * 16 bpp truecolor mode (RGB 565)
21 * 32 bpp truecolor mode (RGB 888)
22 * text mode (activated by bpp = 0)
23 * doublescan mode variant (not available in text mode)
28 Text mode is supported even in higher resolutions, but there is limitation to
30 driver. Text mode supports 8bit wide fonts only (hardware limitation) and
33 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
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