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/illumos-gate/usr/src/lib/libprtdiag_psr/sparc/opl/common/
H A Dopl.c116 * Check prom node for a class-code. If it exists and it's not a bridge device
132 /* Look for a class-code property. Skip, if it's a bridge */ in walk_tree_for_pci_devices()
133 ccode = -1; in walk_tree_for_pci_devices()
134 val = get_prop_val(find_prop(node, "class-code")); in walk_tree_for_pci_devices()
138 if ((ccode != -1) && (ccode < 0x60000 || ccode > 0x6ffff)) { in walk_tree_for_pci_devices()
154 walk_tree_for_pci_devices(node->child, board_number); in walk_tree_for_pci_devices()
155 walk_tree_for_pci_devices(node->sibling, board_number); in walk_tree_for_pci_devices()
169 * for "prtdiag -v" in display_io_devices()
179 bnode = tree->bd_list; in display_io_devices()
181 walk_tree_for_pci_devices(bnode->nodes, in display_io_devices()
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/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dmem_addr.c71 lc = -1; in channel_in_interleave()
79 if (lc == -1) { in channel_in_interleave()
87 if (lc == -1) { in channel_in_interleave()
92 if (node && tad[node][rule].mode == 2) in channel_in_interleave()
119 int node = -1; in address_to_node()
127 switch (sad[i].mode) { in address_to_node()
139 return (-1); in address_to_node()
143 *interleave_p = sad[i].interleave; in address_to_node()
149 node = -1; in address_to_node()
189 int channel = -1; in address_to_channel()
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H A Dintel_nhm.h50 #define SOCKET_BUS(cpu) (MAX_BUS_NUMBER - (cpu))
139 #define DIVBY3(reg) (((reg) >> 27) & 1) /* 3 or 6 way interleave */
149 /* 24-bit mask for TTMAD_CR_SAG_CH*.OFFSET */
151 /* 16-bit mask for lower bits not covered by CREG value (SA[15:0]) */
153 #define CACHELINE_ADDR_MASK 0x3fULL /* 6-bit mask */
173 #define RIR_OFFSET_ADDR_MASK 0xfffffffULL /* 28-bit mask */
175 #define RIR_INTLV_PGOPEN_MASK 0xfffULL /* 12-bit mask */
177 #define RIR_INTLV_PGCLS_MASK 0x3fULL /* 6-bit mask */
228 * from SAD_DRAM_RULE*.MODE
261 char mode; member
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H A Ddimm_topo.c65 (void) snprintf(buf, sizeof (buf), "dimm-rank-base-%d", num); in inhm_vrank()
67 (void) snprintf(buf, sizeof (buf), "dimm-rank-limit-%d", num); in inhm_vrank()
70 (void) snprintf(buf, sizeof (buf), "dimm-socket-interleave-%d", in inhm_vrank()
74 "dimm-socket-interleave-way-%d", num); in inhm_vrank()
78 (void) snprintf(buf, sizeof (buf), "dimm-channel-interleave-%d", in inhm_vrank()
82 "dimm-channel-interleave-way-%d", num); in inhm_vrank()
86 (void) snprintf(buf, sizeof (buf), "dimm-rank-interleave-%d", in inhm_vrank()
90 "dimm-rank-interleave-way-%d", num); in inhm_vrank()
109 newrank = kmem_zalloc(sizeof (nvlist_t *) * nhm_dimm->nranks, KM_SLEEP); in inhm_rank()
110 for (i = 0; i < nhm_dimm->nranks; i++) { in inhm_rank()
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/illumos-gate/usr/src/common/mc/mc-amd/
H A Dmcamd_rowcol_tbl.c33 * =========== Chip-Select Bank Address Mode Encodings =======================
41 /* Managing bank address mode tables */
60 int mt_width; /* MC mode (64 or 128) */
91 int swzt_width; /* MC mode (64 or 128) */
115 * DRAM Address Mapping in Interleaving Mode
117 * Chip-select interleave is performed by addressing across the columns
118 * of the first row of internal bank-select 0 on a chip-select, then the
119 * next row on internal bank-select 1, then 2 then 3; instead of then
120 * moving on to the next row of this chip-select we then rotate across
121 * other chip-selects in the interleave. The row/column/bank mappings
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H A Dmcamd_rowcol.c42 mcamd_prop_t csbnkmap_reg; /* chip-select bank map */
43 mcamd_prop_t intlven; /* Node-intlv mask */
44 mcamd_prop_t intlvsel; /* Node-intlv selection for this node */
46 mcamd_prop_t bnkswzl; /* bank-swizzle mode */
52 mcamd_prop_t num; /* chip-select number */
53 mcamd_prop_t base; /* chip-select base address */
54 mcamd_prop_t mask; /* chip-select mask */
64 mc, MCAMD_PROP_NUM, &pp->num, in getmcprops()
65 mc, MCAMD_PROP_REV, &pp->rev, in getmcprops()
66 mc, MCAMD_PROP_ACCESS_WIDTH, &pp->width, in getmcprops()
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/illumos-gate/usr/src/uts/intel/io/intel_nb5000/
H A Dintel_nbdrv.c60 rank_to_base(uint8_t branch, uint8_t rank, uint8_t *interleave, uint64_t *limit, in rank_to_base() argument
78 il = nb_ranks[branch][i].interleave; in rank_to_base()
99 *interleave = il; in rank_to_base()
115 newrank = kmem_zalloc(sizeof (nvlist_t *) * nb_dimm->nranks, KM_SLEEP); in inb_rank()
116 for (i = 0; i < nb_dimm->nranks; i++) { in inb_rank()
119 uint8_t interleave; in inb_rank() local
126 nb_dimm->start_rank + i, &interleave, in inb_rank()
130 (void) nvlist_add_uint64(newrank[i], "dimm-rank-base", in inb_rank()
133 (void) nvlist_add_uint64(newrank[i], "dimm-hole", in inb_rank()
135 (void) nvlist_add_uint64(newrank[i], "dimm-hole-size", in inb_rank()
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H A Dnb5000_init.c209 if (--wait == 0) in read_spd_eeprom()
210 return (-1); in read_spd_eeprom()
220 if (--wait == 0) { in read_spd_eeprom()
230 if (--wait == 0) in read_spd_eeprom()
231 return (-1); in read_spd_eeprom()
235 if (--retry == 0) in read_spd_eeprom()
236 return (-1); in read_spd_eeprom()
274 if ((mc & MC_MIRROR) != 0) /* mirror mode */ in nb_scrubber_enable()
297 dp->manufacture_id = read_spd_eeprom(channel, dimm, 117) | in fbd_eeprom()
299 dp->manufacture_location = read_spd_eeprom(channel, dimm, 119); in fbd_eeprom()
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/illumos-gate/usr/src/test/os-tests/tests/imc/
H A Dimc_test_sad.c22 * o SAD rules with different interleave options
23 * - XOR (SNB->BRD)
24 * - 10t8, 14t12, 32t30 (SKX)
25 * o SAD rules with a7mode (IVB->BRD)
26 * - And XOR
447 * This is similar to imc_sad_2s_basic; however, it enables the XOR mode.
1003 * This is similar to imc_sad_2s_basic; however, it enables the XOR mode.
1146 * interleave across different regions of memory.
2229 .itc_desc = "2 Socket SAD 8-6 Interleave (1)",
2241 .itc_desc = "2 Socket SAD 8-6 Interleave (2)",
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/illumos-gate/usr/src/uts/intel/io/amdzen/
H A Dzen_umc.c21 * a wide range of AMD CPUs and APUs ranging from Zen 1 - Zen 4.
31 * -------------------
33 * -------------------
68 * +-----------+
70 * +-----------+
72 * +-------------------------------+
74 * +--------------+ +--------------+ One instance of the
76 * +--------------+ +--------------+ discovered DF.
79 * ||| +----------------+ +----------------+ Global DRAM
80 * ||+--->| df_dram_rule_t | ... | df_dram_rule_t | rules for the
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/illumos-gate/usr/src/grub/grub-0.97/stage2/
H A Diso9660.h5 * Copyright (C) 1998, 1999 Kousuke Takai <tak@kmc.kyoto-u.ac.jp>
24 * mkisofs-1.11.1/diag/isoinfo.c
25 * mkisofs-1.11.1/iso9660.h
63 typedef int int8_t __attribute__((mode(QI)));
64 typedef unsigned int u_int8_t __attribute__((mode(QI)));
65 typedef int int16_t __attribute__((mode(HI)));
66 typedef unsigned int u_int16_t __attribute__((mode(HI)));
67 typedef int int32_t __attribute__((mode(SI)));
68 typedef unsigned int u_int32_t __attribute__((mode(SI)));
105 iso_8bit_t interleave; member
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/illumos-gate/usr/src/uts/intel/io/imc/
H A Dimc.c25 * - Sandy Bridge
26 * - Ivy Bridge
27 * - Haswell
28 * - Broadwell
29 * - Skylake / Cascade Lake
32 * ---------------
50 * Dual-inline memory module. This refers to a physical stick of volatile
55 * A potential sub-division of a DIMM. A DIMM's memory capacity is divided
79 * INTERLEAVE
87 * device. The following image shows a non-interleaving case.
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/illumos-gate/usr/src/uts/intel/sys/
H A Dmc_amd.h42 * AMD cpu module and the mc-amd driver.
46 * The mc-amd driver exports an nvlist to userland, where the primary
52 * In the initial mc-amd implementation this nvlist was not versioned;
54 * of a "mcamd-nvlist-version member.
60 * -------------------- --------------- ---------------------------------------
61 * mcamd-nvlist-version uint8 Exported nvlist version number
66 * ecc-type string "ChipKill 128/16" or "Normal 64/8"
67 * base-addr uint64 Node base address
68 * lim-addr uint64 Node limit address
69 * node-ilen uint64 0|1|3|7 for 0/2/4/8 way node interleave
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/illumos-gate/usr/src/uts/sun4u/io/
H A Dmc-us3i.c50 #include <sys/mc-us3i.h>
55 * pm-hardware-state value
57 #define NO_SUSPEND_RESUME "no-suspend-resume"
134 "Memory-controller", /* module name */
238 softsp->dip = devi; in mc_attach()
240 if ((softsp->portid = (int)ddi_getprop(DDI_DEV_T_ANY, softsp->dip, in mc_attach()
241 DDI_PROP_DONTPASS, "portid", -1)) == -1) { in mc_attach()
248 instance, softsp->portid, CPU->cpu_id)); in mc_attach()
252 if ((ddi_getlongprop_buf(DDI_DEV_T_ANY, softsp->dip, DDI_PROP_DONTPASS, in mc_attach()
253 "memory-control-register-1", (caddr_t)&(softsp->mcreg1), in mc_attach()
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/illumos-gate/usr/src/common/mc/imc/
H A Dimc_decode.c32 #define BITX(u, h, l) (((u) >> (l)) & ((1LU << ((h) - (l) + 1LU)) - 1LU))
44 #define IMC_DECODE_CONV_MAX 0x00009ffffULL /* 640 KiB - 1 */
85 if (dec->ids_pa >= imc_legacy_ranges[i].ilr_base && in imc_decode_addr_resvd()
86 dec->ids_pa < end) { in imc_decode_addr_resvd()
87 dec->ids_fail = IMC_DECODE_F_LEGACY_RANGE; in imc_decode_addr_resvd()
88 dec->ids_fail_data = i; in imc_decode_addr_resvd()
96 * While we technically have this information on a per-socket basis, we in imc_decode_addr_resvd()
101 sad = &imc->imc_sockets[0].isock_sad; in imc_decode_addr_resvd()
102 if (sad->isad_valid != IMC_SAD_V_VALID) { in imc_decode_addr_resvd()
103 dec->ids_fail = IMC_DECODE_F_BAD_SAD; in imc_decode_addr_resvd()
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/illumos-gate/usr/src/uts/common/sys/scsi/generic/
H A Ddad_mode.h23 * Copyright (c) 1996-1998 by Sun Microsystems, Inc.
35 * Structures and defines for DIRECT ACCESS mode sense/select operations
39 * Direct Access Device mode header device specific byte definitions.
41 * On MODE SELECT operations, the effect of the state of the WP bit is unknown,
42 * else reflects the Write-Protect status of the device.
44 * On MODE SELECT operations, the the DPOFUA bit is reserved and must
45 * be zero, else on MODE SENSE operations it reflects whether or not
53 * Direct Access Device Medium Types (for non direct-access magentic tapes)
73 * Direct Access device Mode Sense/Mode Select Defined pages
91 * Page 0x1 - Error Recovery Parameters
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/illumos-gate/usr/src/cmd/fdformat/
H A Dfdformat.c27 * fdformat program - formats floppy disks, and then adds a label to them
69 #define uppercase(c) ((c) >= 'a' && (c) <= 'z' ? (c) - 'a' + 'A' : (c))
103 static int n_flag = 0; /* format the diskette in NEC-DOS format */
110 static int interleave = 1; /* interleave factor */ variable
129 * ON-private functions from libvolmgt
176 while ((i = getopt(argc, argv, "B:b:dDeEfhHlLmMxqt:UvVZ?")) != -1) { in main()
197 /* format a MS-DOS diskette */ in main()
231 /* interleave factor */ in main()
232 interleave = atol(optarg); in main()
233 if (interleave <= 0) { in main()
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/illumos-gate/usr/src/lib/libprtdiag_psr/sparc/javelin/common/
H A Djavelin.c23 * Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved.
120 if (dev_find_node(root->sibling, name) != NULL) in dev_next_node_sibling()
121 return (root->sibling); in dev_next_node_sibling()
129 * Some of the information obtained is memory interleave factor,
146 char interleave[8]; in display_memoryconf() local
155 bnode = tree->bd_list; in display_memoryconf()
156 memory = dev_find_node(bnode->nodes, "memory"); in display_memoryconf()
157 preg = (uint_t *)(get_prop_val(find_prop(memory, "interleave"))); in display_memoryconf()
160 log_printf("Memory Interleave Factor = %d-way\n\n", interlv, 0); in display_memoryconf()
164 log_printf("---- ----- ------ ---- ------\n", 0); in display_memoryconf()
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/illumos-gate/usr/src/lib/libprtdiag_psr/sparc/tazmo/common/
H A Dtazmo.c23 * Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved.
123 if (dev_find_node(root->sibling, name) != NULL) in dev_next_node_sibling()
124 return (root->sibling); in dev_next_node_sibling()
132 * Some of the information obtained is memory interleave factor,
149 char interleave[8]; in display_memoryconf() local
158 bnode = tree->bd_list; in display_memoryconf()
159 memory = dev_find_node(bnode->nodes, "memory"); in display_memoryconf()
160 preg = (uint_t *)(get_prop_val(find_prop(memory, "interleave"))); in display_memoryconf()
163 log_printf("Memory Interleave Factor = %d-way\n\n", interlv, 0); in display_memoryconf()
167 log_printf("---- ----- ------ ---- ------\n", 0); in display_memoryconf()
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/illumos-gate/usr/src/uts/intel/sys/amdzen/
H A Ddf.h128 * DF::FabricBlockInstanceCount -- Describes the number of instances in the data
139 * DF::FabricBlockInstanceInformation0 -- get basic information about a fabric
226 * DF::FabricBlockInstanceInformation1 -- get basic information about a fabric
238 * DF::FabricBlockInstanceInformation2 -- get basic information about a fabric
248 * DF::FabricBlockInstanceInformation3 -- obtain the basic IDs for a given
261 * DF::DfCapability -- Describes the capabilities that the DF has. Note that one
275 * DF::Skt1CsTargetRemap1 -- The next set of registers provide access to
276 * chip-select remapping. Caution, while these have a documented DF generation
295 * DF::CsTargetRemap0A, DF::CsTargetRemap0B, etc. -- These registers contain the
297 * referring to the same logical set of things, here [0-3] is used for different
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/illumos-gate/usr/src/uts/sun4u/opl/sys/
H A Dopl_hwdesc.h104 * upto 24 domains so domain id can be 0 - 23.
111 * - SB status information (hwd_sb_status_t)
112 * - domain information (hwd_domain_info_t)
113 * - SB information (hwd_sb_info_t).
135 * SP -> Domain Information.
230 char chip_compatible[32]; /* example: "FJSV,SPARC64-VI" */
302 uint8_t cs_pa_mac_table[64]; /* PA <-> MAC address conversion */
313 * Mirroring mode:
315 * 0x00 : not 'memory mirror mode'
316 * 0x01 : 'memory mirror mode'
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/illumos-gate/usr/src/man/man5/
H A Dnsswitch.conf.58 nsswitch.conf \- configuration file for the name service switch
105 …for \fBpasswd\fR and \fBgroup\fR. Implements \fB+\fR and \fB-.\fR See \fBInteraction with +/- synt…
209 case-sensitive, but <action> and <status> names are case-insensitive.
212 The library functions contain compiled-in default entries that are used if the
216 The default criteria for \fBDNS\fR and the \fBNIS\fR server in "DNS-forwarding
217 mode" is [\fBSUCCESS\fR=return \fBNOTFOUND\fR=continue \fBUNAVAIL\fR=continue
234 obtains the system-wide source lookup policy for \fBhosts\fR, \fBipnodes\fR,
236 and uses the switch entries only if the \fBnetconfig\fR entries have a \fB-\fR
240 .SS "Interaction with server in DNS-forwarding Mode"
242 The \fBNIS\fR (\fBYP\fR) server can be run in DNS-forwarding mode, where it
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/illumos-gate/usr/src/uts/common/sys/
H A Dfdc.h46 * +---------+-----+
48 * +---------+-----+
85 * Mini- and Micro- Diskettes Attributes Structure
89 ushort_t fda_intrlv; /* interleave factor */
103 * Per floppy-drive / diskette state structure
121 * Open types BLK, MNT, CHR, SWP assumed to be values 0-3.
123 ulong_t d_regopen[OTYPCNT - 1];
138 * If -1, then it was set via an ioctl. Note that a close
146 uchar_t d_motor; /* motor-on bit */
154 enum dkio_state d_media_state; /* up-to-date media state */
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/illumos-gate/usr/src/cmd/acpi/common/
H A Ddmtbinfo2.c3 * Module Name: dmtbinfo2 - Table info for non-AML tables
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
157 /* This module used for application-level code only */
165 * - Add the C table definition to the actbl1.h or actbl2.h header.
166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.
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/illumos-gate/usr/src/cmd/format/
H A Dctlr_scsi.c122 SCMD_MODE_SELECT, "mode select",
123 SCMD_MODE_SENSE, "mode sense",
131 * Strings for printing mode sense page control values
141 * Strings for printing the mode select options
154 * READ DEFECT DATA commands is optional as per SCSI-2 spec.
232 rc = -1; in scsi_rdwr()
238 rc = -1; in scsi_rdwr()
243 secnt -= nsectors; in scsi_rdwr()
299 * Determine if the target appears to be SCSI-2 in scsi_format()
300 * compliant. We handle mode sense/mode selects in scsi_format()
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