42 	mcamd_prop_t csbnkmap_reg;	/* chip-select bank map */
43 	mcamd_prop_t intlven;		/* Node-intlv mask */
44 	mcamd_prop_t intlvsel;		/* Node-intlv selection for this node */
46 	mcamd_prop_t bnkswzl;		/* bank-swizzle mode */
52 	mcamd_prop_t num;		/* chip-select number */
53 	mcamd_prop_t base;		/* chip-select base address */
54 	mcamd_prop_t mask;		/* chip-select mask */
64 	    mc, MCAMD_PROP_NUM, &pp->num,  in getmcprops()
65 	    mc, MCAMD_PROP_REV, &pp->rev,  in getmcprops()
66 	    mc, MCAMD_PROP_ACCESS_WIDTH, &pp->width,  in getmcprops()
67 	    mc, MCAMD_PROP_BASE_ADDR, &pp->base,  in getmcprops()
68 	    mc, MCAMD_PROP_LIM_ADDR, &pp->lim,  in getmcprops()
69 	    mc, MCAMD_PROP_CSBANKMAPREG, &pp->csbnkmap_reg,  in getmcprops()
70 	    mc, MCAMD_PROP_ILEN, &pp->intlven,  in getmcprops()
71 	    mc, MCAMD_PROP_ILSEL, &pp->intlvsel,  in getmcprops()
72 	    mc, MCAMD_PROP_CSINTLVFCTR, &pp->csintlvfctr,  in getmcprops()
73 	    mc, MCAMD_PROP_BANKSWZL, &pp->bnkswzl,  in getmcprops()
74 	    mc, MCAMD_PROP_SPARECS, &pp->sparecs,  in getmcprops()
75 	    mc, MCAMD_PROP_BADCS, &pp->badcs,  in getmcprops()
90 	    cs, MCAMD_PROP_NUM, &csp->num,  in getcsprops()
91 	    cs, MCAMD_PROP_BASE_ADDR, &csp->base,  in getcsprops()
92 	    cs, MCAMD_PROP_MASK, &csp->mask,  in getcsprops()
93 	    cs, MCAMD_PROP_TESTFAIL, &csp->testfail,  in getcsprops()
94 	    cs, MCAMD_PROP_DIMMRANK, &csp->dimmrank,  in getcsprops()
110 	uint_t rev = (uint_t)mcpp->rev;  in gettbls()
111 	int width = (int)mcpp->width;  in gettbls()
114 		mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "%s: no bank address mode "  in gettbls()
133 		if (mcpp->csintlvfctr > 1) {  in gettbls()
135 			    mcpp->csintlvfctr, csid);  in gettbls()
136 			if (csid->csi_factor == 0) {  in gettbls()
138 				    "could not work out cs interleave "  in gettbls()
142 				    (int)mcpp->csintlvfctr);  in gettbls()
146 			csid->csi_factor = 0;  in gettbls()
158 	mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "%s: 0x%llx | 0x%llx --> 0x%llx",  in iaddr_add()
175 	int nbits = bamp->bam_nrows;  in iaddr_to_row()
179 		ibitno = rcbm->rcb_rowbit[abitno];  in iaddr_to_row()
188 	mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "iaddr_to_row: iaddr 0x%llx --> "  in iaddr_to_row()
201 	int nbits = bamp->bam_nrows;  in row_to_iaddr()
206 		ibitno = rcbm->rcb_rowbit[abitno];  in row_to_iaddr()
223 	int nbits = bamp->bam_ncols;  in iaddr_to_col()
228 	if (bamp->bam_ambig)  in iaddr_to_col()
229 		nbits--;  in iaddr_to_col()
235 		ibitno = rcbm->rcb_colbit[abitno + bias];  in iaddr_to_col()
241 	mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "iaddr_to_col: iaddr 0x%llx --> "  in iaddr_to_col()
254 	int nbits = bamp->bam_ncols;  in col_to_iaddr()
259 	if (bamp->bam_ambig)  in col_to_iaddr()
260 		nbits--;  in col_to_iaddr()
269 		ibitno = rcbm->rcb_colbit[abitno + bias];  in col_to_iaddr()
286 	for (abitno = 0; abitno < rcbm->rcb_nbankbits; abitno++) {  in iaddr_to_bank()
293 		ibitno = rcbm->rcb_bankbit[abitno];  in iaddr_to_bank()
302 				ibitno = swzlp->bswz_rowbits[abitno][i];  in iaddr_to_bank()
311 	mcamd_dprintf(hdl, MCAMD_DBG_FLOW, "iaddr_to_bank: iaddr 0x%llx --> "  in iaddr_to_bank()
319  * row bits repopulated.  That's because in bank swizzle mode
321  * together - two of which come from the row address and the third we
333 	for (abitno = 0; abitno < rcbm->rcb_nbankbits; abitno++) {  in bank_to_iaddr()
337 				pibitno = swzlp->bswz_rowbits[abitno][i];  in bank_to_iaddr()
342 			SETBIT(iaddr, rcbm->rcb_bankbit[abitno]);  in bank_to_iaddr()
358 	    mcpp->bnkswzl ? &swzlp : NULL, &csi,  in iaddr_to_rcb()
360 		return (-1);	/* errno already set */  in iaddr_to_rcb()
372  * interleave or to insert the node interleave selection bits.
381 	switch (mcpp->intlven) {  in iaddr_unnormalize()
397 		    (int)mcpp->intlven, (int)mcpp->num);  in iaddr_unnormalize()
403 		 * For a 2/4/8 way interleave iaddr was formed by excising  in iaddr_unnormalize()
416 		    (mcpp->intlvsel << 12) | BITS(iaddr, 11, 0);  in iaddr_unnormalize()
418 		dramaddr = iaddr + mcpp->base;  in iaddr_unnormalize()
424 	    "intlven 0x%x intlvsel 0x%x MC base 0x%llx --> 0x%llx\n",  in iaddr_unnormalize()
425 	    iaddr, (int)mcpp->intlven, (int)mcpp->intlvsel, (int)mcpp->base,  in iaddr_unnormalize()
445 		return (-1);	/* errno already set */  in mc_pa_to_offset()
451 		return (-1);	/* errno already set */  in mc_pa_to_offset()
469  * find the corresponding chip-select for the rank and then reconstruct
502 	    "-> rank %d bank %d row 0x%x col 0x%x\n", offset,  in mc_offset_to_pa()
506 		return (-1);	/* errno already set */  in mc_offset_to_pa()
514 	 * Find the chip-select on this dimm using the given rank.  in mc_offset_to_pa()
519 			return (-1);	/* errno already set */  in mc_offset_to_pa()
551 		 * the bad one - the bad cs# need not be on the same dimm  in mc_offset_to_pa()
576 		/* found bad cs - reread properties from it instead of spare */  in mc_offset_to_pa()
578 			return (-1);	/* errno already set */  in mc_offset_to_pa()
586 		return (-1);	/* errno already set */  in mc_offset_to_pa()
609 	 * masked - pass the rest through.  in mc_offset_to_pa()
641 	 * node interleave selection bits.  in mc_offset_to_pa()
644 		return (-1);	/* errno already set */  in mc_offset_to_pa()
657 		return (-1);	/* errno already set */  in mcamd_cs_size()
663 		return (-1);	/* errno already set */  in mcamd_cs_size()