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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Drohm,bd9576-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 powering the R-Car series processors.
21 - rohm,bd9576
22 - rohm,bd9573
32 rohm,vout1-en-low:
35 controlled by a GPIO. This is dictated by state of vout1-en pin during
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H A Drohm,bd96801-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd96801-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 BD96801 is an automotive grade single-chip power management IC.
15 over-/under voltage and over current detection and a watchdog.
36 interrupt-names:
39 - enum: [intb, errb]
40 - const: errb
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_82598.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
48 static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,
51 static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
52 static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,
54 static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
57 static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,
60 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
63 static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
64 static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
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H A Dixgbe_82599.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
48 static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
51 static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw);
52 static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,
54 static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,
56 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
58 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
61 void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw) in ixgbe_init_mac_link_ops_82599() argument
63 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599()
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H A Dixgbe_common.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
41 static s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw);
42 static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw);
43 static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw);
44 static s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw);
45 static void ixgbe_standby_eeprom(struct ixgbe_hw *hw);
46 static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,
48 static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count);
49 static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
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/freebsd/sys/dev/e1000/
H A De1000_82575.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
48 static s32 e1000_init_phy_params_82575(struct e1000_hw *hw);
49 static s32 e1000_init_mac_params_82575(struct e1000_hw *hw);
50 static s32 e1000_acquire_nvm_82575(struct e1000_hw *hw);
51 static void e1000_release_nvm_82575(struct e1000_hw *hw);
52 static s32 e1000_check_for_link_82575(struct e1000_hw *hw);
53 static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw);
54 static s32 e1000_get_cfg_done_82575(struct e1000_hw *hw);
55 static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
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H A De1000_ich8lan.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
66 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
121 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
132 #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */
133 #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */
170 /* Half-duplex collision counts */
220 /* Strapping Option Register - RO */
231 #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
250 #define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in ms */
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/freebsd/sys/contrib/dev/athk/ath12k/
H A Dreg.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
11 #define ATH12K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0)
12 #define ATH12K_5GHZ_5150_5350 REG_RULE(5150 - 10, 5350 + 10, 80, 0, 30,\
14 #define ATH12K_5GHZ_5725_5850 REG_RULE(5725 - 10, 5850 + 10, 80, 0, 30,\
35 regd = rcu_dereference_rtnl(ar->hw->wiphy->regd); in ath12k_regdom_changes()
43 return memcmp(regd->alpha2, alpha2, 2) != 0; in ath12k_regdom_changes()
49 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); in ath12k_reg_notifier() local
51 struct ath12k *ar = hw->priv; in ath12k_reg_notifier()
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/freebsd/sys/contrib/dev/athk/ath11k/
H A Dreg.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
11 #define ATH11K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0)
12 #define ATH11K_5GHZ_5150_5350 REG_RULE(5150 - 10, 5350 + 10, 80, 0, 30,\
14 #define ATH11K_5GHZ_5725_5850 REG_RULE(5725 - 10, 5850 + 10, 80, 0, 30,\
35 regd = rcu_dereference_rtnl(ar->hw->wiphy->regd); in ath11k_regdom_changes()
43 return memcmp(regd->alpha2, alpha2, 2) != 0; in ath11k_regdom_changes()
49 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); in ath11k_reg_notifier() local
52 struct ath11k *ar = hw->priv; in ath11k_reg_notifier()
55 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_reg_notifier()
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H A Ddebugfs_htt_stats.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
251 * HW had attempted to transmit on air, for the HWSCH Schedule
253 * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
465 /* element 0,1, ...7 -> NSS 1,2, ...8 */
473 * (400us, 800us, 1600us & 3200us) in each mcs (0-11)
501 /* element 0,1, ...7 -> NSS 1,2, ...8 */
512 /* Counters to track number of rx packets in each GI in each mcs (0-11) */
595 /* histogram of ppdu post to hwsch - > cmd status received */
620 * The tries here is the count of the MPDUS within a PPDU that the HW
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_recv.c74 if ( AH9300(ah)->ah_reset_reason == HAL_RESET_BBPANIC ){ in ar9300_set_rx_abort()
85 /* abort: chip rx failed to go idle in 10 ms */ in ar9300_set_rx_abort()
90 "%s: rx failed to go idle in 10 ms RXSM=0x%x\n", in ar9300_set_rx_abort()
107 ar9300_stop_dma_receive(struct ath_hal *ah, u_int timeout) in ar9300_stop_dma_receive() argument
118 if (timeout == 0) { in ar9300_stop_dma_receive()
119 timeout = AH_RX_STOP_DMA_TIMEOUT; in ar9300_stop_dma_receive()
141 for (wait = timeout / AH_TIME_QUANTUM; wait != 0; wait--) { in ar9300_stop_dma_receive()
149 HALDEBUG(ah, HAL_DEBUG_RX, "%s: dma failed to stop in %d ms\n" in ar9300_stop_dma_receive()
152 timeout / 1000, in ar9300_stop_dma_receive()
193 * Set multicast filter 0 (lower 32-bits)
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H A Dar9300_interrupts.c66 * values. The value returned is mapped to abstract the hw-specific bit
69 * Returns: A hardware-abstracted bitmap of all non-masked-out
72 #define MAP_ISR_S2_HAL_CST 6 /* Carrier sense timeout */
73 #define MAP_ISR_S2_HAL_GTT 6 /* Global transmit timeout */
96 HAL_CAPABILITIES *p_cap = &AH_PRIVATE(ah)->ah_caps; in ar9300_get_pending_interrupts()
148 ah->ah_intrstate[0] = OS_REG_READ(ah, AR_ISR); in ar9300_get_pending_interrupts()
149 ah->ah_intrstate[1] = OS_REG_READ(ah, AR_ISR_S0); in ar9300_get_pending_interrupts()
150 ah->ah_intrstate[2] = OS_REG_READ(ah, AR_ISR_S1); in ar9300_get_pending_interrupts()
151 ah->ah_intrstate[3] = OS_REG_READ(ah, AR_ISR_S2); in ar9300_get_pending_interrupts()
152 ah->ah_intrstate[4] = OS_REG_READ(ah, AR_ISR_S3); in ar9300_get_pending_interrupts()
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/freebsd/sys/dev/atkbdc/
H A Dpsm.c1 /*-
28 * Thanks are also due to Rick Macklem, rick@snowhite.cis.uoguelph.ca -
36 * Andrew Herbert <andrew@werple.apana.org.au> - 8 June 1993
39 * Andrew Herbert - 12 June 1993
42 * - 13 June 1993
44 * Modified for PS/2 AUX mouse by Shoji Yuen <yuen@nuie.nagoya-u.ac.jp>
45 * - 24 October 1993
48 * Kazutaka Yokota <yokota@zodiac.mech.utsunomiya-u.ac.jp>
49 * - 3, 14, 22 October 1996.
50 * - 12 November 1996. IOCTLs and rearranging `psmread', `psmioctl'...
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/freebsd/sys/contrib/dev/athk/ath10k/
H A Dhw.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.
13 #include "hw.h"
15 #include "wmi-ops.h"
559 survey->filled |= SURVEY_INFO_TIME | in ath10k_hw_fill_survey_time()
562 wraparound_type = ar->hw_params.cc_wraparound_type; in ath10k_hw_fill_survey_time()
569 survey->filled &= ~SURVEY_INFO_TIME_BUSY; in ath10k_hw_fill_survey_time()
584 cc -= cc_prev - cc_fix; in ath10k_hw_fill_survey_time()
585 rcc -= rcc_prev - rcc_fix; in ath10k_hw_fill_survey_time()
587 survey->time = CCNT_TO_MSEC(ar, cc); in ath10k_hw_fill_survey_time()
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/freebsd/usr.sbin/moused/msconvd/
H A Dmsconvd.c2 ** SPDX-License-Identifier: BSD-4-Clause
214 /* MS IntelliMouse */
216 /* MS IntelliMouse TrackBall */
247 /* MS serial */
249 /* MS PS/2 */
267 /* MS BallPoint serial */
269 /* MS PnP serial */
271 /* MS PnP BallPoint serial */
273 /* MS serial compatible */
275 /* MS PS/2 compatible */
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/freebsd/sys/dev/ixl/
H A Di40e_nvm.c3 Copyright (c) 2013-2018, Intel Corporation
37 * i40e_init_nvm - Initialize NVM function pointers
38 * @hw: pointer to the HW structure
46 enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw) in i40e_init_nvm() argument
48 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
58 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
62 nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB; in i40e_init_nvm()
65 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
67 /* Max NVM timeout */ in i40e_init_nvm()
68 nvm->timeout = I40E_MAX_NVM_TIMEOUT; in i40e_init_nvm()
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/freebsd/sys/contrib/dev/iwlwifi/pcie/gen1_2/
H A Dtrans-gen2.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
4 * Copyright (C) 2018-2025 Intel Corporation
9 #include "iwl-trans.h"
10 #include "iwl-prph.h"
11 #include "pcie/iwl-context-info.h"
12 #include "pcie/iwl-context-info-v2.h"
41 /* Set FH wait threshold to maximum (HW error during stress W/A) */ in iwl_pcie_gen2_apm_init()
46 * wake device's PCI Express link L1a -> L0s in iwl_pcie_gen2_apm_init()
57 set_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_init()
67 if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status)) in iwl_pcie_gen2_apm_stop()
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/freebsd/sys/dev/qlxgbe/
H A Dql_inline.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2016 Qlogic Corporation
36 #define QL8_SEMLOCK_TIMEOUT 1000/* QLA8020 Semaphore Lock Timeout 10ms */
57 count--; in qla_sem_lock()
60 return(-1); in qla_sem_lock()
83 return(((NUM_TX_DESCRIPTORS * 4) - 1)); in qla_get_ifq_snd_maxlen()
92 if (ha->pci_func == 0) in qla_get_optics()
107 if ((ha->hw.module_type == 0x4) || in qla_get_optics()
108 (ha->hw.module_type == 0x5) || in qla_get_optics()
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/freebsd/sys/dev/qlxgb/
H A Dqla_inline.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2013 Qlogic Corporation
44 #define QL8_SEMLOCK_TIMEOUT 1000/* QLA8020 Semaphore Lock Timeout 10ms */
65 count--; in qla_sem_lock()
68 return(-1); in qla_sem_lock()
91 return((NUM_TX_DESCRIPTORS - 1)); in qla_get_ifq_snd_maxlen()
100 if (ha->pci_func == 0) in qla_get_optics()
125 return (ha->hw.mac_addr); in qla_get_mac_addr()
137 (((ha->pci_func >> 1) * 3) << 2) + ((ha->pci_func & 0x01) << 2); in qla_read_mac_addr()
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/freebsd/sys/contrib/dev/rtw89/
H A Dser.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
23 SER_EV_L1_RESET_PREPARE, /* pre-M0 */
65 return ser->ev_tbl[event].name; in ser_ev_name()
72 if (ser->state < SER_ST_MAX_ST) in ser_st_name()
73 return ser->st_tbl[ser->state].name; in ser_st_name()
87 p->type = _type; \
88 p->type_size = sizeof(p->data); \
89 p->padding = 0x0123456789abcdef; \
118 ser_cd_fw_rsvd_ple_init(&buf->fwple); in rtw89_ser_cd_prep()
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/freebsd/sys/dev/ufshci/
H A Dufshci_ctrlr.c1 /*-
5 * SPDX-License-Identifier: BSD-2-Clause
18 ctrlr->is_failed = true; in ufshci_ctrlr_fail()
21 ctrlr->task_mgmt_req_queue.qops.get_hw_queue( in ufshci_ctrlr_fail()
22 &ctrlr->task_mgmt_req_queue)); in ufshci_ctrlr_fail()
24 ctrlr->transfer_req_queue.qops.get_hw_queue( in ufshci_ctrlr_fail()
25 &ctrlr->transfer_req_queue)); in ufshci_ctrlr_fail()
35 * Re-enable request queues here because ufshci_ctrlr_reset_task() in ufshci_ctrlr_start()
76 if (!(ctrlr->quirks & UFSHCI_QUIRK_IGNORE_UIC_POWER_MODE) && in ufshci_ctrlr_start()
104 * If the reset is due to a timeout, it is already attached to the SIM in ufshci_ctrlr_start()
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/freebsd/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
154 * D-Link gigabit ethernet device ID
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/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_beacon.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
52 * + Timer 0 - 0..15 0xffff TU in ar5212SetBeaconTimers()
53 * + Timer 1 - 0..18 0x7ffff TU/8 in ar5212SetBeaconTimers()
54 * + Timer 2 - 0..24 0x1ffffff TU/8 in ar5212SetBeaconTimers()
55 * + Timer 3 - 0..15 0xffff TU in ar5212SetBeaconTimers()
57 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt & 0xffff); in ar5212SetBeaconTimers()
58 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba & 0x7ffff); in ar5212SetBeaconTimers()
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/freebsd/sys/dev/nvme/
H A Dnvme_ctrlr.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2012-2016 Intel Corporation
60 bus_barrier(ctrlr->resource, 0, rman_get_size(ctrlr->resource), flags); in nvme_ctrlr_barrier()
72 sbuf_printf(&sb, "name=\"%s\" ", device_get_nameunit(ctrlr->dev)); in nvme_ctrlr_devctl_va()
99 sbuf_printf(&sb, "%s: ", device_get_nameunit(ctrlr->dev)); in nvme_ctrlr_devctl_log()
119 qpair = &ctrlr->adminq; in nvme_ctrlr_construct_admin_qpair()
120 qpair->id = 0; in nvme_ctrlr_construct_admin_qpair()
121 qpair->cpu = CPU_FFS(&cpuset_domain[ctrlr->domain]) - 1; in nvme_ctrlr_construct_admin_qpair()
122 qpair->domain = ctrlr->domain; in nvme_ctrlr_construct_admin_qpair()
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/freebsd/sys/contrib/dev/iwlwifi/fw/
H A Dfile.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */
56 IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */
107 /* contains sub-sections like PNVM file does (did) */
122 /* TLVs 0x1000-0x2000 are for internal driver usage */
174 * enum iwl_ucode_tlv_flag - ucode API flags
210 * enum iwl_ucode_tlv_api - ucode api
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