Lines Matching +full:hw +full:- +full:timeout +full:- +full:ms
3 Copyright (c) 2013-2018, Intel Corporation
37 * i40e_init_nvm - Initialize NVM function pointers
38 * @hw: pointer to the HW structure
46 enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw) in i40e_init_nvm() argument
48 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
58 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
62 nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB; in i40e_init_nvm()
65 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
67 /* Max NVM timeout */ in i40e_init_nvm()
68 nvm->timeout = I40E_MAX_NVM_TIMEOUT; in i40e_init_nvm()
69 nvm->blank_nvm_mode = FALSE; in i40e_init_nvm()
71 nvm->blank_nvm_mode = TRUE; in i40e_init_nvm()
73 i40e_debug(hw, I40E_DEBUG_NVM, "NVM init error: unsupported blank mode.\n"); in i40e_init_nvm()
80 * i40e_acquire_nvm - Generic request for acquiring the NVM ownership
81 * @hw: pointer to the HW structure
87 enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw, in i40e_acquire_nvm() argument
91 u64 gtime, timeout; in i40e_acquire_nvm() local
96 if (hw->nvm.blank_nvm_mode) in i40e_acquire_nvm()
99 ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access, in i40e_acquire_nvm()
102 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
104 /* Store the timeout */ in i40e_acquire_nvm()
105 hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime; in i40e_acquire_nvm()
108 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_acquire_nvm()
111 hw->aq.asq_last_status); in i40e_acquire_nvm()
115 timeout = I40E_MS_TO_GTIME(I40E_MAX_NVM_TIMEOUT) + gtime; in i40e_acquire_nvm()
116 while ((gtime < timeout) && time_left) { in i40e_acquire_nvm()
118 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
119 ret_code = i40e_aq_request_resource(hw, in i40e_acquire_nvm()
124 hw->nvm.hw_semaphore_timeout = in i40e_acquire_nvm()
130 hw->nvm.hw_semaphore_timeout = 0; in i40e_acquire_nvm()
131 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_acquire_nvm()
132 "NVM acquire timed out, wait %llu ms before trying again. status=%d aq_err=%d\n", in i40e_acquire_nvm()
134 hw->aq.asq_last_status); in i40e_acquire_nvm()
143 * i40e_release_nvm - Generic request for releasing the NVM ownership
144 * @hw: pointer to the HW structure
148 void i40e_release_nvm(struct i40e_hw *hw) in i40e_release_nvm() argument
155 if (hw->nvm.blank_nvm_mode) in i40e_release_nvm()
158 ret_code = i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); in i40e_release_nvm()
161 * results in an admin Q timeout, so handle them correctly in i40e_release_nvm()
164 (total_delay < hw->aq.asq_cmd_timeout)) { in i40e_release_nvm()
166 ret_code = i40e_aq_release_resource(hw, in i40e_release_nvm()
173 * i40e_poll_sr_srctl_done_bit - Polls the GLNVM_SRCTL done bit
174 * @hw: pointer to the HW structure
178 static enum i40e_status_code i40e_poll_sr_srctl_done_bit(struct i40e_hw *hw) in i40e_poll_sr_srctl_done_bit() argument
187 srctl = rd32(hw, I40E_GLNVM_SRCTL); in i40e_poll_sr_srctl_done_bit()
195 i40e_debug(hw, I40E_DEBUG_NVM, "Done bit in GLNVM_SRCTL not set"); in i40e_poll_sr_srctl_done_bit()
200 * i40e_read_nvm_word_srctl - Reads Shadow RAM via SRCTL register
201 * @hw: pointer to the HW structure
202 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
207 enum i40e_status_code i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset, in i40e_read_nvm_word_srctl() argument
215 if (offset >= hw->nvm.sr_size) { in i40e_read_nvm_word_srctl()
216 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_read_nvm_word_srctl()
218 offset, hw->nvm.sr_size); in i40e_read_nvm_word_srctl()
224 ret_code = i40e_poll_sr_srctl_done_bit(hw); in i40e_read_nvm_word_srctl()
229 wr32(hw, I40E_GLNVM_SRCTL, sr_reg); in i40e_read_nvm_word_srctl()
232 ret_code = i40e_poll_sr_srctl_done_bit(hw); in i40e_read_nvm_word_srctl()
234 sr_reg = rd32(hw, I40E_GLNVM_SRDATA); in i40e_read_nvm_word_srctl()
241 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_read_nvm_word_srctl()
250 * i40e_read_nvm_aq - Read Shadow RAM.
251 * @hw: pointer to the HW structure.
260 static enum i40e_status_code i40e_read_nvm_aq(struct i40e_hw *hw, in i40e_read_nvm_aq() argument
271 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_read_nvm_aq()
274 * We cannot do it for the module-based model, as we did not acquire in i40e_read_nvm_aq()
276 * Firmware will check the module-based model. in i40e_read_nvm_aq()
278 if ((offset + words) > hw->nvm.sr_size) in i40e_read_nvm_aq()
279 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_read_nvm_aq()
281 (offset + words), hw->nvm.sr_size); in i40e_read_nvm_aq()
284 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_read_nvm_aq()
287 else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS) in i40e_read_nvm_aq()
290 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_read_nvm_aq()
294 ret_code = i40e_aq_read_nvm(hw, module_pointer, in i40e_read_nvm_aq()
303 * i40e_read_nvm_word_aq - Reads Shadow RAM via AQ
304 * @hw: pointer to the HW structure
305 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
310 static enum i40e_status_code i40e_read_nvm_word_aq(struct i40e_hw *hw, u16 offset, in i40e_read_nvm_word_aq() argument
317 ret_code = i40e_read_nvm_aq(hw, 0x0, offset, 1, data, TRUE); in i40e_read_nvm_word_aq()
324 * __i40e_read_nvm_word - Reads NVM word, assumes caller does the locking
325 * @hw: pointer to the HW structure
326 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
334 enum i40e_status_code __i40e_read_nvm_word(struct i40e_hw *hw, in __i40e_read_nvm_word() argument
339 if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) in __i40e_read_nvm_word()
340 return i40e_read_nvm_word_aq(hw, offset, data); in __i40e_read_nvm_word()
342 return i40e_read_nvm_word_srctl(hw, offset, data); in __i40e_read_nvm_word()
346 * i40e_read_nvm_word - Reads NVM word, acquires lock if necessary
347 * @hw: pointer to the HW structure
348 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
353 enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, in i40e_read_nvm_word() argument
358 if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK) in i40e_read_nvm_word()
359 ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); in i40e_read_nvm_word()
363 ret_code = __i40e_read_nvm_word(hw, offset, data); in i40e_read_nvm_word()
365 if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK) in i40e_read_nvm_word()
366 i40e_release_nvm(hw); in i40e_read_nvm_word()
371 * i40e_read_nvm_module_data - Reads NVM Buffer to specified memory location
372 * @hw: Pointer to the HW structure
380 i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset, in i40e_read_nvm_module_data() argument
389 status = i40e_read_nvm_word(hw, module_ptr, &ptr_value); in i40e_read_nvm_module_data()
391 i40e_debug(hw, I40E_DEBUG_ALL, in i40e_read_nvm_module_data()
403 i40e_debug(hw, I40E_DEBUG_ALL, "Pointer not initialized.\n"); in i40e_read_nvm_module_data()
410 i40e_debug(hw, I40E_DEBUG_ALL, in i40e_read_nvm_module_data()
417 status = i40e_read_nvm_word(hw, ptr_value + module_offset, in i40e_read_nvm_module_data()
420 i40e_debug(hw, I40E_DEBUG_ALL, in i40e_read_nvm_module_data()
429 status = i40e_read_nvm_buffer(hw, offset, &words_data_size, in i40e_read_nvm_module_data()
432 i40e_debug(hw, I40E_DEBUG_ALL, in i40e_read_nvm_module_data()
442 * i40e_read_nvm_buffer_srctl - Reads Shadow RAM buffer via SRCTL register
443 * @hw: pointer to the HW structure
444 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
452 static enum i40e_status_code i40e_read_nvm_buffer_srctl(struct i40e_hw *hw, u16 offset, in i40e_read_nvm_buffer_srctl() argument
463 ret_code = i40e_read_nvm_word_srctl(hw, index, &data[word]); in i40e_read_nvm_buffer_srctl()
475 * i40e_read_nvm_buffer_aq - Reads Shadow RAM buffer via AQ
476 * @hw: pointer to the HW structure
477 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
485 static enum i40e_status_code i40e_read_nvm_buffer_aq(struct i40e_hw *hw, u16 offset, in i40e_read_nvm_buffer_aq() argument
503 (u16)(I40E_SR_SECTOR_SIZE_IN_WORDS - in i40e_read_nvm_buffer_aq()
506 read_size = min((*words - words_read), in i40e_read_nvm_buffer_aq()
513 ret_code = i40e_read_nvm_aq(hw, 0x0, offset, read_size, in i40e_read_nvm_buffer_aq()
534 * __i40e_read_nvm_buffer - Reads NVM buffer, caller must acquire lock
535 * @hw: pointer to the HW structure
536 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
543 enum i40e_status_code __i40e_read_nvm_buffer(struct i40e_hw *hw, in __i40e_read_nvm_buffer() argument
547 if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) in __i40e_read_nvm_buffer()
548 return i40e_read_nvm_buffer_aq(hw, offset, words, data); in __i40e_read_nvm_buffer()
550 return i40e_read_nvm_buffer_srctl(hw, offset, words, data); in __i40e_read_nvm_buffer()
554 * i40e_read_nvm_buffer - Reads Shadow RAM buffer and acquire lock if necessary
555 * @hw: pointer to the HW structure
556 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
564 enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, in i40e_read_nvm_buffer() argument
569 if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) { in i40e_read_nvm_buffer()
570 ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); in i40e_read_nvm_buffer()
572 ret_code = i40e_read_nvm_buffer_aq(hw, offset, words, in i40e_read_nvm_buffer()
574 i40e_release_nvm(hw); in i40e_read_nvm_buffer()
577 ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data); in i40e_read_nvm_buffer()
584 * i40e_write_nvm_aq - Writes Shadow RAM.
585 * @hw: pointer to the HW structure.
594 enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer, in i40e_write_nvm_aq() argument
604 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_write_nvm_aq()
607 * We cannot do it for the module-based model, as we did not acquire in i40e_write_nvm_aq()
609 * Firmware will check the module-based model. in i40e_write_nvm_aq()
611 if ((offset + words) > hw->nvm.sr_size) in i40e_write_nvm_aq()
616 else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS) in i40e_write_nvm_aq()
621 ret_code = i40e_aq_update_nvm(hw, module_pointer, in i40e_write_nvm_aq()
631 * __i40e_write_nvm_word - Writes Shadow RAM word
632 * @hw: pointer to the HW structure
641 enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset, in __i40e_write_nvm_word() argument
649 return i40e_write_nvm_aq(hw, 0x00, offset, 1, data, FALSE); in __i40e_write_nvm_word()
653 * __i40e_write_nvm_buffer - Writes Shadow RAM buffer
654 * @hw: pointer to the HW structure
665 enum i40e_status_code __i40e_write_nvm_buffer(struct i40e_hw *hw, in __i40e_write_nvm_buffer() argument
681 return i40e_write_nvm_aq(hw, module_pointer, offset, words, in __i40e_write_nvm_buffer()
686 * i40e_calc_nvm_checksum - Calculates and returns the checksum
687 * @hw: pointer to hardware structure
691 * except the VPD and PCIe ALT Auto-load modules. The structure and size of VPD
695 enum i40e_status_code i40e_calc_nvm_checksum(struct i40e_hw *hw, u16 *checksum) in i40e_calc_nvm_checksum() argument
707 ret_code = i40e_allocate_virt_mem(hw, &vmem, in i40e_calc_nvm_checksum()
714 ret_code = __i40e_read_nvm_word(hw, I40E_SR_VPD_PTR, &vpd_module); in i40e_calc_nvm_checksum()
720 /* read pointer to PCIe Alt Auto-load module */ in i40e_calc_nvm_checksum()
721 ret_code = __i40e_read_nvm_word(hw, I40E_SR_PCIE_ALT_AUTO_LOAD_PTR, in i40e_calc_nvm_checksum()
729 * except the VPD and PCIe ALT Auto-load modules in i40e_calc_nvm_checksum()
731 for (i = 0; i < hw->nvm.sr_size; i++) { in i40e_calc_nvm_checksum()
736 ret_code = __i40e_read_nvm_buffer(hw, i, &words, data); in i40e_calc_nvm_checksum()
762 *checksum = (u16)I40E_SR_SW_CHECKSUM_BASE - checksum_local; in i40e_calc_nvm_checksum()
765 i40e_free_virt_mem(hw, &vmem); in i40e_calc_nvm_checksum()
770 * i40e_update_nvm_checksum - Updates the NVM checksum
771 * @hw: pointer to hardware structure
777 enum i40e_status_code i40e_update_nvm_checksum(struct i40e_hw *hw) in i40e_update_nvm_checksum() argument
785 ret_code = i40e_calc_nvm_checksum(hw, &checksum); in i40e_update_nvm_checksum()
788 ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD, in i40e_update_nvm_checksum()
796 * i40e_validate_nvm_checksum - Validate EEPROM checksum
797 * @hw: pointer to hardware structure
803 enum i40e_status_code i40e_validate_nvm_checksum(struct i40e_hw *hw, in i40e_validate_nvm_checksum() argument
817 ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); in i40e_validate_nvm_checksum()
820 ret_code = i40e_calc_nvm_checksum(hw, &checksum_local); in i40e_validate_nvm_checksum()
821 __i40e_read_nvm_word(hw, I40E_SR_SW_CHECKSUM_WORD, &checksum_sr); in i40e_validate_nvm_checksum()
822 i40e_release_nvm(hw); in i40e_validate_nvm_checksum()
839 static enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
842 static enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,
845 static enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,
848 static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
851 static enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
854 static enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,
857 static enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,
860 static enum i40e_status_code i40e_nvmupd_exec_aq(struct i40e_hw *hw,
863 static enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw,
866 static enum i40e_status_code i40e_nvmupd_get_aq_event(struct i40e_hw *hw,
906 * i40e_nvmupd_command - Process an NVM update command
907 * @hw: pointer to hardware structure
914 enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw, in i40e_nvmupd_command() argument
927 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno); in i40e_nvmupd_command()
929 …i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d opc 0x%04x cmd 0x%08x config 0x… in i40e_nvmupd_command()
931 hw->nvmupd_state, in i40e_nvmupd_command()
932 hw->nvm_release_on_done, hw->nvm_wait_opcode, in i40e_nvmupd_command()
933 cmd->command, cmd->config, cmd->offset, cmd->data_size); in i40e_nvmupd_command()
936 *perrno = -EFAULT; in i40e_nvmupd_command()
937 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_command()
946 if (!cmd->data_size) { in i40e_nvmupd_command()
947 *perrno = -EFAULT; in i40e_nvmupd_command()
951 bytes[0] = hw->nvmupd_state; in i40e_nvmupd_command()
953 if (cmd->data_size >= 4) { in i40e_nvmupd_command()
955 *((u16 *)&bytes[2]) = hw->nvm_wait_opcode; in i40e_nvmupd_command()
959 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) in i40e_nvmupd_command()
960 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_command()
970 if (cmd->data_size < hw->nvmupd_features.size) { in i40e_nvmupd_command()
971 *perrno = -EFAULT; in i40e_nvmupd_command()
979 if (cmd->data_size > hw->nvmupd_features.size) in i40e_nvmupd_command()
980 i40e_memset(bytes + hw->nvmupd_features.size, 0x0, in i40e_nvmupd_command()
981 cmd->data_size - hw->nvmupd_features.size, in i40e_nvmupd_command()
984 i40e_memcpy(bytes, &hw->nvmupd_features, in i40e_nvmupd_command()
985 hw->nvmupd_features.size, I40E_NONDMA_MEM); in i40e_nvmupd_command()
991 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) { in i40e_nvmupd_command()
992 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_command()
994 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_command()
1002 * ~5ms for most commands. However lock is held for ~60ms for in i40e_nvmupd_command()
1005 i40e_acquire_spinlock(&hw->aq.arq_spinlock); in i40e_nvmupd_command()
1006 switch (hw->nvmupd_state) { in i40e_nvmupd_command()
1008 status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno); in i40e_nvmupd_command()
1012 status = i40e_nvmupd_state_reading(hw, cmd, bytes, perrno); in i40e_nvmupd_command()
1016 status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno); in i40e_nvmupd_command()
1024 if (cmd->offset == 0xffff) { in i40e_nvmupd_command()
1025 i40e_nvmupd_clear_wait_state(hw); in i40e_nvmupd_command()
1031 *perrno = -EBUSY; in i40e_nvmupd_command()
1036 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_command()
1037 "NVMUPD: no such state %d\n", hw->nvmupd_state); in i40e_nvmupd_command()
1039 *perrno = -ESRCH; in i40e_nvmupd_command()
1043 i40e_release_spinlock(&hw->aq.arq_spinlock); in i40e_nvmupd_command()
1048 * i40e_nvmupd_state_init - Handle NVM update state Init
1049 * @hw: pointer to hardware structure
1057 static enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, in i40e_nvmupd_state_init() argument
1066 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno); in i40e_nvmupd_state_init()
1070 status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); in i40e_nvmupd_state_init()
1073 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1075 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1076 i40e_release_nvm(hw); in i40e_nvmupd_state_init()
1081 status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); in i40e_nvmupd_state_init()
1084 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1086 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1088 i40e_release_nvm(hw); in i40e_nvmupd_state_init()
1090 hw->nvmupd_state = I40E_NVMUPD_STATE_READING; in i40e_nvmupd_state_init()
1095 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); in i40e_nvmupd_state_init()
1098 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1100 status = i40e_nvmupd_nvm_erase(hw, cmd, perrno); in i40e_nvmupd_state_init()
1102 i40e_release_nvm(hw); in i40e_nvmupd_state_init()
1104 hw->nvm_release_on_done = TRUE; in i40e_nvmupd_state_init()
1105 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_erase; in i40e_nvmupd_state_init()
1106 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1112 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); in i40e_nvmupd_state_init()
1115 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1117 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1119 i40e_release_nvm(hw); in i40e_nvmupd_state_init()
1121 hw->nvm_release_on_done = TRUE; in i40e_nvmupd_state_init()
1122 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1123 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1129 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); in i40e_nvmupd_state_init()
1132 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1134 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1136 i40e_release_nvm(hw); in i40e_nvmupd_state_init()
1138 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1139 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_init()
1145 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); in i40e_nvmupd_state_init()
1148 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1150 status = i40e_update_nvm_checksum(hw); in i40e_nvmupd_state_init()
1152 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_init()
1154 hw->aq.asq_last_status) : in i40e_nvmupd_state_init()
1155 -EIO; in i40e_nvmupd_state_init()
1156 i40e_release_nvm(hw); in i40e_nvmupd_state_init()
1158 hw->nvm_release_on_done = TRUE; in i40e_nvmupd_state_init()
1159 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1160 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1166 status = i40e_nvmupd_exec_aq(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1170 status = i40e_nvmupd_get_aq_result(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1174 status = i40e_nvmupd_get_aq_event(hw, cmd, bytes, perrno); in i40e_nvmupd_state_init()
1178 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_state_init()
1182 *perrno = -ESRCH; in i40e_nvmupd_state_init()
1189 * i40e_nvmupd_state_reading - Handle NVM update state Reading
1190 * @hw: pointer to hardware structure
1198 static enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw, in i40e_nvmupd_state_reading() argument
1207 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno); in i40e_nvmupd_state_reading()
1212 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno); in i40e_nvmupd_state_reading()
1216 status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno); in i40e_nvmupd_state_reading()
1217 i40e_release_nvm(hw); in i40e_nvmupd_state_reading()
1218 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_reading()
1222 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_state_reading()
1226 *perrno = -ESRCH; in i40e_nvmupd_state_reading()
1233 * i40e_nvmupd_state_writing - Handle NVM update state Writing
1234 * @hw: pointer to hardware structure
1242 static enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw, in i40e_nvmupd_state_writing() argument
1252 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno); in i40e_nvmupd_state_writing()
1257 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); in i40e_nvmupd_state_writing()
1259 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1260 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_writing()
1265 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); in i40e_nvmupd_state_writing()
1267 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1269 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1270 -EIO; in i40e_nvmupd_state_writing()
1271 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1273 hw->nvm_release_on_done = TRUE; in i40e_nvmupd_state_writing()
1274 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1275 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_writing()
1281 status = i40e_update_nvm_checksum(hw); in i40e_nvmupd_state_writing()
1283 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1285 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1286 -EIO; in i40e_nvmupd_state_writing()
1287 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1289 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1290 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_writing()
1296 status = i40e_update_nvm_checksum(hw); in i40e_nvmupd_state_writing()
1298 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1300 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1301 -EIO; in i40e_nvmupd_state_writing()
1302 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1304 hw->nvm_release_on_done = TRUE; in i40e_nvmupd_state_writing()
1305 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1306 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_writing()
1311 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_state_writing()
1315 *perrno = -ESRCH; in i40e_nvmupd_state_writing()
1319 /* In some circumstances, a multi-write transaction takes longer in i40e_nvmupd_state_writing()
1320 * than the default 3 minute timeout on the write semaphore. If in i40e_nvmupd_state_writing()
1325 if (status && (hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) && in i40e_nvmupd_state_writing()
1328 u32 old_asq_status = hw->aq.asq_last_status; in i40e_nvmupd_state_writing()
1331 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_nvmupd_state_writing()
1332 if (gtime >= hw->nvm.hw_semaphore_timeout) { in i40e_nvmupd_state_writing()
1333 i40e_debug(hw, I40E_DEBUG_ALL, in i40e_nvmupd_state_writing()
1335 gtime, hw->nvm.hw_semaphore_timeout); in i40e_nvmupd_state_writing()
1336 i40e_release_nvm(hw); in i40e_nvmupd_state_writing()
1337 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); in i40e_nvmupd_state_writing()
1339 i40e_debug(hw, I40E_DEBUG_ALL, in i40e_nvmupd_state_writing()
1341 hw->aq.asq_last_status); in i40e_nvmupd_state_writing()
1343 hw->aq.asq_last_status = old_asq_status; in i40e_nvmupd_state_writing()
1355 * i40e_nvmupd_clear_wait_state - clear wait state on hw
1356 * @hw: pointer to the hardware structure
1358 void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw) in i40e_nvmupd_clear_wait_state() argument
1360 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_clear_wait_state()
1362 hw->nvm_wait_opcode); in i40e_nvmupd_clear_wait_state()
1364 if (hw->nvm_release_on_done) { in i40e_nvmupd_clear_wait_state()
1365 i40e_release_nvm(hw); in i40e_nvmupd_clear_wait_state()
1366 hw->nvm_release_on_done = FALSE; in i40e_nvmupd_clear_wait_state()
1368 hw->nvm_wait_opcode = 0; in i40e_nvmupd_clear_wait_state()
1370 if (hw->aq.arq_last_status) { in i40e_nvmupd_clear_wait_state()
1371 hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR; in i40e_nvmupd_clear_wait_state()
1375 switch (hw->nvmupd_state) { in i40e_nvmupd_clear_wait_state()
1377 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_clear_wait_state()
1381 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; in i40e_nvmupd_clear_wait_state()
1390 * i40e_nvmupd_check_wait_event - handle NVM update operation events
1391 * @hw: pointer to the hardware structure
1395 void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode, in i40e_nvmupd_check_wait_event() argument
1400 if (opcode == hw->nvm_wait_opcode) { in i40e_nvmupd_check_wait_event()
1401 i40e_memcpy(&hw->nvm_aq_event_desc, desc, in i40e_nvmupd_check_wait_event()
1403 i40e_nvmupd_clear_wait_state(hw); in i40e_nvmupd_check_wait_event()
1408 * i40e_nvmupd_validate_command - Validate given command
1409 * @hw: pointer to hardware structure
1415 static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw, in i40e_nvmupd_validate_command() argument
1427 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_validate_command()
1428 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_validate_command()
1431 if ((cmd->data_size < 1) || in i40e_nvmupd_validate_command()
1432 (cmd->data_size > I40E_NVMUPD_MAX_DATA)) { in i40e_nvmupd_validate_command()
1433 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_validate_command()
1435 cmd->data_size); in i40e_nvmupd_validate_command()
1436 *perrno = -EFAULT; in i40e_nvmupd_validate_command()
1440 switch (cmd->command) { in i40e_nvmupd_validate_command()
1467 *perrno = -EFAULT; in i40e_nvmupd_validate_command()
1515 * i40e_nvmupd_exec_aq - Run an AQ command
1516 * @hw: pointer to hardware structure
1523 static enum i40e_status_code i40e_nvmupd_exec_aq(struct i40e_hw *hw, in i40e_nvmupd_exec_aq() argument
1535 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__); in i40e_nvmupd_exec_aq()
1536 if (cmd->offset == 0xffff) in i40e_nvmupd_exec_aq()
1540 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_exec_aq()
1543 memset(&hw->nvm_wb_desc, 0, aq_desc_len); in i40e_nvmupd_exec_aq()
1546 if (cmd->data_size < aq_desc_len) { in i40e_nvmupd_exec_aq()
1547 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_exec_aq()
1549 cmd->data_size, aq_desc_len); in i40e_nvmupd_exec_aq()
1550 *perrno = -EINVAL; in i40e_nvmupd_exec_aq()
1556 aq_data_len = cmd->data_size - aq_desc_len; in i40e_nvmupd_exec_aq()
1557 buff_size = max(aq_data_len, (u32)LE16_TO_CPU(aq_desc->datalen)); in i40e_nvmupd_exec_aq()
1559 if (!hw->nvm_buff.va) { in i40e_nvmupd_exec_aq()
1560 status = i40e_allocate_virt_mem(hw, &hw->nvm_buff, in i40e_nvmupd_exec_aq()
1561 hw->aq.asq_buf_size); in i40e_nvmupd_exec_aq()
1563 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_exec_aq()
1568 if (hw->nvm_buff.va) { in i40e_nvmupd_exec_aq()
1569 buff = hw->nvm_buff.va; in i40e_nvmupd_exec_aq()
1575 if (cmd->offset) in i40e_nvmupd_exec_aq()
1576 memset(&hw->nvm_aq_event_desc, 0, aq_desc_len); in i40e_nvmupd_exec_aq()
1579 status = i40e_asq_send_command(hw, aq_desc, buff, in i40e_nvmupd_exec_aq()
1582 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_exec_aq()
1584 i40e_stat_str(hw, status), in i40e_nvmupd_exec_aq()
1585 i40e_aq_str(hw, hw->aq.asq_last_status)); in i40e_nvmupd_exec_aq()
1586 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_exec_aq()
1591 if (cmd->offset) { in i40e_nvmupd_exec_aq()
1592 hw->nvm_wait_opcode = cmd->offset; in i40e_nvmupd_exec_aq()
1593 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_exec_aq()
1600 * i40e_nvmupd_get_aq_result - Get the results from the previous exec_aq
1601 * @hw: pointer to hardware structure
1608 static enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw, in i40e_nvmupd_get_aq_result() argument
1617 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__); in i40e_nvmupd_get_aq_result()
1620 aq_total_len = aq_desc_len + LE16_TO_CPU(hw->nvm_wb_desc.datalen); in i40e_nvmupd_get_aq_result()
1623 if (cmd->offset > aq_total_len) { in i40e_nvmupd_get_aq_result()
1624 i40e_debug(hw, I40E_DEBUG_NVM, "%s: offset too big %d > %d\n", in i40e_nvmupd_get_aq_result()
1625 __func__, cmd->offset, aq_total_len); in i40e_nvmupd_get_aq_result()
1626 *perrno = -EINVAL; in i40e_nvmupd_get_aq_result()
1631 if (cmd->data_size > (aq_total_len - cmd->offset)) { in i40e_nvmupd_get_aq_result()
1632 int new_len = aq_total_len - cmd->offset; in i40e_nvmupd_get_aq_result()
1634 i40e_debug(hw, I40E_DEBUG_NVM, "%s: copy length %d too big, trimming to %d\n", in i40e_nvmupd_get_aq_result()
1635 __func__, cmd->data_size, new_len); in i40e_nvmupd_get_aq_result()
1636 cmd->data_size = new_len; in i40e_nvmupd_get_aq_result()
1639 remainder = cmd->data_size; in i40e_nvmupd_get_aq_result()
1640 if (cmd->offset < aq_desc_len) { in i40e_nvmupd_get_aq_result()
1641 u32 len = aq_desc_len - cmd->offset; in i40e_nvmupd_get_aq_result()
1643 len = min(len, cmd->data_size); in i40e_nvmupd_get_aq_result()
1644 i40e_debug(hw, I40E_DEBUG_NVM, "%s: aq_desc bytes %d to %d\n", in i40e_nvmupd_get_aq_result()
1645 __func__, cmd->offset, cmd->offset + len); in i40e_nvmupd_get_aq_result()
1647 buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset; in i40e_nvmupd_get_aq_result()
1651 remainder -= len; in i40e_nvmupd_get_aq_result()
1652 buff = hw->nvm_buff.va; in i40e_nvmupd_get_aq_result()
1654 buff = (u8 *)hw->nvm_buff.va + (cmd->offset - aq_desc_len); in i40e_nvmupd_get_aq_result()
1658 int start_byte = buff - (u8 *)hw->nvm_buff.va; in i40e_nvmupd_get_aq_result()
1660 i40e_debug(hw, I40E_DEBUG_NVM, "%s: databuf bytes %d to %d\n", in i40e_nvmupd_get_aq_result()
1669 * i40e_nvmupd_get_aq_event - Get the Admin Queue event from previous exec_aq
1670 * @hw: pointer to hardware structure
1677 static enum i40e_status_code i40e_nvmupd_get_aq_event(struct i40e_hw *hw, in i40e_nvmupd_get_aq_event() argument
1684 i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__); in i40e_nvmupd_get_aq_event()
1687 aq_total_len = aq_desc_len + LE16_TO_CPU(hw->nvm_aq_event_desc.datalen); in i40e_nvmupd_get_aq_event()
1690 if (cmd->data_size > aq_total_len) { in i40e_nvmupd_get_aq_event()
1691 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_get_aq_event()
1693 __func__, cmd->data_size, aq_total_len); in i40e_nvmupd_get_aq_event()
1694 cmd->data_size = aq_total_len; in i40e_nvmupd_get_aq_event()
1697 i40e_memcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size, in i40e_nvmupd_get_aq_event()
1704 * i40e_nvmupd_nvm_read - Read NVM
1705 * @hw: pointer to hardware structure
1712 static enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw, in i40e_nvmupd_nvm_read() argument
1721 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_read()
1722 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_read()
1726 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_read()
1728 status = i40e_aq_read_nvm(hw, module, cmd->offset, (u16)cmd->data_size, in i40e_nvmupd_nvm_read()
1731 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_nvm_read()
1733 module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_read()
1734 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_nvm_read()
1736 status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_read()
1737 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_read()
1744 * i40e_nvmupd_nvm_erase - Erase an NVM module
1745 * @hw: pointer to hardware structure
1751 static enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw, in i40e_nvmupd_nvm_erase() argument
1760 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_erase()
1761 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_erase()
1765 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_erase()
1767 status = i40e_aq_erase_nvm(hw, module, cmd->offset, (u16)cmd->data_size, in i40e_nvmupd_nvm_erase()
1770 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_nvm_erase()
1772 module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_erase()
1773 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_nvm_erase()
1775 status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_erase()
1776 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_erase()
1783 * i40e_nvmupd_nvm_write - Write NVM
1784 * @hw: pointer to hardware structure
1791 static enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw, in i40e_nvmupd_nvm_write() argument
1801 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_write()
1802 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_write()
1804 preservation_flags = i40e_nvmupd_get_preservation_flags(cmd->config); in i40e_nvmupd_nvm_write()
1807 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_write()
1809 status = i40e_aq_update_nvm(hw, module, cmd->offset, in i40e_nvmupd_nvm_write()
1810 (u16)cmd->data_size, bytes, last, in i40e_nvmupd_nvm_write()
1813 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_nvm_write()
1815 module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_write()
1816 i40e_debug(hw, I40E_DEBUG_NVM, in i40e_nvmupd_nvm_write()
1818 status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_write()
1819 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_write()