/linux/drivers/net/can/usb/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menu "CAN USB interfaces" 3 depends on USB 12 tristate "EMS CPC-USB/ARM7 CAN/USB interface" 14 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface 15 from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de). 18 tristate "esd electronics gmbh CAN/USB interfaces" 20 This driver adds support for several CAN/USB interfaces 24 - esd CAN-USB/2 25 - esd CAN-USB/3-FD [all …]
|
/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,usb-hs-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,usb-hs-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm's USB HS PHY 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 if: 17 - qcom,usb-hs-phy-apq8064 18 - qcom,usb-hs-phy-msm8660 19 - qcom,usb-hs-phy-msm8960 [all …]
|
H A D | transmit-amplitude.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 Binding describing the peak-to-peak transmit amplitude for common PHYs 14 - Marek Behún <kabel@kernel.org> 17 tx-p2p-microvolt: 19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property 21 'tx-p2p-microvolt-names' property must be provided and contain 24 tx-p2p-microvolt-names: [all …]
|
H A D | phy-stm32-usbphyc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 USB HS PHY controller 22 |_ PHY port#2 ----| |________________ 27 - Amelie Delaunay <amelie.delaunay@foss.st.com> 31 const: st,stm32mp1-usbphyc 42 "#address-cells": 45 "#size-cells": [all …]
|
H A D | nvidia,tegra20-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra USB PHY 10 - Dmitry Osipenko <digetx@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Thierry Reding <thierry.reding@gmail.com> 17 - items: 18 - enum: [all …]
|
H A D | renesas,rcar-gen2-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car Gen2 USB PHY 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - enum: 16 - renesas,usb-phy-r8a7742 # RZ/G1H 17 - renesas,usb-phy-r8a7743 # RZ/G1M 18 - renesas,usb-phy-r8a7744 # RZ/G1N [all …]
|
/linux/drivers/phy/qualcomm/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 6 tristate "Atheros AR71XX/9XXX USB PHY driver" 8 default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM 12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs. 32 tristate "Qualcomm IPQ4019 USB PHY driver" 36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. 57 if PHY_QCOM_QMP 66 select DRM_AUX_BRIDGE if DRM_BRIDGE 98 tristate "Qualcomm QMP USB PHY Driver" 102 Enable this to support the QMP USB PHY transceiver that is used [all …]
|
H A D | phy-qcom-snps-femto-v2.c | 1 // SPDX-License-Identifier: GPL-2.0 82 "vdda-pll", "vdda33", "vdda18", 110 * struct qcom_snps_hsphy - snps hs phy attributes 115 * @base: iomapped memory space for snps hs phy 121 * @phy_initialized: if PHY has been initialized correctly 143 struct device *dev = hsphy->dev; in qcom_snps_hsphy_clk_init() 145 hsphy->num_clks = 2; in qcom_snps_hsphy_clk_init() 146 hsphy->clks = devm_kcalloc(dev, hsphy->num_clks, sizeof(*hsphy->clks), GFP_KERNEL); in qcom_snps_hsphy_clk_init() 147 if (!hsphy->clks) in qcom_snps_hsphy_clk_init() 148 return -ENOMEM; in qcom_snps_hsphy_clk_init() [all …]
|
/linux/Documentation/devicetree/bindings/clock/ |
H A D | renesas,rcar-usb2-clock-sel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car USB 2.0 clock selector 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 13 If you connect an external clock to the USB_EXTAL pin only, you should set 15 If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module 19 Case 1: An external clock connects to R-Car SoC 20 +----------+ +--- R-Car ---------------------+ [all …]
|
/linux/drivers/usb/host/ |
H A D | ehci-xilinx-of.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * EHCI HCD (Host Controller Driver) for USB. 9 * Based on "ehci-ppc-of.c" by Valentine Barshak <vbarshak@ru.mvista.com> 10 * and "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de> 11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com> 23 * ehci_xilinx_port_handed_over - hand the port out if failed to enable it 27 * This function is used as a place to tell the user that the Xilinx USB host 28 * controller does support LS devices. And in an HS only configuration, it 34 * the USB bus. In those cases, the messages printed here are not helpful. 40 dev_warn(hcd->self.controller, "port %d cannot be enabled\n", portnum); in ehci_xilinx_port_handed_over() [all …]
|
H A D | octeon-hcd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights 41 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 104 * This register can be used to configure the core after power-on or a change in 105 * mode of operation. This register mainly contains AHB system-related 106 * configuration parameters. The AHB is the processor interface to the O2P USB 110 * The application must program this register as part of the O2P USB core 126 * @nptxfemplvl: Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl) 128 * Indicates when the Non-Periodic TxFIFO Empty Interrupt bit in 131 * * 1'b0: GINTSTS.NPTxFEmp interrupt indicates that the Non- [all …]
|
/linux/drivers/usb/cdns3/ |
H A D | cdns3-gadget.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Copyright (C) 2018-2019 Cadence. 6 * Copyright (C) 2017-2018 NXP 14 #include <linux/usb/gadget.h> 15 #include <linux/dma-direction.h> 18 * USBSS-DEV register interface. 23 * struct cdns3_usb_regs - device controller registers. 29 * @usb_ien: USB Interrupt Enable. 30 * @usb_ists: USB Interrupt Status. 53 * @buf_addr: Address for On-chip Buffer operations. [all …]
|
H A D | Kconfig | 2 tristate "Cadence USB Support" 3 depends on USB_SUPPORT && (USB || USB_GADGET) && HAS_DMA 4 select USB_XHCI_PLATFORM if USB_XHCI_HCD 7 Say Y here if your system has a Cadence USBSS or USBSSP 8 dual-role controller. 9 It supports: dual-role switch, Host-only, and Peripheral-only. 14 if USB_CDNS_SUPPORT 17 tristate "Cadence USB3 Dual-Role Controller" 20 Say Y here if your system has a Cadence USB3 dual-role controller. 21 It supports: dual-role switch, Host-only, and Peripheral-only. [all …]
|
/linux/Documentation/devicetree/bindings/connector/ |
H A D | usb-connector.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: USB Connector 10 - Rob Herring <robh@kernel.org> 13 A USB connector node represents a physical USB connector. It should be a child 14 of a USB interface controller or a separate node when it is attached to both 15 MUX and USB interface controller. 20 - enum: [all …]
|
/linux/Documentation/devicetree/bindings/usb/ |
H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 26 - mediatek,mt8183-mtu3 [all …]
|
H A D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SuperSpeed DWC3 USB SoC controller 10 - Wesley Cheng <quic_wcheng@quicinc.com> 15 - enum: 16 - qcom,ipq4019-dwc3 17 - qcom,ipq5018-dwc3 18 - qcom,ipq5332-dwc3 [all …]
|
/linux/drivers/usb/gadget/ |
H A D | config.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * usb/gadget/config.c -- simplify building config descriptors 16 #include <linux/usb/ch9.h> 17 #include <linux/usb/gadget.h> 18 #include <linux/usb/composite.h> 19 #include <linux/usb/otg.h> 22 * usb_descriptor_fillbuf - fill buffer with descriptors 28 * negative error code if they can't all be copied. Useful when 39 if (!src) in usb_descriptor_fillbuf() 40 return -EINVAL; in usb_descriptor_fillbuf() [all …]
|
/linux/drivers/usb/gadget/legacy/ |
H A D | audio.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * audio.c -- Audio gadget driver 13 #include <linux/usb/composite.h> 15 #define DRIVER_DESC "Linux USB Audio Gadget" 23 /* Playback(USB-IN) Default Stereo - Fl/Fr */ 39 /* Playback bInterval for HS/SS (1-4: fixed, 0: auto) */ 43 "Playback bInterval for HS/SS (1-4: fixed, 0: auto)"); 45 /* Capture(USB-OUT) Default Stereo - Fl/Fr */ 61 /* capture bInterval for HS/SS (1-4: fixed, 0: auto) */ 65 "Capture bInterval for HS/SS (1-4: fixed, 0: auto)"); [all …]
|
/linux/Documentation/devicetree/bindings/mfd/ |
H A D | omap-usb-host.txt | 1 OMAP HS USB Host 5 - compatible: should be "ti,usbhs-host" 6 - reg: should contain one register range i.e. start and length 7 - ti,hwmods: must contain "usb_host_hs" 11 - num-ports: number of USB ports. Usually this is automatically detected 15 - portN-mode: String specifying the port mode for port N, where N can be 16 from 1 to 3. If the port mode is not specified, that port is treated 18 "ehci-phy", 19 "ehci-tll", 20 "ehci-hsic", [all …]
|
/linux/drivers/usb/dwc2/ |
H A D | pci.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * pci.c - DesignWare HS OTG Controller PCI driver 5 * Copyright (C) 2004-2013 Synopsys, Inc. 20 #include <linux/usb.h> 22 #include <linux/usb/hcd.h> 23 #include <linux/usb/ch11.h> 25 #include <linux/usb/usb_phy_generic.h> 29 static const char dwc2_driver_name[] = "dwc2-pci"; 37 * dwc2_pci_remove() - Provides the cleanup entry points for the DWC_otg PCI 46 platform_device_unregister(glue->dwc2); in dwc2_pci_remove() [all …]
|
H A D | gadget.c | 1 // SPDX-License-Identifier: GPL-2.0 11 * S3C USB2.0 High-speed / OtG driver 19 #include <linux/dma-mapping.h> 26 #include <linux/usb/ch9.h> 27 #include <linux/usb/gadget.h> 28 #include <linux/usb/phy.h> 29 #include <linux/usb/composite.h> 64 if (dir_in) in index_to_ep() 65 return hsotg->eps_in[ep_index]; in index_to_ep() 67 return hsotg->eps_out[ep_index]; in index_to_ep() [all …]
|
/linux/Documentation/devicetree/bindings/arm/ |
H A D | qcom-soc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/qcom-soc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 15 qcom,SoC-IP 18 qcom,sdm845-llcc-bwmon 21 existing binding, even if it contradicts the above. 26 pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$" 28 - compatible [all …]
|
/linux/drivers/usb/dwc3/ |
H A D | dwc3-qcom.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Inspired by dwc3-of-simple.c 20 #include <linux/usb/of.h> 23 #include <linux/usb/hcd.h> 24 #include <linux/usb.h> 27 /* USB QSCRATCH Hardware registers */ 121 if (enable) { in dwc3_qcom_vbus_override_enable() 122 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() 124 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() 127 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_override_enable() [all …]
|
/linux/drivers/usb/gadget/udc/ |
H A D | amd5536udc_pci.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * amd5536udc_pci.c -- AMD 5536 UDC high/full speed USB device controller 5 * Copyright (C) 2005-2007 AMD (https://www.amd.com) 11 * It is a USB Highspeed DMA capable USB device controller. Beside ep0 it 18 * UDC DMA requires 32-bit aligned buffers so DMA with gadget ether does not 26 * Synopsys device controller IP (different than HS OTG IP) in UDCs 32 #define UDC_MOD_DESCRIPTION "AMD 5536 UDC - USB Device Controller" 52 static const char name[] = "amd5536udc-pci"; 61 usb_del_gadget_udc(&udc->gadget); in udc_pci_remove() 63 if (WARN_ON(dev->driver)) in udc_pci_remove() [all …]
|
/linux/drivers/net/can/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 10 to 8Mbit/s for the more recent CAN with Flexible Data-Rate 11 (CAN-FD). The CAN bus was originally mainly for automotive, but is now 16 This section contains all the CAN(-FD) device drivers including the 17 virtual ones. If you own such devices or plan to use the virtual CAN 21 can-dev. 23 if CAN_DEV 31 This driver can also be built as a module. If so, the module 49 This driver can also be built as a module. If so, the module 62 can-dev module. [all …]
|