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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#
17 include/dt-bindings/clock/qcom,gpucc-sdm845.h
18 include/dt-bindings/clock/qcom,gpucc-sa8775p.h
19 include/dt-bindings/clock/qcom,gpucc-sc7180.h
20 include/dt-bindings/clock/qcom,gpucc-sc7280.h
21 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h
22 include/dt-bindings/clock/qcom,gpucc-sm6350.h
23 include/dt-bindings/clock/qcom,gpucc-sm8150.h
24 include/dt-bindings/clock/qcom,gpucc-sm8250.h
25 include/dt-bindings/clock/qcom,gpucc-sm8350.h
[all …]
H A Dqcom,sm8450-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
17 include/dt-bindings/clock/qcom,sar2130p-gpucc.h
18 include/dt-bindings/clock/qcom,sm4450-gpucc.h
19 include/dt-bindings/clock/qcom,sm8450-gpucc.h
20 include/dt-bindings/clock/qcom,sm8550-gpucc.h
21 include/dt-bindings/reset/qcom,sm8450-gpucc.h
22 include/dt-bindings/reset/qcom,sm8650-gpucc.h
23 include/dt-bindings/reset/qcom,x1e80100-gpucc.h
28 - qcom,sar2130p-gpucc
29 - qcom,sm4450-gpucc
[all …]
H A Dqcom,gpucc-sdm660.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
16 See also dt-bindings/clock/qcom,gpucc-sdm660.h.
21 - qcom,gpucc-sdm630
22 - qcom,gpucc-sdm660
53 compatible = "qcom,gpucc-sdm660";
H A Dqcom,msm8998-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h
20 const: qcom,msm8998-gpucc
48 compatible = "qcom,msm8998-gpucc";
H A Dqcom,sm6125-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h
21 - qcom,sm6125-gpucc
56 compatible = "qcom,sm6125-gpucc";
H A Dqcom,sm6115-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
21 - qcom,sm6115-gpucc
48 compatible = "qcom,sm6115-gpucc";
H A Dqcom,qcm2290-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,qcm2290-gpucc.yaml#
17 include/dt-bindings/clock/qcom,qcm2290-gpucc.h
21 const: qcom,qcm2290-gpucc
64 compatible = "qcom,qcm2290-gpucc";
H A Dqcom,sm6375-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
16 See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
21 - qcom,sm6375-gpucc
62 compatible = "qcom,sm6375-gpucc";
/linux/drivers/clk/qcom/
H A DMakefile27 obj-$(CONFIG_CLK_X1E80100_GPUCC) += gpucc-x1e80100.o
29 obj-$(CONFIG_CLK_QCM2290_GPUCC) += gpucc-qcm2290.o
57 obj-$(CONFIG_MSM_GPUCC_8998) += gpucc-msm8998.o
88 obj-$(CONFIG_SA_GPUCC_8775P) += gpucc-sa8775p.o
91 obj-$(CONFIG_SAR_GPUCC_2130P) += gpucc-sar2130p.o
96 obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o
97 obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o
98 obj-$(CONFIG_SC_GPUCC_8280XP) += gpucc-sc8280xp.o
109 obj-$(CONFIG_SDM_GPUCC_660) += gpucc-sdm660.o
111 obj-$(CONFIG_SDM_GPUCC_845) += gpucc-sdm845.o
[all …]
H A Dgpucc-sm8150.c11 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
288 { .compatible = "qcom,sc8180x-gpucc" },
289 { .compatible = "qcom,sm8150-gpucc" },
302 if (of_device_is_compatible(pdev->dev.of_node, "qcom,sc8180x-gpucc")) in gpu_cc_sm8150_probe()
313 .name = "sm8150-gpucc",
320 MODULE_DESCRIPTION("QTI GPUCC SM8150 Driver");
H A Dgpucc-sdm845.c11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
170 { .compatible = "qcom,sdm845-gpucc" },
201 .name = "sdm845-gpucc",
208 MODULE_DESCRIPTION("QTI GPUCC SDM845 Driver");
H A Dgpucc-sdm660.c18 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
301 { .compatible = "qcom,gpucc-sdm660" },
302 { .compatible = "qcom,gpucc-sdm630" },
339 .name = "gpucc-sdm660",
345 MODULE_DESCRIPTION("Qualcomm SDM630/SDM660 GPUCC Driver");
H A Dgpucc-sm8450.c12 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
13 #include <dt-bindings/reset/qcom,sm8450-gpucc.h>
766 { .compatible = "qcom,sm8450-gpucc" },
767 { .compatible = "qcom,sm8475-gpucc" },
780 if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8475-gpucc")) { in gpu_cc_sm8450_probe()
781 /* Update GPUCC PLL0 */ in gpu_cc_sm8450_probe()
784 /* Update GPUCC PLL1 */ in gpu_cc_sm8450_probe()
800 .name = "sm8450-gpucc",
H A Dgpucc-msm8998.c16 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
319 { .compatible = "qcom,msm8998-gpucc" },
343 .name = "gpucc-msm8998",
349 MODULE_DESCRIPTION("QCOM GPUCC MSM8998 Driver");
H A Dgpucc-sm6125.c13 #include <dt-bindings/clock/qcom,sm6125-gpucc.h>
389 { .compatible = "qcom,sm6125-gpucc" },
418 .name = "gpucc-sm6125",
424 MODULE_DESCRIPTION("QTI GPUCC SM6125 Driver");
H A Dgpucc-sc7180.c11 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
212 { .compatible = "qcom,sc7180-gpucc" },
250 .name = "sc7180-gpucc",
H A Dgpucc-sm6375.c14 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
431 { .compatible = "qcom,sm6375-gpucc" },
467 .name = "gpucc-sm6375",
473 MODULE_DESCRIPTION("QTI GPUCC SM6375 Driver");
H A Dgpucc-sm8250.c11 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
298 { .compatible = "qcom,sm8250-gpucc" },
329 .name = "sm8250-gpucc",
H A Dgpucc-qcm2290.c15 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h>
365 { .compatible = "qcom,qcm2290-gpucc" },
416 .name = "gpucc-qcm2290",
H A Dgpucc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
14 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
634 { .compatible = "qcom,sm8650-gpucc" },
656 .name = "sm8650-gpucc",
H A Dgpucc-x1e80100.c12 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
13 #include <dt-bindings/reset/qcom,x1e80100-gpucc.h>
624 { .compatible = "qcom,x1e80100-gpucc" },
649 .name = "gpucc-x1e80100",
H A Dgpucc-sm6350.c12 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
482 { .compatible = "qcom,sm6350-gpucc" },
511 .name = "sm6350-gpucc",
H A Dgpucc-sm6115.c13 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
468 { .compatible = "qcom,sm6115-gpucc" },
497 .name = "sm6115-gpucc",
H A Dgpucc-sar2130p.c13 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h>
14 #include <dt-bindings/reset/qcom,sar2130p-gpucc.h>
469 { .compatible = "qcom,sar2130p-gpucc" },
/linux/Documentation/devicetree/bindings/arm/
H A Dqcom-soc.yaml47 - qcom,gpucc-sdm630
48 - qcom,gpucc-sdm660

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