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/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-runbmc-olympus.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi"
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/gpio/gpio.h>
43 stdout-path = &serial3;
50 iio-hwmon {
51 compatible = "iio-hwmon";
52 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-lenovo-hr630.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-msc-sm2s-14N0600E.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include "imx8mp-msc-sm2s.dtsi"
33 gbe0-int-hog {
34 gpio-hog;
39 gbe1-int-hog {
40 gpio-hog;
45 cam2-rst-hog {
46 gpio-hog;
47 output-high;
[all …]
H A Dimx943-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2024-2025 NXP
6 /dts-v1/;
11 compatible = "fsl,imx943-evk", "fsl,imx94";
23 bt_sco_codec: bt-sco-codec {
24 compatible = "linux,bt-sco";
25 #sound-dai-cells = <1>;
29 stdout-path = &lpuart1;
33 compatible = "dmic-codec";
34 #sound-dai-cells = <0>;
[all …]
H A Dimx8mn-var-som-symphony.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2019-2020 Variscite Ltd.
9 /dts-v1/;
11 #include <dt-bindings/usb/pd.h>
12 #include "imx8mn-var-som.dtsi"
15 model = "Variscite VAR-SOM-MX8MN Symphony evaluation board";
16 compatible = "variscite,var-som-mx8mn-symphony", "variscite,var-som-mx8mn", "fsl,imx8mn";
18 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
[all …]
H A Dimx8mm-var-som-symphony.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx8mm-var-som.dtsi"
11 model = "Variscite VAR-SOM-MX8MM Symphony evaluation board";
12 compatible = "variscite,var-som-mx8mm-symphony", "variscite,var-som-mx8mm", "fsl,imx8mm";
14 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
15 compatible = "regulator-fixed";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
18 regulator-name = "VSD_3V3";
[all …]
H A Dimx8mm-venice-gw72xx-0x-rs422.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
/linux/Documentation/admin-guide/gpio/
H A Dgpio-sim.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
3 Configfs GPIO Simulator
6 The configfs GPIO Simulator (gpio-sim) provides a way to create simulated GPIO
8 using the standard GPIO character device interface as well as manipulated
12 ------------------------
14 The gpio-sim module registers a configfs subsystem called ``'gpio-sim'``. For
21 **Group:** ``/config/gpio-sim``
23 This is the top directory of the gpio-sim configfs tree.
25 **Group:** ``/config/gpio-sim/gpio-device``
27 **Attribute:** ``/config/gpio-sim/gpio-device/dev_name``
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
8 #include <dt-bindings/gpio/gpio.h>
9 #include "rzg2ul-smarc-pinfunction.dtsi"
10 #include "rz-smarc-common.dtsi"
14 /delete-property/ pinctrl-0;
15 /delete-property/ pinctrl-names;
21 sound-dai = <&ssi1>;
25 clock-frequency = <400000>;
30 gpio-controller;
[all …]
H A Drzg2ul-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
21 can0-stb-hog {
22 gpio-hog;
24 output-low;
25 line-name = "can0_stb";
35 can1-stb-hog {
[all …]
H A Drzg3s-smarc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ SMARC Carrier-II Board.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
23 stdout-path = "serial3:115200n8";
27 compatible = "gpio-keys";
29 key-1 {
30 interrupts-extended = <&pinctrl RZG2L_GPIO(18, 0) IRQ_TYPE_EDGE_FALLING>;
33 wakeup-source;
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-388-clearfog.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "armada-388.dtsi"
9 #include "armada-38x-solidrun-microsom.dtsi"
13 /* So that mvebu u-boot can update the MAC addresses */
20 stdout-path = "serial0:115200n8";
23 reg_3p3v: regulator-3p3v {
24 compatible = "regulator-fixed";
25 regulator-name = "3P3V";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d-colibri-iris-v2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
7 #include "imx7d-colibri.dtsi"
8 #include "imx7-colibri-iris-v2.dtsi"
12 compatible = "toradex,colibri-imx7d-iris-v2",
13 "toradex,colibri-imx7d",
33 lvds-color-map-hog {
34 gpio-hog;
36 line-name = "LVDS_COLOR_MAP";
37 output-low;
[all …]
H A Dimx7s-colibri-iris-v2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
7 #include "imx7s-colibri.dtsi"
8 #include "imx7-colibri-iris-v2.dtsi"
12 compatible = "toradex,colibri-imx7s-iris-v2",
13 "toradex,colibri-imx7s",
33 lvds-color-map-hog {
34 gpio-hog;
36 line-name = "LVDS_COLOR_MAP";
37 output-low;
[all …]
H A Dimx6ull-colibri-wifi-iris-v2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2018-2022 Toradex
6 /dts-v1/;
8 #include "imx6ull-colibri-wifi.dtsi"
9 #include "imx6ull-colibri-iris-v2.dtsi"
13 compatible = "toradex,colibri-imx6ull-wifi-iris-v2",
14 "toradex,colibri-imx6ull-wifi",
32 lvds-power-on-hog {
33 gpio-hog;
35 line-name = "LVDS_POWER_ON";
[all …]
H A Dimx6ull-colibri-iris-v2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2018-2022 Toradex
6 /dts-v1/;
8 #include "imx6ull-colibri-nonwifi.dtsi"
9 #include "imx6ull-colibri-iris-v2.dtsi"
13 compatible = "toradex,colibri-imx6ull-iris-v2",
14 "toradex,colibri-imx6ull",
32 lvds-power-on-hog {
33 gpio-hog;
35 line-name = "LVDS_POWER_ON";
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Ddlg,da9063.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steve Twiss <stwiss.opensource@diasemi.com>
13 For device-tree bindings of other sub-modules refer to the binding documents
14 under the respective sub-system directories.
15 Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special
21 - https://www.dialog-semiconductor.com/products/da9063l
22 - https://www.dialog-semiconductor.com/products/da9063
23 - https://www.dialog-semiconductor.com/products/da9062
[all …]
/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-lego-ev3.dts1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/pwm/pwm.h>
32 compatible = "gpio-keys";
34 pinctrl-names = "default";
35 pinctrl-0 = <&button_bias>;
40 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
46 gpios = <&gpio 102 GPIO_ACTIVE_HIGH>;
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Dcn9131-cf-solidwan.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
29 #include "armada-cp115.dtsi"
41 compatible = "solidrun,cn9131-solidwan",
42 "solidrun,cn9130-sr-som", "marvell,cn9130";
67 compatible = "gpio-leds";
[all …]
H A Dcn9130-cf.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
19 reg_usb3_vbus0: regulator-usb3-vbus0 {
20 compatible = "regulator-fixed";
21 regulator-name = "vbus0";
22 regulator-min-microvolt = <5000000>;
23 regulator-max-microvolt = <5000000>;
29 i2c-bus = <&cp0_i2c1>;
30 los-gpios = <&expander0 12 GPIO_ACTIVE_HIGH>;
31 mod-def0-gpios = <&expander0 15 GPIO_ACTIVE_LOW>;
[all …]
H A Dcn9130-cf-base.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
16 #include "cn9130-cf.dtsi"
20 compatible = "solidrun,cn9130-clearfog-base",
21 "solidrun,cn9130-sr-som", "marvell,cn9130";
23 gpio-keys {
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,r9a09g077-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,r9a09g077-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/T2H and RZ/N2H Pin and GPIO controller
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
13 The Renesas RZ/T2H and RZ/N2H SoCs feature a combined Pin and GPIO controller.
14 Pin multiplexing and GPIO configuration are performed on a per-pin basis.
15 Each port supports up to 8 pins, each configurable for either GPIO (port mode)
22 - renesas,r9a09g077-pinctrl # RZ/T2H
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am642-hummingboard-t.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
5 * DTS for SolidRun AM642 HummingBoard-T,
10 /dts-v1/;
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-am642.dtsi"
16 #include "k3-am642-sr-som.dtsi"
19 model = "SolidRun AM642 HummingBoard-T";
20 compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642";
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dti,omap-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OMAP GPIO controller
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
[all …]
H A Dgpio-pca95xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA95xx I2C GPIO multiplexer
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 Bindings for the family of I2C GPIO multiplexers/expanders: NXP PCA95xx,
19 - items:
20 - const: toradex,ecgpiol16
21 - const: nxp,pcal6416
[all …]

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