xref: /linux/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t.dts (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
 *
 * DTS for SolidRun AM642 HummingBoard-T,
 * running on Cortex A53.
 *
 */

/dts-v1/;

#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy.h>

#include "k3-am642.dtsi"
#include "k3-am642-sr-som.dtsi"

/ {
	model = "SolidRun AM642 HummingBoard-T";
	compatible = "solidrun,am642-hummingboard-t", "solidrun,am642-sr-som", "ti,am642";

	aliases {
		serial5 = &main_uart3;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&leds_default_pins>;

		/* D24 */
		led1: led-1 {
			label = "led1";
			gpios = <&main_gpio0 29 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
		};

		/* D25 */
		led2: led-2 {
			label = "led2";
			gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
		};

		/* D26 */
		led3: led-3 {
			label = "led3";
			gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
		};
	};

	regulator-m2-3v3 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&regulator_pcie_3v3_default_pins>;
		regulator-name = "m2-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&main_gpio1 17 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
	};

	regulator-vpp-1v8 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&regulator_vpp_1v8_default_pins>;
		regulator-name = "vpp-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&main_gpio1 78 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	serdes_mux: mux-controller {
		compatible = "gpio-mux";
		pinctrl-names = "default";
		pinctrl-0 = <&serdes_mux_default_pins>;
		#mux-control-cells = <0>;
		/*
		 * Mux has 2 IOs:
		 * - select: 0 = USB-3 (M2); 1 = PCIE (M1)
		 * - shutdown: 0 = active; 1 = disabled (high impedance)
		 */
		mux-gpios = <&main_gpio1 40 GPIO_ACTIVE_HIGH>, <&main_gpio1 41 GPIO_ACTIVE_HIGH>;
		/* default disabled */
		idle-state = <2>;
	};
};

&main_gpio0 {
	m2-reset-hog {
		gpio-hog;
		gpios = <12 GPIO_ACTIVE_LOW>;
		output-low; /* deasserted */
		line-name = "m2-reset";
	};

	m1-m2-w-disable1-hog {
		gpio-hog;
		gpios = <32 GPIO_ACTIVE_LOW>;
		output-low; /* deasserted */
		line-name = "m1-m2-pcie-w-disable1";
	};

	m1-m2-w-disable2-hog {
		gpio-hog;
		gpios = <34 GPIO_ACTIVE_LOW>;
		output-low; /* deasserted */
		line-name = "m1-m2-pcie-w-disable2";
	};
};

&main_gpio1 {
	m1-pcie-clkreq0-hog {
		gpio-hog;
		gpios = <11 GPIO_ACTIVE_LOW>;
		input;
		line-name = "m1-pcie-clkreq0";
	};

	m2-pcie-clkreq-hog {
		gpio-hog;
		gpios = <35 GPIO_ACTIVE_LOW>;
		input;
		line-name = "m2-pcie-clkreq";
	};
};

&main_i2c0 {
	pinctrl-0 = <&main_i2c0_default_pins>, <&main_i2c0_int_default_pins>;

	humidity-sensor@41 {
		compatible = "ti,hdc2010";
		reg = <0x41>;
		interrupt-parent = <&main_gpio0>;
		interrupts = <37 IRQ_TYPE_EDGE_FALLING>;
	};

	light-sensor@44 {
		compatible = "ti,opt3001";
		reg = <0x44>;
		interrupt-parent = <&main_gpio0>;
		interrupts = <37 IRQ_TYPE_EDGE_FALLING>;
	};

	/* charger@6a */
};

&main_i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_default_pins>;
	status = "okay";

	rtc@69 {
		compatible = "abracon,abx80x";
		reg = <0x69>;
		pinctrl-names = "default";
		pinctrl-0 = <&rtc_int_default_pins>;
		abracon,tc-diode = "schottky";
		abracon,tc-resistor = <3>;
		interrupt-parent = <&main_gpio0>;
		interrupts = <44 IRQ_TYPE_EDGE_FALLING>;
	};
};

&main_mcan0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan0_default_pins>;
	status = "okay";

	can-transceiver {
		max-bitrate = <8000000>;
	};
};

&main_mcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mcan1_default_pins>;
	status = "okay";

	can-transceiver {
		max-bitrate = <8000000>;
	};
};

&main_pmx0 {
	leds_default_pins: leds-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0074, PIN_OUTPUT, 7) /* GPMC0_AD14.GPIO0_29 */
			AM64X_IOPAD(0x0078, PIN_OUTPUT, 7) /* GPMC0_AD15.GPIO0_30 */
			AM64X_IOPAD(0x0088, PIN_OUTPUT, 7) /* GPMC0_OEn_REn.GPIO0_33 */
		>;
	};

	main_i2c0_int_default_pins: main-i2c0-int-default-pins {
		pinctrl-single,pins = <
			/* external pull-up on Carrier */
			AM64X_IOPAD(0x0098, PIN_INPUT, 7) /* GPMC0_WAIT0.GPIO0_37 */
		>;
	};

	main_i2c1_default_pins: main-i2c1-default-pins {
		pinctrl-single,pins = <
			/* external pull-up on SoM */
			AM64X_IOPAD(0x0268, PIN_INPUT, 0) /* I2C1_SCL.I2C1_SCL */
			AM64X_IOPAD(0x026c, PIN_INPUT, 0) /* I2C1_SDA.I2C1_SDA */
		>;
	};

	main_mcan0_default_pins: main-mcan0-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* MCAN0_RX.MCAN0_RX */
			AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* MCAN0_TX.MCAN0_TX */
		>;
	};

	main_mcan1_default_pins: main-mcan1-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* MCAN1_RX.MCAN1_RX */
			AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* MCAN1_TX.MCAN1_TX */
		>;
	};

	main_uart3_default_pins: main-uart3-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x016c, PIN_INPUT, 10) /* PRG0_PRU0_GPO3.UART3_CTSn */
			AM64X_IOPAD(0x0170, PIN_OUTPUT, 10) /* PRG0_PRU0_GPO4.UART3_TXD */
			AM64X_IOPAD(0x0174, PIN_OUTPUT, 10) /* PRG0_PRU0_GPO5.UART3_RTSn */
			AM64X_IOPAD(0x01ac, PIN_INPUT, 10) /* PRG0_PRU0_GPO19.UART3_RXD */
		>;
	};

	pcie0_default_pins: pcie0-default-pins {
		pinctrl-single,pins = <
			/* connector M2 RESET */
			AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* OSPI0_CSn1.GPIO0_12 */
			/* connectors M1 & M2 W_DISABLE1 */
			AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) /* GPMC0_ADVN_ALE.GPIO0_32 */
			/* connectors M1 & M2 W_DISABLE2 */
			AM64X_IOPAD(0x008c, PIN_OUTPUT, 7) /* GPMC0_WEN.GPIO0_34 */
			/* connectors M1 & M2 PERST0 (PCI Reset) */
			AM64X_IOPAD(0x019c, PIN_OUTPUT, 7) /* PRG0_PRU0_GPO15.GPIO1_15 */
			/* connector M1 CLKREQ0 */
			AM64X_IOPAD(0x018c, PIN_INPUT, 7) /* PRG0_PRU0_GPO11.GPIO1_11 */
			/* connector M2 CLKREQ0 */
			AM64X_IOPAD(0x01ec, PIN_INPUT, 7) /* PRG0_PRU1_GPO15.GPIO1_35 */
		>;
	};

	regulator_pcie_3v3_default_pins: regulator-pcie-3v3-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x01a4, PIN_OUTPUT, 7) /* PRG0_PRU0_GPO17.GPIO1_17 */
		>;
	};

	regulator_vpp_1v8_default_pins: regulator-vpp-1v8-default-pins {
		pinctrl-single,pins = <
			AM64X_IOPAD(0x029c, PIN_OUTPUT, 7) /* MMC1_SDWP.GPIO1_78 */
		>;
	};

	rtc_int_default_pins: rtc-int-default-pins {
		pinctrl-single,pins = <
			/* external pull-up on Carrier */
			AM64X_IOPAD(0x00b4, PIN_INPUT, 7) /* GPMC0_CSn3.GPIO0_44 */
		>;
	};

	serdes_mux_default_pins: serdes-mux-default-pins {
		pinctrl-single,pins = <
			/* SEL, 10k pull-down on carrier, 2.2k pullup on SoM */
			AM64X_IOPAD(0x0200, PIN_OUTPUT, 7) /* PRG0_MDIO0_MDIO.GPIO1_40 */
			/* EN */
			AM64X_IOPAD(0x0204, PIN_OUTPUT, 7) /* PRG0_MDIO0_MDC.GPIO1_41 */
		>;
	};
};

&main_uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart3_default_pins>;
	uart-has-rtscts;
	linux,rs485-enabled-at-boot-time;
	status = "okay";
};

&usb0 {
	dr_mode = "host";
};