1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 4 * 5 * DTS for common base of SolidRun CN9130 Clearfog Base and Pro. 6 * 7 */ 8 9/ { 10 aliases { 11 /* label nics same order as armada 388 clearfog */ 12 ethernet0 = &cp0_eth2; 13 ethernet1 = &cp0_eth1; 14 ethernet2 = &cp0_eth0; 15 i2c1 = &cp0_i2c1; 16 mmc1 = &cp0_sdhci0; 17 }; 18 19 reg_usb3_vbus0: regulator-usb3-vbus0 { 20 compatible = "regulator-fixed"; 21 regulator-name = "vbus0"; 22 regulator-min-microvolt = <5000000>; 23 regulator-max-microvolt = <5000000>; 24 gpios = <&expander0 6 GPIO_ACTIVE_LOW>; 25 }; 26 27 sfp: sfp { 28 compatible = "sff,sfp"; 29 i2c-bus = <&cp0_i2c1>; 30 los-gpios = <&expander0 12 GPIO_ACTIVE_HIGH>; 31 mod-def0-gpios = <&expander0 15 GPIO_ACTIVE_LOW>; 32 tx-disable-gpios = <&expander0 14 GPIO_ACTIVE_HIGH>; 33 tx-fault-gpios = <&expander0 13 GPIO_ACTIVE_HIGH>; 34 maximum-power-milliwatt = <2000>; 35 }; 36}; 37 38/* SRDS #2 - SFP+ 10GE */ 39&cp0_eth0 { 40 managed = "in-band-status"; 41 phys = <&cp0_comphy2 0>; 42 phy-mode = "10gbase-r"; 43 sfp = <&sfp>; 44 status = "okay"; 45}; 46 47&cp0_i2c0 { 48 expander0: gpio-expander@20 { 49 compatible = "nxp,pca9555"; 50 reg = <0x20>; 51 gpio-controller; 52 #gpio-cells = <2>; 53 pinctrl-0 = <&expander0_pins>; 54 pinctrl-names = "default"; 55 interrupt-parent = <&cp0_gpio1>; 56 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 57 58 /* CON3 */ 59 pcie2-0-clkreq-hog { 60 gpio-hog; 61 gpios = <0 GPIO_ACTIVE_LOW>; 62 input; 63 line-name = "pcie2.0-clkreq"; 64 }; 65 66 /* CON3 */ 67 pcie2-0-w-disable-hog { 68 gpio-hog; 69 gpios = <3 GPIO_ACTIVE_LOW>; 70 output-low; 71 line-name = "pcie2.0-w-disable"; 72 }; 73 74 usb3-ilimit-hog { 75 gpio-hog; 76 gpios = <5 GPIO_ACTIVE_LOW>; 77 input; 78 line-name = "usb3-current-limit"; 79 }; 80 81 m2-devslp-hog { 82 gpio-hog; 83 gpios = <11 GPIO_ACTIVE_HIGH>; 84 output-low; 85 line-name = "m.2 devslp"; 86 }; 87 }; 88 89 /* The MCP3021 supports standard and fast modes */ 90 adc@4c { 91 compatible = "microchip,mcp3021"; 92 reg = <0x4c>; 93 }; 94 95 carrier_eeprom: eeprom@52 { 96 compatible = "atmel,24c02"; 97 reg = <0x52>; 98 pagesize = <8>; 99 }; 100}; 101 102&cp0_i2c1 { 103 /* 104 * Routed to SFP, M.2, mikrobus, and miniPCIe 105 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with 106 * address pins tied low, which takes addresses 0x50 and 0x51. 107 * Mikrobus doesn't specify beyond an I2C bus being present. 108 * PCIe uses ARP to assign addresses, or 0x63-0x64. 109 */ 110 clock-frequency = <100000>; 111 pinctrl-0 = <&cp0_i2c1_pins>; 112 pinctrl-names = "default"; 113 status = "okay"; 114}; 115 116/* SRDS #5 - miniPCIe (CON3) */ 117&cp0_pcie2 { 118 num-lanes = <1>; 119 phys = <&cp0_comphy5 2>; 120 /* dw-pcie inverts internally */ 121 reset-gpios = <&expander0 1 GPIO_ACTIVE_HIGH>; 122 status = "okay"; 123}; 124 125&cp0_pinctrl { 126 cp0_i2c1_pins: cp0-i2c1-pins { 127 marvell,pins = "mpp35", "mpp36"; 128 marvell,function = "i2c1"; 129 }; 130 131 cp0_mmc0_pins: cp0-mmc0-pins { 132 marvell,pins = "mpp43", "mpp56", "mpp57", "mpp58", 133 "mpp59", "mpp60", "mpp61"; 134 marvell,function = "sdio"; 135 }; 136 137 mikro_spi_pins: cp0-spi1-cs1-pins { 138 marvell,pins = "mpp12"; 139 marvell,function = "spi1"; 140 }; 141 142 mikro_uart_pins: cp0-uart-pins { 143 marvell,pins = "mpp2", "mpp3"; 144 marvell,function = "uart1"; 145 }; 146 147 expander0_pins: cp0-expander0-pins { 148 marvell,pins = "mpp4"; 149 marvell,function = "gpio"; 150 }; 151}; 152 153/* SRDS #0 - SATA on M.2 connector */ 154&cp0_sata0 { 155 phys = <&cp0_comphy0 1>; 156 status = "okay"; 157 158 /* only port 1 is available */ 159 /delete-node/ sata-port@0; 160}; 161 162/* microSD */ 163&cp0_sdhci0 { 164 pinctrl-0 = <&cp0_mmc0_pins>; 165 pinctrl-names = "default"; 166 bus-width = <4>; 167 no-1-8-v; 168 status = "okay"; 169}; 170 171&cp0_spi1 { 172 /* CS1 for mikrobus */ 173 pinctrl-0 = <&cp0_spi1_pins &mikro_spi_pins>; 174}; 175 176/* 177 * SRDS #1 - USB-3.0 Host on Type-A connector 178 * USB-2.0 Host on mPCI-e connector (CON3) 179 */ 180&cp0_usb3_0 { 181 phys = <&cp0_comphy1 0>, <&cp0_utmi0>; 182 phy-names = "comphy", "utmi"; 183 vbus-supply = <®_usb3_vbus0>; 184 dr_mode = "host"; 185 status = "okay"; 186}; 187 188&cp0_utmi { 189 status = "okay"; 190}; 191 192/* mikrobus uart */ 193&cp0_uart0 { 194 pinctrl-0 = <&mikro_uart_pins>; 195 pinctrl-names = "default"; 196 status = "okay"; 197}; 198