1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include "rk3588-rock-5b.dtsi" 6 7/ { 8 model = "Radxa ROCK 5B+"; 9 compatible = "radxa,rock-5b-plus", "rockchip,rk3588"; 10 11 rfkill-wwan { 12 compatible = "rfkill-gpio"; 13 label = "rfkill-m2-wwan"; 14 radio-type = "wwan"; 15 shutdown-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; 16 }; 17 18 vcc3v3_4g: regulator-vcc3v3-4g { 19 compatible = "regulator-fixed"; 20 enable-active-high; 21 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 22 /* pinctrl for the GPIO is requested by vcc3v3_pcie2x1l0 */ 23 regulator-name = "vcc3v3_4g"; 24 regulator-always-on; 25 regulator-boot-on; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; 28 startup-delay-us = <50000>; 29 vin-supply = <&vcc5v0_sys>; 30 }; 31 32 vcc3v3_wwan_pwr: regulator-vcc3v3-wwan { 33 compatible = "regulator-fixed"; 34 enable-active-high; 35 gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&wwan_power_en>; 38 regulator-name = "vcc3v3_wwan_pwr"; 39 regulator-always-on; 40 regulator-boot-on; 41 regulator-min-microvolt = <3300000>; 42 regulator-max-microvolt = <3300000>; 43 vin-supply = <&vcc3v3_4g>; 44 }; 45}; 46 47&gpio0 { 48 wwan-disable2-n-hog { 49 gpios = <RK_PB2 GPIO_ACTIVE_LOW>; 50 output-low; 51 line-name = "M.2 B-key W_DISABLE2#"; 52 gpio-hog; 53 }; 54}; 55 56&gpio2 { 57 wwan-reset-n-hog { 58 gpios = <RK_PB3 GPIO_ACTIVE_LOW>; 59 output-low; 60 line-name = "M.2 B-key RESET#"; 61 gpio-hog; 62 }; 63 64 wwan-wake-n-hog { 65 gpios = <RK_PB2 GPIO_ACTIVE_LOW>; 66 input; 67 line-name = "M.2 B-key WoWWAN#"; 68 gpio-hog; 69 }; 70}; 71 72&pcie30phy { 73 data-lanes = <1 1 2 2>; 74}; 75 76&pcie3x2 { 77 pinctrl-names = "default"; 78 pinctrl-0 = <&pcie3x2_rst>; 79 reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 80 vpcie3v3-supply = <&vcc3v3_pcie30>; 81 status = "okay"; 82}; 83 84&pcie3x4 { 85 num-lanes = <2>; 86}; 87 88&pinctrl { 89 wwan { 90 wwan_power_en: wwan-pwr-en { 91 rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 92 }; 93 }; 94 95 pcie3 { 96 pcie3x2_rst: pcie3x2-rst { 97 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 98 }; 99 }; 100 101 usb { 102 vcc5v0_host_en: vcc5v0-host-en { 103 rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 104 }; 105 }; 106}; 107 108&vcc5v0_host { 109 enable-active-high; 110 gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&vcc5v0_host_en>; 113}; 114