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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sc7280-rpmh.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
17 See also:: include/dt-bindings/interconnect/qcom,sc7280.h
22 - qcom,sc7280-aggre1-noc
23 - qcom,sc7280-aggre2-noc
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H A Dqcom,osm-l3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,osm-l
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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SC7280 SoC PCIe root complex controller is based on the Synopsys
19 const: qcom,pcie-sc7280
25 reg-names:
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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sc7280-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 Display MDSS
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS are mentioned for SC7280.
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7280-mdss
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H A Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc7280-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SC7280
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SC7280.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sc7280.h
20 const: qcom,sc7280-dispcc
24 - description: Board XO source
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H A Dqcom,gcc-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SC7280
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SC7280.
16 See also:: include/dt-bindings/clock/qcom,gcc-sc7280.h
20 const: qcom,gcc-sc7280
24 - description: Board XO source
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H A Dqcom,sc7280-lpasscc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm LPASS Core Clock Controller on SC7280
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SC7280.
16 See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h
21 - qcom,sc7280-lpasscc
25 - description: gcc_cfg_noc_lpass_clk from GCC
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H A Dqcom,sc7280-camcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-camcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SC7280
10 - Taniya Das <quic_tdas@quicinc.com>
14 power domains on SC7280.
16 See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h
19 - $ref: qcom,gcc.yaml#
23 const: qcom,sc7280-camcc
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H A Dqcom,gpucc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
11 - Imran Shaik <quic_imrashai@quicinc.com>
18 include/dt-bindings/clock/qcom,gpucc-sdm845.h
19 include/dt-bindings/clock/qcom,gpucc-sa8775p.h
20 include/dt-bindings/clock/qcom,gpucc-sc7180.h
21 include/dt-bindings/clock/qcom,gpucc-sc7280.h
22 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h
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H A Dqcom,videocc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
17 include/dt-bindings/clock/qcom,videocc-sc7180.h
18 include/dt-bindings/clock/qcom,videocc-sc7280.h
19 include/dt-bindings/clock/qcom,videocc-sdm845.h
20 include/dt-bindings/clock/qcom,videocc-sm8150.h
21 include/dt-bindings/clock/qcom,videocc-sm8250.h
26 - qcom,sc7180-videocc
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 MSS Peripheral Image Loader
10 - Sibi Sankar <quic_sibis@quicinc.com>
14 on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
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H A Dqcom,sc7280-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 ADSP Peripheral Image Loader
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-herobrine-lte-sku.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 reserved-memory {
13 no-map;
16 mdata_mem: mpss-metadata {
17 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
19 no-map;
25 qcom,gsi-loader = "modem";
30 compatible = "qcom,sc7280-mss-pil";
32 reg-names = "qdsp6", "rmb";
34 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
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H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
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H A Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
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/linux/Documentation/devicetree/bindings/iommu/
H A Dqcom,tbu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Georgi Djakov <quic_c_gdjako@quicinc.com>
21 - qcom,sc7280-tbu
22 - qcom,sdm845-tbu
33 power-domains:
36 qcom,stream-id-range:
40 $ref: /schemas/types.yaml#/definitions/phandle-array
42 - items:
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/linux/Documentation/devicetree/bindings/spi/
H A Dqcom,spi-qcom-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - $ref: /schemas/spi/spi-controller.yaml#
22 - enum:
23 - qcom,sc7180-qspi
24 - qcom,sc7280-qspi
25 - qcom,sdm845-qspi
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/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43d
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
22 - qcom,ipq5332-qfprom
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/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Rohit kumar <quic_rohkumar@quicinc.com>
14 Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
16 is a module to configure Low-Power Audio Interface(LPAIF) core registers
22 - qcom,lpass-cpu
23 - qcom,apq8016-lpass-cpu
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/linux/drivers/clk/qcom/
H A Dgcc-sc7280.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-rcg.h"
19 #include "clk-regmap-divider.h"
20 #include "clk-regmap-mux.h"
21 #include "clk-regmap-phy-mux.h"
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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