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/linux/arch/arm/mach-pxa/
H A Dpxa2xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
5 * Taken from pxa-regs.h by Russell King
14 #include "pxa-regs.h"
23 #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */
24 #define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */
25 #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */
26 #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */
28 #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */
29 #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Ds32gxxxa-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
11 can0_pins: can0-pins {
12 can0-grp0 {
14 output-enable;
15 slew-rate = <133>;
18 can0-grp1 {
20 input-enable;
21 slew-rate = <133>;
24 can0-grp2 {
29 can2_pins: can2-pins {
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H A Ds32gxxxa-rdb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
11 can0_pins: can0-pins {
12 can0-grp0 {
14 output-enable;
15 slew-rate = <133>;
18 can0-grp1 {
20 input-enable;
21 slew-rate = <133>;
24 can0-grp2 {
29 can1_pins: can1-pins {
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/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
13 bool "GPIO Support"
15 This enables GPIO support through the generic GPIO library.
16 You only need to enable this if you also want to enable
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H A Dgpio-xilinx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx gpio driver for xps/axi_gpio IP.
5 * Copyright 2008 - 2013 Xilinx, Inc.
12 #include <linux/gpio/driver.h>
30 #define XGPIO_GIER_OFFSET 0x11c /* Global Interrupt Enable */
33 #define XGPIO_IPIER_OFFSET 0x128 /* IP Interrupt Enable */
35 /* Read/Write access to the GPIO register
131 xgpio_get(struct gpio_chip * gc,unsigned int gpio) xgpio_get() argument
151 xgpio_set(struct gpio_chip * gc,unsigned int gpio,int val) xgpio_set() argument
212 xgpio_dir_in(struct gpio_chip * gc,unsigned int gpio) xgpio_dir_in() argument
241 xgpio_dir_out(struct gpio_chip * gc,unsigned int gpio,int val) xgpio_dir_out() argument
291 struct xgpio_instance *gpio = dev_get_drvdata(dev); xgpio_suspend() local
332 struct xgpio_instance *gpio = dev_get_drvdata(dev); xgpio_resume() local
348 struct xgpio_instance *gpio = dev_get_drvdata(dev); xgpio_runtime_suspend() local
357 struct xgpio_instance *gpio = dev_get_drvdata(dev); xgpio_runtime_resume() local
377 unsigned long bit = find_nth_bit(chip->map, 64, irq_offset), enable; xgpio_irq_mask() local
405 unsigned long bit = find_nth_bit(chip->map, 64, irq_offset), enable; xgpio_irq_unmask() local
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/linux/arch/arm/boot/dts/st/
H A Dste-href-ab8500.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-ab8500.dtsi"
13 pinctrl-names = "default", "sleep";
14 pinctrl-0 = <&usb_a_1_default>;
15 pinctrl-1 = <&usb_a_1_sleep>;
20 regulator-name = "V-DISPLAY";
24 regulator-name = "V-eMMC1";
28 regulator-name = "V-MMC-SD";
32 regulator-name = "V-INTCORE";
36 regulator-name = "V-TVOUT";
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H A Dste-href-ab8505.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "ste-ab8505.dtsi"
13 pinctrl-names = "default", "sleep";
14 pinctrl-0 = <&usb_a_1_default>;
15 pinctrl-1 = <&usb_a_1_sleep>;
20 regulator-name = "V-DISPLAY";
24 regulator-name = "V-eMMC1";
28 regulator-name = "V-MMC-SD";
32 regulator-name = "V-INTCORE";
36 regulator-name = "V-TVOUT";
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/linux/Documentation/devicetree/bindings/gpio/
H A Dst,spear-spics-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/st,spear-spics-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST Microelectronics SPEAr SPI CS GPIO Controller
10 - Viresh Kumar <vireshk@kernel.org>
23 export the control of this interface as gpio.
27 const: st,spear-spics-gpio
32 gpio-controller: true
34 '#gpio-cells':
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra114-asus-tf701t.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
13 chassis-type = "convertible";
29 trusted-foundations {
30 compatible = "tlm,trusted-foundations";
31 tlm,version-major = <2>;
32 tlm,version-minor = <8>;
40 reserved-memory {
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H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
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H A Dtegra30-cardhu-a04.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
19 ddr_reg: regulator-ddr {
20 compatible = "regulator-fixed";
21 regulator-name = "ddr";
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H A Dtegra30-asus-transformer-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra30-cpu-opp.dtsi"
9 #include "tegra30-cpu-opp-microvolt.dtsi"
12 chassis-type = "convertible";
31 * pre-existing /chosen node to be available to insert the
37 trusted-foundations {
38 compatible = "tlm,trusted-foundations";
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H A Dtegra30-cardhu-a02.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
19 ddr_reg: regulator-ddr {
20 compatible = "regulator-fixed";
21 regulator-name = "vdd_ddr";
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H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio =
35 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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H A Dtegra114-dalmore.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
34 hdmi-supply = <&vdd_5v0_hdmi>;
35 vdd-supply = <&vdd_hdmi_reg>;
36 pll-supply = <&palmas_smps3_reg>;
38 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
39 nvidia,hpd-gpio =
40 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8973.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: regulator.yaml#
18 - maxim,max8973
19 - maxim,max77621
21 junction-warn-millicelsius:
30 maxim,dvs-gpio:
33 GPIO which is connected to DVS pin of device.
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H A Dgpio-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO controlled regulators
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: regulator.yaml#
22 const: regulator-gpio
24 regulator-name: true
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H A Dti,tps62360.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laxman Dewangan <ldewangan@nvidia.com>
13 The TPS6236x are a family of step down dc-dc converter with
22 - $ref: regulator.yaml#
27 - ti,tps62360
28 - ti,tps62361
29 - ti,tps62362
30 - ti,tps62363
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio =
36 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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/linux/arch/powerpc/boot/dts/
H A Dmpc5200b.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&mpc5200_pic>;
20 #address-cells = <1>;
21 #size-cells = <0>;
26 d-cache-line-size = <32>;
27 i-cache-line-size = <32>;
28 d-cache-size = <0x4000>; // L1, 16K
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/linux/drivers/clk/
H A Dclk-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
9 * Gpio controlled clock implementation
12 #include <linux/clk-provider.h>
15 #include <linux/gpio/consumer.h>
23 * DOC: basic gpio gated clock which can be enabled and disabled
24 * with gpio output
26 * prepare - clk_(un)prepare are functional and control a gpio that can sleep
27 * enable - clk_enable and clk_disable are functional & control
28 * non-sleeping gpio
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/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
15 marvell,function = "gpio";
18 pmx_fanctrl_15: pmx-fanctrl-15 {
20 marvell,function = "gpio";
23 pmx_fanctrl_16: pmx-fanctrl-16 {
25 marvell,function = "gpio";
28 pmx_fanctrl_17: pmx-fanctrl-17 {
30 marvell,function = "gpio";
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
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/linux/drivers/pinctrl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
35 bool "AMD GPIO pin control"
44 The driver for memory mapped GPIO functionality on AMD platforms
47 for GPIO use.
53 tristate "AMDISP GPIO pin control"
60 The driver for memory mapped GPIO functionality on AMD platforms
67 tristate "Apple SoC GPIO pin controller driver"
76 This is the driver for the GPIO controller found on Apple ARM SoCs,
80 will be called pinctrl-apple-gpio.
83 bool "Axis ARTPEC-6 pin controller driver"
[all …]
/linux/sound/soc/
H A Dsoc-jack.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-jack.c -- ALSA SoC jack handling
11 #include <linux/gpio/consumer.h>
20 * snd_soc_jack_report - Report the current status for a jack
39 if (!jack || !jack->jack) in snd_soc_jack_report()
43 dapm = snd_soc_card_to_dapm(jack->car in snd_soc_jack_report()
53 int enable = pin->mask & jack->status; snd_soc_jack_report() local
210 snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio * gpio) snd_soc_jack_gpio_detect() argument
213 int enable; snd_soc_jack_gpio_detect() local
234 struct snd_soc_jack_gpio *gpio = data; gpio_handler() local
251 struct snd_soc_jack_gpio *gpio; gpio_work() local
260 struct snd_soc_jack_gpio *gpio = snd_soc_jack_pm_notifier() local
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