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/linux/Documentation/devicetree/bindings/display/msm/
H A Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
11 - Abhinav Kumar <quic_abhinavk@quicinc.com>
20 - enum:
21 - qcom,glymur-dp
22 - qcom,sa8775p-dp
23 - qcom,sc7180-dp
[all …]
/linux/drivers/phy/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Rockchip platforms
6 tristate "Rockchip Display Port PHY Driver"
10 Enable this to support the Rockchip Display Port PHY.
22 will be called phy-rockchip-dphy-rx0.
25 tristate "Rockchip EMMC PHY Driver"
29 Enable this to support the Rockchip EMMC PHY.
32 tristate "Rockchip INNO HDMI PHY Driver"
38 Enable this to support the Rockchip Innosilicon HDMI PHY.
49 Support for Rockchip USB2.0 PHY with Innosilicon IP block.
[all …]
H A Dphy-rockchip-dp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip DP PHY driver
6 * Author: Yakir Yang <ykk@@rock-chips.com>
13 #include <linux/phy/phy.h>
32 static int rockchip_set_phy_state(struct phy *phy, bool enable) in rockchip_set_phy_state() argument
34 struct rockchip_dp_phy *dp = phy_get_drvdata(phy); in rockchip_set_phy_state()
38 ret = regmap_write(dp->grf, GRF_SOC_CON12, in rockchip_set_phy_state()
42 dev_err(dp->dev, "Can't enable PHY power %d\n", ret); in rockchip_set_phy_state()
46 ret = clk_prepare_enable(dp->phy_24m); in rockchip_set_phy_state()
48 clk_disable_unprepare(dp->phy_24m); in rockchip_set_phy_state()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,dispcc-sm8x50.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Marek <jonathan@marek.ca>
17 include/dt-bindings/clock/qcom,dispcc-sm8150.h
18 include/dt-bindings/clock/qcom,dispcc-sm8250.h
19 include/dt-bindings/clock/qcom,dispcc-sm8350.h
24 - qcom,sc8180x-dispcc
25 - qcom,sm8150-dispcc
[all …]
/linux/drivers/phy/qualcomm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Qualcomm and Atheros platforms
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
22 tristate "Qualcomm eDP PHY driver"
28 Enable this driver to support the Qualcomm eDP PHY found in various
32 tristate "Qualcomm IPQ4019 USB PHY driver"
36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
39 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o
3 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
4 obj-$(CONFIG_PHY_QCOM_EDP) += phy-qcom-edp.o
5 obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
6 obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
7 obj-$(CONFIG_PHY_QCOM_M31_USB) += phy-qcom-m31.o
8 obj-$(CONFIG_PHY_QCOM_M31_EUSB) += phy-qcom-m31-eusb2.o
9 obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o
11 obj-$(CONFIG_PHY_QCOM_QMP_COMBO) += phy-qcom-qmp-combo.o phy-qcom-qmp-usbc.o
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sc8280xp-pmics.dtsi"
17 compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
27 compatible = "pwm-backlight";
29 enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
30 power-supply = <&vreg_edp_bl>;
32 pinctrl-names = "default";
[all …]
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
[all …]
H A Dsc8280xp-lenovo-thinkpad-x13s.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 #include "sc8280xp-pmics.dtsi"
21 compatible = "lenovo,thinkpad-x13s", "qcom,sc8280xp";
[all …]
H A Dx1p42100-lenovo-thinkbook-16.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 #include "hamoa-pmics.dtsi"
19 /delete-node/ &pmc8380_6;
20 /delete-node/ &pmc8380_6_thermal;
[all …]
H A Dx1-hp-omnibook-x14.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/gpio-keys.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 wcd938x: audio-codec {
20 compatible = "qcom,wcd9385-codec";
22 pinctrl-names = "default";
23 pinctrl-0 = <&wcd_default>;
[all …]
H A Dx1-asus-zenbook-a14.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/gpio-keys.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include "hamoa-pmics.dtsi"
17 chassis-type = "laptop";
24 wcd938x: audio-codec {
[all …]
H A Dx1-microsoft-denali.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/gpio-keys.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "hamoa-pmics.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
23 pinctrl-0 = <&hall_int_n_default>;
24 pinctrl-names = "default";
[all …]
H A Dsc7180-acer-aspire1.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/sound/qcom,q6asm.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 /delete-node/ &tz_mem;
15 /delete-node/ &ipa_fw_mem;
20 chassis-type = "laptop";
30 stdout-path = "serial0:115200n8";
33 reserved-memory {
[all …]
H A Dsc8280xp-microsoft-blackrock.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
11 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/gpio-keys.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18 #include "sc8280xp-pmics.dtsi"
23 chassis-type = "desktop";
31 wcd938x: audio-codec {
[all …]
H A Dx1-dell-thena.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include "hamoa-pmics.dtsi"
18 chassis-type = "laptop";
24 wcd938x: audio-codec {
25 compatible = "qcom,wcd9385-codec";
[all …]
H A Dx1e80100-medion-sprchrgd-14-s1.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "hamoa-pmics.dtsi"
29 wcd938x: audio-codec {
30 compatible = "qcom,wcd9385-codec";
32 pinctrl-0 = <&wcd_default>;
33 pinctrl-names = "default";
35 qcom,micbias1-microvolt = <1800000>;
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drockchip,rk3288-dp-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip specific extensions to the Analogix Display Port PHY
10 - Heiko Stuebner <heiko@sntech.de>
14 const: rockchip,rk3288-dp-phy
19 clock-names:
22 "#phy-cells":
26 - compatible
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_alpm.c1 // SPDX-License-Identifier: MIT
23 (SILENCE_PERIOD_MAX_TIME - \
30 return intel_dp->alpm_dpcd & DP_ALPM_CAP; in intel_alpm_aux_wake_supported()
35 return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP; in intel_alpm_aux_less_wake_supported()
42 (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp)); in intel_alpm_is_alpm_aux_less()
47 mutex_init(&intel_dp->alpm.lock); in intel_alpm_init()
52 return SILENCE_PERIOD_TIME * intel_dp_link_symbol_clock(crtc_state->port_clock) / in get_silence_period_symbols()
59 if (crtc_state->port_clock < 540000) { in get_lfps_cycle_min_max_time()
75 return tlfps_cycle_min + (tlfps_cycle_max - tlfps_cycle_min) / 2; in get_lfps_cycle_time()
80 return get_lfps_cycle_time(crtc_state) * crtc_state->port_clock / 1000 / in get_lfps_half_cycle_clocks()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-base.dtsi"
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
20 compatible = "pwm-backlight";
21 brightness-levels = <
54 default-brightness-level = <200>;
58 edp_panel: edp-panel {
59 compatible = "lg,lp079qx1-sp0v";
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,dp.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
21 clock-names: true
25 phy-names:
28 force-hpd:
32 is used for some eDP screen which don not have a hpd signal.
34 hpd-gpios:
51 Port node with one endpoint connected to a dp-connector node.
[all …]
/linux/include/drm/display/
H A Ddrm_dp.h35 * eDP: Embedded DisplayPort version 1
38 * MST: Multistream Transport - part of DP 1.2a
40 * 1.2 formally includes both eDP and DPI definitions.
49 /* bits per component for non-RAW */
146 # define DP_MSA_TIMING_PAR_IGNORED (1 << 6) /* eDP */
170 # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */
180 #define DP_SUPPORTED_LINK_RATES 0x010 /* eDP 1.4 */
181 # define DP_MAX_SUPPORTED_RATES 8 /* 16-bit little-endian */
234 #define DP_RECEIVER_ALPM_CAP 0x02e /* eDP 1.4 */
236 # define DP_ALPM_PM_STATE_2A_SUPPORT (1 << 1) /* eDP 1.5 */
[all …]
H A Ddrm_dp_helper.h76 * struct drm_dp_vsc_sdp - drm DP VSC SDP
79 * It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and
80 * [Table 2-117: VSC SDP Payload for DB16 through DB18]
82 * @sdp_type: secondary-data packet type
89 * @content_type: CTA-861-G defines content types and expected processing by a sink device
103 * struct drm_dp_as_sdp - drm DP Adaptive Sync SDP
106 * It is based on DP 2.1 spec [Table 2-126: Adaptive-Sync SDP Header Bytes] and
107 * [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]
109 * @sdp_type: Secondary-data packet type
207 /* DP/eDP DSC support */
[all …]
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_factory.c50 dc_ctx->logger
61 link_srv->create_link = link_create; in construct_link_service_factory()
62 link_srv->destroy_link = link_destroy; in construct_link_service_factory()
72 link_srv->detect_link = link_detect; in construct_link_service_detection()
73 link_srv->detect_connection_type = link_detect_connection_type; in construct_link_service_detection()
74 link_srv->add_remote_sink = link_add_remote_sink; in construct_link_service_detection()
75 link_srv->remove_remote_sink = link_remove_remote_sink; in construct_link_service_detection()
76 link_srv->get_hpd_state = link_get_hpd_state; in construct_link_service_detection()
77 link_srv->enable_hpd = link_enable_hpd; in construct_link_service_detection()
78 link_srv->disable_hpd = link_disable_hpd; in construct_link_service_detection()
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-zii-rdu2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2016-2017 Zodiac Inflight Innovations
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/sound/fsl-imx-audmux.h>
11 stdout-path = &uart1;
15 mdio-gpio0 = &mdio1;
20 compatible = "virtual,mdio-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
23 pinctrl-names = "default";
[all …]

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