Lines Matching +full:edp +full:- +full:phy
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
16 See also:: include/dt-bindings/clock/qcom,dispcc-sc7280.h
20 const: qcom,sc7280-dispcc
24 - description: Board XO source
25 - description: GPLL0 source from GCC
26 - description: Byte clock from DSI PHY
27 - description: Pixel clock from DSI PHY
28 - description: Link clock from DP PHY
29 - description: VCO DIV clock from DP PHY
30 - description: Link clock from EDP PHY
31 - description: VCO DIV clock from EDP PHY
33 clock-names:
35 - const: bi_tcxo
36 - const: gcc_disp_gpll0_clk
37 - const: dsi0_phy_pll_out_byteclk
38 - const: dsi0_phy_pll_out_dsiclk
39 - const: dp_phy_pll_link_clk
40 - const: dp_phy_pll_vco_div_clk
41 - const: edp_phy_pll_link_clk
42 - const: edp_phy_pll_vco_div_clk
45 - compatible
46 - clocks
47 - clock-names
48 - '#power-domain-cells'
51 - $ref: qcom,gcc.yaml#
56 - |
57 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
58 #include <dt-bindings/clock/qcom,rpmh.h>
59 clock-controller@af00000 {
60 compatible = "qcom,sc7280-dispcc";
70 clock-names = "bi_tcxo",
78 #clock-cells = <1>;
79 #reset-cells = <1>;
80 #power-domain-cells = <1>;