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/linux/drivers/gpu/drm/sti/
H A Dsti_dvo.c26 /* DVO registers */
76 * @regs: dvo registers
77 * @clk_pix: pixel clock for dvo
78 * @clk: clock for dvo
79 * @clk_main_parent: dvo parent clock if main path used
80 * @clk_aux_parent: dvo parent clock if aux path used
82 * @panel: reference to the panel connected to the dvo
83 * @enabled: true if dvo is enabled else false
106 struct sti_dvo *dvo; member
113 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code) in dvo_awg_generate_code() argument
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H A Dsti_tvout.c119 struct drm_encoder *dvo; member
292 * tvout_dvo_start - Start VIP block for DVO output
306 DRM_DEBUG_DRIVER("main vip for DVO\n"); in tvout_dvo_start()
307 /* Select the input sync for dvo */ in tvout_dvo_start()
315 DRM_DEBUG_DRIVER("aux vip for DVO\n"); in tvout_dvo_start()
316 /* Select the input sync for dvo */ in tvout_dvo_start()
517 seq_puts(s, "\n\n DVO encoder: "); in tvout_dbg_show()
518 crtc = tvout->dvo->crtc; in tvout_dbg_show()
786 tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout); in sti_tvout_create_encoders()
789 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo); in sti_tvout_create_encoders()
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H A DNOTES14 - The HDMI / DVO / HD Analog / SD analog IP builds the video signals
15 - DVO (Digital Video Output) handles a 24bits parallel signal
25 GPU >-------------+Cursor | | +---+ DVO +--> 24b//
45 - The Bridges/Connectors are mapped to the HDMI / DVO / HD Analog / SD analog
53 | |Cursor | | | +-> | | DVO | <-+
H A Dsti_vtg.c70 /* Delay introduced by the DVO in nb of pixel */
263 /* Set hsync and vsync position for DVO */ in vtg_set_mode()
/linux/drivers/gpu/drm/i915/display/
H A Ddvo_ivch.c63 /* Enables the DVO repeater. */
65 /* Enables the DVO clock */
160 /* Some Bios implementations do not restore the DVO state upon
186 static void ivch_dump_regs(struct intel_dvo_device *dvo);
192 static bool ivch_read(struct intel_dvo_device *dvo, int addr, u16 *data) in ivch_read() argument
194 struct ivch_priv *priv = dvo->dev_priv; in ivch_read()
195 struct i2c_adapter *adapter = dvo->i2c_bus; in ivch_read()
201 .addr = dvo->target_addr, in ivch_read()
212 .addr = dvo->target_addr, in ivch_read()
229 addr, adapter->name, dvo->target_addr); in ivch_read()
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H A Ddvo_tfp410.c94 static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, u8 *ch) in tfp410_readb() argument
96 struct tfp410_priv *tfp = dvo->dev_priv; in tfp410_readb()
97 struct i2c_adapter *adapter = dvo->i2c_bus; in tfp410_readb()
103 .addr = dvo->target_addr, in tfp410_readb()
109 .addr = dvo->target_addr, in tfp410_readb()
126 addr, adapter->name, dvo->target_addr); in tfp410_readb()
131 static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, u8 ch) in tfp410_writeb() argument
133 struct tfp410_priv *tfp = dvo->dev_priv; in tfp410_writeb()
134 struct i2c_adapter *adapter = dvo->i2c_bus; in tfp410_writeb()
137 .addr = dvo->target_addr, in tfp410_writeb()
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H A Ddvo_ch7xxx.c96 * driver for the Chrontel 7xxx DVI chip over DVO.
147 static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, u8 *ch) in ch7xxx_readb() argument
149 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; in ch7xxx_readb()
150 struct i2c_adapter *adapter = dvo->i2c_bus; in ch7xxx_readb()
156 .addr = dvo->target_addr, in ch7xxx_readb()
162 .addr = dvo->target_addr, in ch7xxx_readb()
179 addr, adapter->name, dvo->target_addr); in ch7xxx_readb()
185 static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, u8 ch) in ch7xxx_writeb() argument
187 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; in ch7xxx_writeb()
188 struct i2c_adapter *adapter = dvo->i2c_bus; in ch7xxx_writeb()
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H A Ddvo_sil164.c73 static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch) in sil164_readb() argument
75 struct sil164_priv *sil = dvo->dev_priv; in sil164_readb()
76 struct i2c_adapter *adapter = dvo->i2c_bus; in sil164_readb()
82 .addr = dvo->target_addr, in sil164_readb()
88 .addr = dvo->target_addr, in sil164_readb()
105 addr, adapter->name, dvo->target_addr); in sil164_readb()
110 static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch) in sil164_writeb() argument
112 struct sil164_priv *sil = dvo->dev_priv; in sil164_writeb()
113 struct i2c_adapter *adapter = dvo->i2c_bus; in sil164_writeb()
116 .addr = dvo->target_addr, in sil164_writeb()
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H A Ddvo_ch7017.c166 static void ch7017_dump_regs(struct intel_dvo_device *dvo);
167 static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable);
169 static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val) in ch7017_read() argument
173 .addr = dvo->target_addr, in ch7017_read()
179 .addr = dvo->target_addr, in ch7017_read()
185 return i2c_transfer(dvo->i2c_bus, msgs, 2) == 2; in ch7017_read()
188 static bool ch7017_write(struct intel_dvo_device *dvo, u8 addr, u8 val) in ch7017_write() argument
192 .addr = dvo->target_addr, in ch7017_write()
197 return i2c_transfer(dvo->i2c_bus, &msg, 1) == 1; in ch7017_write()
201 static bool ch7017_init(struct intel_dvo_device *dvo, in ch7017_init() argument
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H A Ddvo_ns2501.c69 * Register c0 controls how the DVO synchronizes with
73 #define NS2501_C0_ENABLE (1<<0) /* enable the DVO sync in general */
86 * this register controls the dithering of the DVO
160 * backlight and the DVO output. To enable the corresponding
163 #define NS2501_REG34 0x34 /* DVO enable functions, first register */
164 #define NS2501_REG35 0x35 /* DVO enable functions, second register */
165 #define NS2501_34_ENABLE_OUTPUT (1<<0) /* enable DVO output */
200 * the DVO, given a specific output configuration.
225 * DVO configuration values, partially based on what the BIOS
293 * Fujitsu S6010 in the DVO control registers. Their
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H A Dintel_dvo.c137 tmp = intel_de_read(i915, DVO(port)); in intel_dvo_connector_get_hw_state()
152 tmp = intel_de_read(i915, DVO(port)); in intel_dvo_get_hw_state()
168 tmp = intel_de_read(i915, DVO(port)); in intel_dvo_get_config()
194 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); in intel_disable_dvo()
195 intel_de_posting_read(i915, DVO(port)); in intel_disable_dvo()
211 intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); in intel_enable_dvo()
212 intel_de_posting_read(i915, DVO(port)); in intel_enable_dvo()
298 dvo_val = intel_de_read(i915, DVO(port)) & in intel_dvo_pre_enable()
314 intel_de_write(i915, DVO(port), dvo_val); in intel_dvo_pre_enable()
387 static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo) in intel_dvo_encoder_type() argument
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H A Dintel_dvo_dev.h53 bool (*init)(struct intel_dvo_device *dvo,
59 * Because none of our dvo drivers support an intermediate power levels,
62 void (*dpms)(struct intel_dvo_device *dvo, bool enable);
73 enum drm_mode_status (*mode_valid)(struct intel_dvo_device *dvo,
83 void (*mode_set)(struct intel_dvo_device *dvo,
90 enum drm_connector_status (*detect)(struct intel_dvo_device *dvo);
101 void (*destroy) (struct intel_dvo_device *dvo);
106 void (*dump_regs)(struct intel_dvo_device *dvo);
H A Dintel_dvo_regs.h14 #define DVO(port) _MMIO_PORT((port), _DVOA, _DVOB) macro
/linux/drivers/gpu/drm/ast/
H A Dast_dp501.c362 /* Init SCU DVO Settings */ in ast_init_dvo()
371 /* multi-pins for DVO single-edge */ in ast_init_dvo()
376 /* multi-pins for DVO single-edge */ in ast_init_dvo()
381 /* multi-pins for DVO single-edge */ in ast_init_dvo()
387 /* multi-pins for DVO single-edge */ in ast_init_dvo()
392 /* multi-pins for DVO single-edge */ in ast_init_dvo()
397 /* multi-pins for DVO single-edge */ in ast_init_dvo()
402 /* multi-pins for DVO single-edge */ in ast_init_dvo()
407 /* multi-pins for DVO single-edge */ in ast_init_dvo()
413 /* Force to DVO */ in ast_init_dvo()
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/linux/drivers/gpu/drm/loongson/
H A Dlsdc_output_7a1000.c14 * The display controller in the LS7A1000 exports two DVO interfaces, thus
35 * Currently, we assume the external encoders connected to the DVO are
36 * transparent. Loongson's DVO interface can directly drive RGB888 panels.
125 /* DVO */ in ls7a1000_pipe1_encoder_reset()
164 drm_info(ddev, "display pipe-%u has a DVO\n", index); in ls7a1000_output_init()
/linux/Documentation/devicetree/bindings/display/
H A Dst,stih4xx.txt85 sti-dvo:
88 - compatible: "st,stih<chip>-dvo"
99 - sti,panel: phandle of the panel connected to the DVO output
217 sti-dvo@8d00400 {
218 compatible = "st,stih407-dvo";
220 reg-names = "dvo-reg";
221 clock-names = "dvo_pix", "dvo",
/linux/drivers/pinctrl/nuvoton/
H A Dpinctrl-wpcm450.c673 WPCM450_PINCFG(37, none, NONE, 0, none, NONE, 0), /* DVO */
674 WPCM450_PINCFG(38, none, NONE, 0, none, NONE, 0), /* DVO */
675 WPCM450_PINCFG(39, none, NONE, 0, none, NONE, 0), /* DVO */
676 WPCM450_PINCFG(40, none, NONE, 0, none, NONE, 0), /* DVO */
746 WPCM450_PINCFG(108, none, NONE, 0, none, NONE, 0), /* DVO */
747 WPCM450_PINCFG(109, none, NONE, 0, none, NONE, 0), /* DVO */
748 WPCM450_PINCFG(110, none, NONE, 0, none, NONE, 0), /* DVO */
749 WPCM450_PINCFG(111, none, NONE, 0, none, NONE, 0), /* DVO */
750 WPCM450_PINCFG(112, none, NONE, 0, none, NONE, 0), /* DVO */
751 WPCM450_PINCFG(113, none, NONE, 0, none, NONE, 0), /* DVO */
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/linux/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_drv.c40 * or DVO interface.
43 * the DAC or DVO interface.
45 * 3. Video input from DVO, the video input can be used for video engine
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-wpcm450.dtsi263 groups = "dvo";
268 groups = "dvo";
/linux/drivers/clk/st/
H A Dclk-flexgen.c525 { .name = "clk-pix-dvo", },
526 { .name = "clk-dvo", },
551 { .name = "clk-pix-dvo", },
552 { .name = "clk-dvo", },
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_encoders.c370 DVO_ENCODER_CONTROL_PS_ALLOCATION dvo; member
404 args.dvo.sDVOEncoder.ucAction = action; in amdgpu_atombios_encoder_setup_dvo()
405 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dvo()
407 args.dvo.sDVOEncoder.ucDeviceType = ATOM_DEVICE_DFP1_INDEX; in amdgpu_atombios_encoder_setup_dvo()
410 args.dvo.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute |= PANEL_ENCODER_MISC_DUAL; in amdgpu_atombios_encoder_setup_dvo()
449 /* DVO is always DVO */ in amdgpu_atombios_encoder_get_encoder_mode()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu_v13_0_4_pmfw.h79 //#define FEATURE_RSMU_LOW_POWER_BIT 44 //temp removal for DVO
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnuvoton,wpcm450-pinctrl.yaml73 hsp1, hsp2, r1err, r1md, rmii2, r2err, r2md, kbcc, dvo,
/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_drv.h44 * external chips are via DVO or SDVO output */
/linux/drivers/gpu/drm/radeon/
H A Datombios_encoders.c480 DVO_ENCODER_CONTROL_PS_ALLOCATION dvo; member
518 args.dvo.sDVOEncoder.ucAction = action; in atombios_dvo_setup()
519 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dvo_setup()
521 args.dvo.sDVOEncoder.ucDeviceType = ATOM_DEVICE_DFP1_INDEX; in atombios_dvo_setup()
524 args.dvo.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute |= PANEL_ENCODER_MISC_DUAL; in atombios_dvo_setup()
684 /* DVO is always DVO */ in atombios_get_encoder_mode()

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