1*30ebb908SBenjamin Gaignard1. stiH display hardware IP 2*30ebb908SBenjamin Gaignard--------------------------- 3*30ebb908SBenjamin GaignardThe STMicroelectronics stiH SoCs use a common chain of HW display IP blocks: 4*30ebb908SBenjamin Gaignard- The High Quality Video Display Processor (HQVDP) gets video frames from a 5*30ebb908SBenjamin Gaignard video decoder and does high quality video processing, including scaling. 6*30ebb908SBenjamin Gaignard 7*30ebb908SBenjamin Gaignard- The Compositor is a multiplane, dual-mixer (Main & Aux) digital processor. It 8*30ebb908SBenjamin Gaignard has several inputs: 9*30ebb908SBenjamin Gaignard - The graphics planes are internally processed by the Generic Display 10*30ebb908SBenjamin Gaignard Pipeline (GDP). 11*30ebb908SBenjamin Gaignard - The video plug (VID) connects to the HQVDP output. 12*30ebb908SBenjamin Gaignard - The cursor handles ... a cursor. 13*30ebb908SBenjamin Gaignard- The TV OUT pre-formats (convert, clip, round) the compositor output data 14*30ebb908SBenjamin Gaignard- The HDMI / DVO / HD Analog / SD analog IP builds the video signals 15*30ebb908SBenjamin Gaignard - DVO (Digital Video Output) handles a 24bits parallel signal 16*30ebb908SBenjamin Gaignard - The HD analog signal is typically driven by a YCbCr cable, supporting up to 17*30ebb908SBenjamin Gaignard 1080i mode. 18*30ebb908SBenjamin Gaignard - The SD analog signal is typically used for legacy TV 19*30ebb908SBenjamin Gaignard- The VTG (Video Timing Generators) build Vsync signals used by the other HW IP 20*30ebb908SBenjamin GaignardNote that some stiH drivers support only a subset of thee HW IP. 21*30ebb908SBenjamin Gaignard 22*30ebb908SBenjamin Gaignard .-------------. .-----------. .-----------. 23*30ebb908SBenjamin GaignardGPU >-------------+GDP Main | | +---+ HDMI +--> HDMI 24*30ebb908SBenjamin GaignardGPU >-------------+GDP mixer+---+ | :===========: 25*30ebb908SBenjamin GaignardGPU >-------------+Cursor | | +---+ DVO +--> 24b// 26*30ebb908SBenjamin Gaignard ------- | COMPOSITOR | | TV OUT | :===========: 27*30ebb908SBenjamin Gaignard | | | | | +---+ HD analog +--> YCbCr 28*30ebb908SBenjamin GaignardVid >--+ HQVDP +--+VID Aux +---+ | :===========: 29*30ebb908SBenjamin Gaignarddec | | | mixer| | +---+ SD analog +--> CVBS 30*30ebb908SBenjamin Gaignard '-------' '-------------' '-----------' '-----------' 31*30ebb908SBenjamin Gaignard .-----------. 32*30ebb908SBenjamin Gaignard | main+--> Vsync 33*30ebb908SBenjamin Gaignard | VTG | 34*30ebb908SBenjamin Gaignard | aux+--> Vsync 35*30ebb908SBenjamin Gaignard '-----------' 36*30ebb908SBenjamin Gaignard 37*30ebb908SBenjamin Gaignard2. DRM / HW mapping 38*30ebb908SBenjamin Gaignard------------------- 39*30ebb908SBenjamin GaignardThese IP are mapped to the DRM objects as following: 40*30ebb908SBenjamin Gaignard- The CRTCs are mapped to the Compositor Main and Aux Mixers 41*30ebb908SBenjamin Gaignard- The Framebuffers and planes are mapped to the Compositor GDP (non video 42*30ebb908SBenjamin Gaignard buffers) and to HQVDP+VID (video buffers) 43*30ebb908SBenjamin Gaignard- The Cursor is mapped to the Compositor Cursor 44*30ebb908SBenjamin Gaignard- The Encoders are mapped to the TVOut 45*30ebb908SBenjamin Gaignard- The Bridges/Connectors are mapped to the HDMI / DVO / HD Analog / SD analog 46*30ebb908SBenjamin Gaignard 47*30ebb908SBenjamin GaignardFB & planes Cursor CRTC Encoders Bridges/Connectors 48*30ebb908SBenjamin Gaignard | | | | | 49*30ebb908SBenjamin Gaignard | | | | | 50*30ebb908SBenjamin Gaignard | .-------------. | .-----------. .-----------. | 51*30ebb908SBenjamin Gaignard +------------> |GDP | Main | | | +-> | | HDMI | <-+ 52*30ebb908SBenjamin Gaignard +------------> |GDP v mixer|<+ | | | :===========: | 53*30ebb908SBenjamin Gaignard | |Cursor | | | +-> | | DVO | <-+ 54*30ebb908SBenjamin Gaignard | ------- | COMPOSITOR | | |TV OUT | | :===========: | 55*30ebb908SBenjamin Gaignard | | | | | | | +-> | | HD analog | <-+ 56*30ebb908SBenjamin Gaignard +-> | HQVDP | |VID Aux |<+ | | | :===========: | 57*30ebb908SBenjamin Gaignard | | | mixer| | +-> | | SD analog | <-+ 58*30ebb908SBenjamin Gaignard '-------' '-------------' '-----------' '-----------' 59