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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dintel,ldma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lightning Mountain centralized DMA controllers.
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
[all …]
/freebsd/sys/dev/ichiic/
H A Dig4_reg.h40 * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
42 * This is a from-scratch driver under the BSD license using the Intel data
61 * Register width is 32-bit
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/freebsd/sys/kern/
H A Duipc_ktls.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2014-2019 Netflix Inc.
132 "Number of TLS threads in thread-pool");
147 "Enable support of AES-CBC crypto for kernel TLS");
236 "Active number of software TLS sessions using AES-CBC");
240 "Active number of software TLS sessions using AES-GCM");
245 "Active number of software TLS sessions using Chacha20-Poly1305");
250 "Active number of ifnet TLS sessions using AES-CBC");
255 "Active number of ifnet TLS sessions using AES-GCM");
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/freebsd/sys/dev/cas/
H A Dif_casreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
73 #define CAS_CAW_RX_WGHT_MASK 0x00000003 /* RX DMA factor for... */
75 #define CAS_CAW_TX_WGHT_MASK 0x0000000c /* RX DMA factor for... */
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
112 #define CAS_ERROR_DMAW_ZERO 0x00000008 /* zero count DMA write */
113 #define CAS_ERROR_DMAR_ZERO 0x00000010 /* zero count DMA read */
116 #define CAS_BIM_CONF_BD64_DIS 0x00000004 /* 64-bit mode disable */
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/freebsd/sys/dev/dpaa2/
H A Ddpaa2_swp.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause AND BSD-2-Clause
4 * Copyright © 2014-2016 Freescale Semiconductor, Inc.
5 * Copyright © 2016-2019 NXP
35 * drivers/soc/fsl/dpio/qbman-portal.c
42 * Copyright © 2021-2022 Dmitry Salychev
99 /* Shifts in the VERB byte of the enqueue command descriptor. */
104 /* VERB byte options of the enqueue command descriptor. */
132 /* Shifts in the VERB byte of the volatile dequeue command. */
198 mtx_init(&p->lock, "swp_sleep_lock", NULL, MTX_DEF); in dpaa2_swp_init_portal()
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/freebsd/sys/contrib/dev/rtw89/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
32 struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; in rtw89_pci_rst_bdram_pcie()
33 struct pci_dev *pdev = rtwpci->pdev; in rtw89_pci_rst_bdram_pcie()
48 return -EFAULT; in rtw89_pci_dma_recalc()
72 const struct rtw89_pci_info *info = rtwdev->pci_info; in rtw89_pci_txbd_recalc()
75 rp = bd_ring->r in rtw89_pci_txbd_recalc()
144 dma_addr_t dma; rtw89_pci_sync_skb_for_cpu() local
156 dma_addr_t dma; rtw89_pci_sync_skb_for_device() local
1148 rtw89_pci_fill_txaddr_info(struct rtw89_dev * rtwdev,void * txaddr_info_addr,u32 total_len,dma_addr_t dma,u8 * add_info_nr) rtw89_pci_fill_txaddr_info() argument
1165 rtw89_pci_fill_txaddr_info_v1(struct rtw89_dev * rtwdev,void * txaddr_info_addr,u32 total_len,dma_addr_t dma,u8 * add_info_nr) rtw89_pci_fill_txaddr_info_v1() argument
1217 dma_addr_t dma; rtw89_pci_txwd_submit() local
1279 dma_addr_t dma; rtw89_pci_fwcmd_submit() local
2642 rtw89_pci_ltr_set(struct rtw89_dev * rtwdev,bool en) rtw89_pci_ltr_set() argument
2677 rtw89_pci_ltr_set_v1(struct rtw89_dev * rtwdev,bool en) rtw89_pci_ltr_set_v1() argument
2844 dma_addr_t dma = wd_ring->dma; rtw89_pci_free_tx_wd_ring() local
2859 dma_addr_t dma; rtw89_pci_free_tx_ring() local
2892 dma_addr_t dma; rtw89_pci_free_rx_ring() local
2944 dma_addr_t dma; rtw89_pci_init_rx_bd() local
2971 dma_addr_t dma; rtw89_pci_alloc_tx_wd_ring() local
3024 dma_addr_t dma; rtw89_pci_alloc_tx_ring() local
3112 dma_addr_t dma; rtw89_pci_alloc_rx_ring() local
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H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
43 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_write()
44 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_write()
46 rtw89_write32(rtwdev, mac->filter_model_add in rtw89_mac_mem_write()
1018 hfc_func_en(struct rtw89_dev * rtwdev,bool en,bool h2c_en) hfc_func_en() argument
1034 hfc_init(struct rtw89_dev * rtwdev,bool reset,bool en,bool h2c_en) hfc_init() argument
1351 cmac_func_en(struct rtw89_dev * rtwdev,u8 mac_idx,bool en) cmac_func_en() argument
3328 rtw89_mac_err_imr_ctrl(struct rtw89_dev * rtwdev,bool en) rtw89_mac_err_imr_ctrl() argument
3757 rtw89_mac_port_cfg_tx_rpt(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,bool en) rtw89_mac_port_cfg_tx_rpt() argument
3768 rtw89_mac_port_cfg_rx_rpt(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,bool en) rtw89_mac_port_cfg_rx_rpt() argument
3791 bool en = rtwvif->net_type != RTW89_NET_TYPE_NO_LINK; rtw89_mac_port_cfg_bcn_prct() local
3804 bool en = rtwvif->net_type == RTW89_NET_TYPE_INFRA || rtw89_mac_port_cfg_rx_sw() local
3818 bool en = rtwvif->net_type == RTW89_NET_TYPE_INFRA || rtw89_mac_port_cfg_rx_sync() local
3831 bool en = rtwvif->net_type == RTW89_NET_TYPE_AP_MODE || rtw89_mac_port_cfg_tx_sw() local
5172 rtw89_mac_bfee_ctrl(struct rtw89_dev * rtwdev,u8 mac_idx,bool en) rtw89_mac_bfee_ctrl() argument
5420 bool en = stats->tx_tfc_lv <= stats->rx_tfc_lv; _rtw89_mac_bf_monitor_track() local
5553 rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif,bool en) rtw89_mac_set_hw_muedca_ctrl() argument
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/freebsd/sys/dev/gem/
H A Dif_gemreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
40 /* Note: Reading the status reg clears bits 0-6. */
69 * Bits 0-6 auto-clear when read.
78 #define GEM_INTR_PCS 0x00002000 /* Physical Code Sub-layer */
106 #define GEM_PCI_BIF_CNF_HOST_64 0x00000002 /* 64-bit host */
107 #define GEM_PCI_BIF_CNF_B64D_DS 0x00000004 /* no 64-bit data cycle */
116 /* GEM_RESET register bits -- TX and RX self clear when complete. */
121 /* TX DMA registers */
147 #define GEM_TX_CONFIG_TXDMA_EN 0x00000001 /* TX DMA enable */
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/freebsd/sys/dev/mlx4/mlx4_core/
H A Dmlx4_main.c17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
42 #include <linux/dma-mapping.h>
44 #include <linux/io-mapping.h>
61 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
78 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
88 module_param_array(num_vfs, byte , &num_vfs_argc, 0444);
94 module_param_array(probe_vf, byte, &probe_vfs_argc, 0444);
106 " flow steering when available, set to -1");
111 "Enable 64 byte CQEs/EQEs when the FW supports this (default: True)");
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/freebsd/sys/dev/aac/
H A Daac.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
244 * Initialize per-controller queues. in aac_attach()
252 * Initialize command-completion task. in aac_attach()
254 TASK_INIT(&sc->aac_task_complete, 0, aac_complete, sc); in aac_attach()
257 sc->aac_state |= AAC_STATE_SUSPEND; in aac_attach()
268 mtx_init(&sc->aac_aifq_lock, "AAC AIF lock", NULL, MTX_DEF); in aac_attach()
269 mtx_init(&sc->aac_io_lock, "AAC I/O lock", NULL, MTX_DEF); in aac_attach()
270 mtx_init(&sc->aac_container_lock, "AAC container lock", NULL, MTX_DEF); in aac_attach()
271 TAILQ_INIT(&sc->aac_container_tqh); in aac_attach()
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_type.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * - IXGBE_ERROR_INVALID_STATE
48 * - IXGBE_ERROR_POLLING
53 * - IXGBE_ERROR_CAUTION
58 * - IXGBE_ERROR_SOFTWARE
64 * - IXGBE_ERROR_ARGUMENT
69 * - IXGBE_ERROR_UNSUPPORTED
162 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
419 (0x012300 + (((_i) - 24) * 4)))
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H A Dif_ix.c3 Copyright (c) 2001-2017, Intel Corporation
48 static const char ixgbe_driver_version[] = "4.0.1-k";
93 "Intel(R) X520-T 82599 LOM"),
105 "Intel(R) X520-1 82599EN (SFP+)"),
107 "Intel(R) X520-4 82599 (Quad SFP+)"),
109 "Intel(R) X520-Q1 82599 (QSFP+)"),
111 "Intel(R) X540-AT2"),
112 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"),
113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"),
114 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"),
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_config.c1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
40 * @brief Universal DMA HAL driver for configurations
55 al_reg_write32(&axi_regs->cfg_1, axi->axi_timeout); in al_udma_axi_set()
57 reg = al_reg_read32(&axi_regs->cfg_2); in al_udma_axi_set()
59 reg |= axi->arb_promotion; in al_udma_axi_set()
60 al_reg_write32(&axi_regs->cfg_2, reg); in al_udma_axi_set()
62 reg = al_reg_read32(&axi_regs->endian_cfg); in al_udma_axi_set()
63 if (axi->swap_8_bytes == AL_TRUE) in al_udma_axi_set()
68 if (axi->swap_s2m_data == AL_TRUE) in al_udma_axi_set()
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/freebsd/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
154 * D-Link gigabit ethernet device ID
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/freebsd/share/doc/smm/18.net/
H A D6.t90 be described in detail later. A pointer to a protocol-specific
125 #define SS_NBIO 0x100 /* non-blocking ops */
136 set with \fIfcntl\fP. ``Non-blocking'' I/O implies that
151 super-user. Only privileged sockets may
184 (assuming non-blocking I/O has not been specified).*
186 * The low-water mark is always presumed to be 0
205 Stream-oriented sockets queue data with no addresses, headers
210 Record-oriented sockets, including datagram sockets,
289 socket-visible characteristics, some of which are used in
301 /* protocol-protocol hooks */
[all …]
/freebsd/sys/dev/aic7xxx/
H A Daic79xx.c1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
6 * Copyright (c) 1994-2002, 2004 Justin T. Gibbs.
7 * Copyright (c) 2000-2003 Adaptec Inc.
21 * 3. Neither the names of the above-listed copyright holders nor the names
74 { DPARERR, "Data-path Parity Error" },
82 { P_DATAOUT, MSG_NOOP, "in Data-out phase" },
83 { P_DATAIN, MSG_INITIATOR_DET_ERR, "in Data-in phase" },
84 { P_DATAOUT_DT, MSG_NOOP, "in DT Data-out phase" },
85 { P_DATAIN_DT, MSG_INITIATOR_DET_ERR, "in DT Data-in phase" },
[all …]
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 * t4_wait_op_done_val - wait until an operation is completed
52 * @mask: a single-bit field within @reg that indicates completion
61 * operation completes and -EAGAIN otherwise.
74 if (--attempts == 0) in t4_wait_op_done_val()
75 return -EAGAIN; in t4_wait_op_done_val()
89 * t4_set_reg_field - set a register field to a value
108 * t4_read_indirect - read indirectly addressed registers
123 while (nregs--) { in t4_read_indirect()
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/freebsd/sys/dev/aacraid/
H A Daacraid.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
7 * Copyright (c) 2001-2010 Adaptec, Inc.
8 * Copyright (c) 2010-2012 PMC-Sierra, Inc.
246 sc->hint_flags = device_get_flags(sc->aac_dev); in aacraid_attach()
248 * Initialize per-controller queues. in aacraid_attach()
255 sc->aac_state |= AAC_STATE_SUSPEND; in aacraid_attach()
260 sc->msi_enabled = sc->msi_tupelo = FALSE; in aacraid_attach()
267 mtx_init(&sc->aac_io_lock, "AACRAID I/O lock", NULL, MTX_DEF); in aacraid_attach()
268 TAILQ_INIT(&sc->aac_container_tqh); in aacraid_attach()
[all …]
/freebsd/sys/dev/iwx/
H A Dif_iwx.c1 /*-
2 * SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) AND ISC
28 /*-
64 /*-
65 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
76 * Copyright(c) 2018 - 2019 Intel Corporation
90 * Copyright(c) 2018 - 2019 Intel Corporation
122 /*-
123 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
187 #define DEVNAME(_sc) (device_get_nameunit((_sc)->sc_dev))
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/freebsd/sys/contrib/dev/iwlwifi/pcie/
H A Dtrans.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2007-2015, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
22 #include "iwl-dr
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/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
[all …]
/freebsd/sys/contrib/dev/acpica/
H A Dchanges.txt1 ----------------------------------------
6 Fix 2 critical CVE addressing memory leaks - Seunghun Han
17 ----------------------------------------
30 ----------------------------------------
35 …that the PHAT firmware health record offset works correctly, fix various sub-table offsets, preven…
37 Fix the optional table 4-byte signature. Contributed by: Daniil Tatianin <99danilt@gmail.com>
56 ----------------------------------------
71 Add new tables for various architectures/OS, mainly RISC-V and also update many more.
73 Add an option to either make the output deterministic or non-deterministic.
80 ----------------------------------------
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
75 … 0x003820UL //Access:R DataWidth:0x20 // Byte number of RX are re…
77 … 0x003828UL //Access:R DataWidth:0x20 // byte number of tlp sent
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
208 /* Disable en/decrypt by hardware */ in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
[all …]
/freebsd/sbin/camcontrol/
H A Dcamcontrol.c2 * Copyright (c) 1997-2007 Kenneth D. Merry
209 {"devlist", CAM_CMD_DEVTREE, CAM_ARG_NONE, "-b"},
238 {"-?", CAM_CMD_USAGE, CAM_ARG_NONE, NULL},
239 {"-h", CAM_CMD_USAGE, CAM_ARG_NONE, NULL},
380 for (opts = table; (opts != NULL) && (opts->optname != NULL); in getoption()
382 if (strncmp(opts->optname, arg, strlen(arg)) == 0) { in getoption()
383 *cmdnum = opts->cmdnum; in getoption()
384 *argnum = opts->argnum; in getoption()
385 *subopt = opts->subopt; in getoption()
406 ccb->ccb_ in getdevlist()
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